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/linux/drivers/irqchip/
H A Dirq-xtensa-mx.c72 unsigned int mask = 1u << d->hwirq; in xtensa_mx_irq_mask() local
74 if (mask & (XCHAL_INTTYPE_MASK_EXTERN_EDGE | in xtensa_mx_irq_mask()
83 mask = __this_cpu_read(cached_irq_mask) & ~mask; in xtensa_mx_irq_mask()
84 __this_cpu_write(cached_irq_mask, mask); in xtensa_mx_irq_mask()
85 xtensa_set_sr(mask, intenable); in xtensa_mx_irq_mask()
90 unsigned int mask = 1u << d->hwirq; in xtensa_mx_irq_unmask() local
92 if (mask & (XCHAL_INTTYPE_MASK_EXTERN_EDGE | in xtensa_mx_irq_unmask()
101 mask |= __this_cpu_read(cached_irq_mask); in xtensa_mx_irq_unmask()
102 __this_cpu_write(cached_irq_mask, mask); in xtensa_mx_irq_unmask()
103 xtensa_set_sr(mask, intenable); in xtensa_mx_irq_unmask()
[all …]
/linux/arch/sh/include/asm/
H A Dword-at-a-time.h20 static inline long count_masked_bytes(long mask) in count_masked_bytes() argument
23 long a = (0x0ff0001+mask) >> 23; in count_masked_bytes()
25 return a & mask; in count_masked_bytes()
31 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; in has_zero() local
32 *bits = mask; in has_zero()
33 return mask; in has_zero()
48 #define zero_bytemask(mask) (mask) argument
50 static inline unsigned long find_zero(unsigned long mask) in find_zero() argument
52 return count_masked_bytes(mask); in find_zero()
/linux/arch/arm64/kvm/
H A Dpauth.c104 u64 mask; in compute_pac_mask() local
108 mask = GENMASK(54, bottom_pac); in compute_pac_mask()
110 mask |= GENMASK(63, 56); in compute_pac_mask()
112 return mask; in compute_pac_mask()
115 static u64 to_canonical_addr(struct kvm_vcpu *vcpu, u64 ptr, u64 mask) in to_canonical_addr() argument
120 return ptr | mask; in to_canonical_addr()
122 return ptr & ~mask; in to_canonical_addr()
128 u64 mask, error_code; in corrupt_addr() local
132 mask = GENMASK(54, 53); in corrupt_addr()
135 mask = GENMASK(62, 61); in corrupt_addr()
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/linux/drivers/leds/
H A Dleds-ot200.c22 u8 mask; member
34 .mask = BIT(0),
39 .mask = BIT(1),
44 .mask = BIT(2),
49 .mask = BIT(6),
54 .mask = BIT(5),
59 .mask = BIT(4),
64 .mask = BIT(3),
69 .mask = BIT(2),
74 .mask = BIT(1),
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/linux/arch/powerpc/mm/ptdump/
H A Dshared.c14 .mask = _PAGE_READ,
19 .mask = _PAGE_WRITE,
24 .mask = _PAGE_EXEC,
29 .mask = _PAGE_PRESENT,
34 .mask = _PAGE_COHERENT,
39 .mask = _PAGE_GUARDED,
44 .mask = _PAGE_DIRTY,
49 .mask = _PAGE_ACCESSED,
54 .mask = _PAGE_WRITETHRU,
59 .mask = _PAGE_NO_CACHE,
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/linux/arch/xtensa/include/asm/
H A Dbitops.h105 unsigned long mask = 1UL << (bit & 31); \
116 : [mask] "a" (inv mask), [addr] "a" (p) \
125 unsigned long mask = 1UL << (bit & 31); \
136 : [mask] "a" (inv mask), [addr] "a" (p) \
139 return value & mask; \
148 unsigned long mask = 1UL << (bit & 31); \
160 : [mask] "a" (inv mask) \
169 unsigned long mask = 1UL << (bit & 31); \
181 : [mask] "a" (inv mask) \
184 return tmp & mask; \
/linux/arch/m68k/amiga/
H A Dcia.c51 unsigned char cia_set_irq(struct ciabase *base, unsigned char mask) in cia_set_irq() argument
56 if (mask & CIA_ICR_SETCLR) in cia_set_irq()
57 base->icr_data |= mask; in cia_set_irq()
59 base->icr_data &= ~mask; in cia_set_irq()
69 unsigned char cia_able_irq(struct ciabase *base, unsigned char mask) in cia_able_irq() argument
75 base->cia->icr = mask; in cia_able_irq()
76 if (mask & CIA_ICR_SETCLR) in cia_able_irq()
77 base->icr_mask |= mask; in cia_able_irq()
79 base->icr_mask &= ~mask; in cia_able_irq()
114 unsigned char mask; in cia_irq_enable() local
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/linux/arch/alpha/kernel/
H A Dsys_sable.c42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
93 sable_update_irq_hw(unsigned long bit, unsigned long mask) in sable_update_irq_hw() argument
99 mask >>= 16; in sable_update_irq_hw()
102 mask >>= 8; in sable_update_irq_hw()
105 outb(mask, port); in sable_update_irq_hw()
221 unsigned long bit, mask; in sable_lynx_enable_irq() local
225 mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit); in sable_lynx_enable_irq()
226 sable_lynx_irq_swizzle->update_irq_hw(bit, mask); in sable_lynx_enable_irq()
230 __func__, mask, bit, irq); in sable_lynx_enable_irq()
237 unsigned long bit, mask; in sable_lynx_disable_irq() local
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/linux/arch/arm/kernel/
H A Dsleep.S38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask argument
39 and \mpidr, \mpidr, \mask @ mask out MPIDR bits
40 and \dst, \mpidr, #0xff @ mask=aff0
43 and \mask, \mpidr, #0xff00 @ mask = aff1
44 ARM( orr \dst, \dst, \mask, lsr \rs1 ) @ dst|=(aff1>>rs1)
45 THUMB( lsr \mask, \mask, \rs1 )
46 THUMB( orr \dst, \dst, \mask )
47 and \mask, \mpidr, #0xff0000 @ mask = aff2
48 ARM( orr \dst, \dst, \mask, lsr \rs2 ) @ dst|=(aff2>>rs2)
49 THUMB( lsr \mask, \mask, \rs2 )
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/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.h64 uint32_t value, uint32_t mask);
68 uint32_t value, uint32_t mask);
91 extern uint32_t phm_get_lowest_enabled_level(struct pp_hwmgr *hwmgr, uint32_t mask);
100 uint32_t value, uint32_t mask);
106 uint32_t mask);
176 #define PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, index, value, mask) \ argument
177 phm_wait_on_indirect_register(hwmgr, mm##port##_INDEX, index, value, mask)
180 #define PHM_WAIT_INDIRECT_REGISTER(hwmgr, port, reg, value, mask) \ argument
181 PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
187 #define PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, index, value, mask) \ argument
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/linux/drivers/mfd/
H A Dwm8998-tables.c52 .mask = ARIZONA_MICD_CLAMP_FALL_EINT1
55 .mask = ARIZONA_MICD_CLAMP_RISE_EINT1
57 [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 },
58 [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 },
59 [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 },
60 [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 },
76 [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 },
77 [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 },
78 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
79 [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
[all …]
H A Dwm5102-tables.c100 .mask = ARIZONA_MICD_CLAMP_FALL_EINT1
103 .mask = ARIZONA_MICD_CLAMP_RISE_EINT1
105 [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 },
106 [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 },
107 [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 },
108 [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 },
124 [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 },
125 [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 },
126 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
127 [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
[all …]
H A Dmax77541.c20 { .mask = MAX77541_BIT_INT_SRC_TOPSYS },
21 { .mask = MAX77541_BIT_INT_SRC_BUCK },
34 { .mask = MAX77541_BIT_TOPSYS_INT_TJ_120C },
35 { .mask = MAX77541_BIT_TOPSYS_INT_TJ_140C },
36 { .mask = MAX77541_BIT_TOPSYS_INT_TSHDN },
37 { .mask = MAX77541_BIT_TOPSYS_INT_UVLO },
38 { .mask = MAX77541_BIT_TOPSYS_INT_ALT_SWO },
39 { .mask = MAX77541_BIT_TOPSYS_INT_EXT_FREQ_DET },
52 { .mask = MAX77541_BIT_BUCK_INT_M1_POK_FLT },
53 { .mask = MAX77541_BIT_BUCK_INT_M2_POK_FLT },
[all …]
/linux/samples/bpf/
H A Dxdp_sample_user.h34 int __sample_init(int mask);
42 const char *doc, int mask, bool error);
83 static int sample_init(struct name *skel, int mask) \
86 ret = __sample_init(mask); \
89 if (mask & SAMPLE_REDIRECT_MAP_CNT) \
91 if (mask & SAMPLE_REDIRECT_CNT) \
93 if (mask & SAMPLE_REDIRECT_ERR_MAP_CNT) \
95 if (mask & SAMPLE_REDIRECT_ERR_CNT) \
97 if (mask & SAMPLE_CPUMAP_ENQUEUE_CNT) \
99 if (mask & SAMPLE_CPUMAP_KTHREAD_CNT) \
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/linux/drivers/comedi/drivers/
H A Ddt2817.c40 unsigned int mask; in dt2817_dio_insn_config() local
44 mask = 0x000000ff; in dt2817_dio_insn_config()
46 mask = 0x0000ff00; in dt2817_dio_insn_config()
48 mask = 0x00ff0000; in dt2817_dio_insn_config()
50 mask = 0xff000000; in dt2817_dio_insn_config()
52 ret = comedi_dio_insn_config(dev, s, insn, data, mask); in dt2817_dio_insn_config()
76 unsigned int mask; in dt2817_dio_insn_bits() local
79 mask = comedi_dio_update_state(s, data); in dt2817_dio_insn_bits()
80 if (mask) { in dt2817_dio_insn_bits()
81 if (mask & 0x000000ff) in dt2817_dio_insn_bits()
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/linux/drivers/edac/
H A Dedac_pci.h95 u8 mask) in pci_write_bits8() argument
97 if (mask != 0xff) { in pci_write_bits8()
101 value &= mask; in pci_write_bits8()
102 buf &= ~mask; in pci_write_bits8()
111 u16 value, u16 mask) in pci_write_bits16() argument
113 if (mask != 0xffff) { in pci_write_bits16()
117 value &= mask; in pci_write_bits16()
118 buf &= ~mask; in pci_write_bits16()
135 u32 value, u32 mask) in pci_write_bits32() argument
137 if (mask != 0xffffffff) { in pci_write_bits32()
[all …]
/linux/drivers/net/ethernet/mellanox/mlxbf_gige/
H A Dmlxbf_gige_mdio.c34 .mask = MLXBF2_GIGE_MDIO_GW_BUSY_MASK,
38 .mask = MLXBF2_GIGE_MDIO_GW_AD_MASK,
42 .mask = MLXBF2_GIGE_MDIO_GW_AD_MASK,
46 .mask = MLXBF2_GIGE_MDIO_GW_DEVAD_MASK,
50 .mask = MLXBF2_GIGE_MDIO_GW_PARTAD_MASK,
54 .mask = MLXBF2_GIGE_MDIO_GW_OPCODE_MASK,
58 .mask = MLXBF2_GIGE_MDIO_GW_ST1_MASK,
66 .mask = MLXBF3_GIGE_MDIO_GW_BUSY_MASK,
70 .mask = MLXBF3_GIGE_MDIO_GW_DATA_READ_MASK,
74 .mask = MLXBF3_GIGE_MDIO_GW_DATA_MASK,
[all …]
/linux/drivers/infiniband/hw/qib/
H A Dqib_twsi.c91 u32 mask; in scl_out() local
95 mask = 1UL << dd->gpio_scl_num; in scl_out()
98 dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask); in scl_out()
110 if (mask & dd->f_gpio_mod(dd, 0, 0, 0)) in scl_out()
123 u32 mask; in sda_out() local
125 mask = 1UL << dd->gpio_sda_num; in sda_out()
128 dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask); in sda_out()
137 u32 read_val, mask; in sda_in() local
140 mask = (1UL << bnum); in sda_in()
142 dd->f_gpio_mod(dd, 0, 0, mask); in sda_in()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramfuc.h18 u32 mask; member
23 ramfuc_stride(u32 addr, u32 stride, u32 mask) in ramfuc_stride() argument
29 .mask = mask, in ramfuc_stride()
41 .mask = 0x3, in ramfuc_reg2()
53 .mask = 0x1, in ramfuc_reg()
93 unsigned int mask, off = 0; in ramfuc_wr32() local
98 for (mask = reg->mask; mask > 0; mask = (mask & ~1) >> 1) { in ramfuc_wr32()
99 if (mask & 1) in ramfuc_wr32()
112 ramfuc_mask(struct ramfuc *ram, struct ramfuc_reg *reg, u32 mask, u32 data) in ramfuc_mask() argument
115 if (temp != ((temp & ~mask) | data) || reg->force) { in ramfuc_mask()
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/linux/arch/powerpc/include/asm/
H A Dbitops.h66 static inline void fn(unsigned long mask, \
78 : "rK" (mask), "r" (p) \
97 static inline void fn(unsigned long mask, volatile unsigned long *_p) \
103 __builtin_constant_p(mask) && is_rlwinm_mask_valid(~mask)) {\
111 : "n" (~mask), "r" (p) \
121 : "r" (mask), "r" (p) \
153 unsigned long mask, \
166 : "rK" (mask), "r" (p), "n" (eh) \
168 return (old & mask); \
178 static inline unsigned long test_and_clear_bits(unsigned long mask, volatile unsigned long *_p) in test_and_clear_bits() argument
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/linux/kernel/irq/
H A Dgeneric-chip.c41 u32 mask = d->mask; in irq_gc_mask_disable_reg() local
44 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
45 *ct->mask_cache &= ~mask; in irq_gc_mask_disable_reg()
61 u32 mask = d->mask; in irq_gc_mask_set_bit() local
64 *ct->mask_cache |= mask; in irq_gc_mask_set_bit()
65 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_set_bit()
81 u32 mask = d->mask; in irq_gc_mask_clr_bit() local
84 *ct->mask_cache &= ~mask; in irq_gc_mask_clr_bit()
85 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_clr_bit()
101 u32 mask = d->mask; in irq_gc_unmask_enable_reg() local
[all …]
/linux/drivers/soc/mediatek/
H A Dmtk-infracfg.c28 int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask, in mtk_infracfg_set_bus_protection() argument
35 regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, in mtk_infracfg_set_bus_protection()
36 mask); in mtk_infracfg_set_bus_protection()
38 regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_SET, mask); in mtk_infracfg_set_bus_protection()
41 val, (val & mask) == mask, in mtk_infracfg_set_bus_protection()
59 int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask, in mtk_infracfg_clear_bus_protection() argument
66 regmap_update_bits(infracfg, INFRA_TOPAXI_PROTECTEN, mask, 0); in mtk_infracfg_clear_bus_protection()
68 regmap_write(infracfg, INFRA_TOPAXI_PROTECTEN_CLR, mask); in mtk_infracfg_clear_bus_protection()
71 val, !(val & mask), in mtk_infracfg_clear_bus_protection()
/linux/drivers/net/ethernet/google/gve/
H A Dgve_flow_rule.c47 fsp->m_u.tcp_ip4_spec.ip4src = flow_rule->mask.src_ip[0]; in gve_fill_ethtool_flow_spec()
48 fsp->m_u.tcp_ip4_spec.ip4dst = flow_rule->mask.dst_ip[0]; in gve_fill_ethtool_flow_spec()
49 fsp->m_u.tcp_ip4_spec.psrc = flow_rule->mask.src_port; in gve_fill_ethtool_flow_spec()
50 fsp->m_u.tcp_ip4_spec.pdst = flow_rule->mask.dst_port; in gve_fill_ethtool_flow_spec()
51 fsp->m_u.tcp_ip4_spec.tos = flow_rule->mask.tos; in gve_fill_ethtool_flow_spec()
59 fsp->m_u.ah_ip4_spec.ip4src = flow_rule->mask.src_ip[0]; in gve_fill_ethtool_flow_spec()
60 fsp->m_u.ah_ip4_spec.ip4dst = flow_rule->mask.dst_ip[0]; in gve_fill_ethtool_flow_spec()
61 fsp->m_u.ah_ip4_spec.spi = flow_rule->mask.spi; in gve_fill_ethtool_flow_spec()
62 fsp->m_u.ah_ip4_spec.tos = flow_rule->mask.tos; in gve_fill_ethtool_flow_spec()
74 memcpy(fsp->m_u.tcp_ip6_spec.ip6src, &flow_rule->mask.src_ip, in gve_fill_ethtool_flow_spec()
[all …]
/linux/drivers/iio/magnetometer/
H A Dst_magn_core.c154 .mask = 0x1c,
168 .mask = 0x03,
174 .mask = 0xe0,
233 .mask = 0x1c,
247 .mask = 0x03,
253 .mask = 0xe0,
313 .mask = 0x1c,
327 .mask = 0x03,
333 .mask = 0x60,
359 .mask = 0x40,
[all …]
/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_filter.c46 static inline bool is_field_set(u32 val, u32 mask) in is_field_set() argument
48 return val || mask; in is_field_set()
51 static inline bool unsupported(u32 conf, u32 conf_mask, u32 val, u32 mask) in unsupported() argument
53 return !(conf & conf_mask) && is_field_set(val, mask); in unsupported()
57 unsigned int ftid, u16 word, u64 mask, u64 val, in set_tcb_field() argument
73 req->mask = cpu_to_be64(mask); in set_tcb_field()
122 unsigned int word, u64 mask, u64 val, in mk_set_tcb_ulp() argument
136 req->mask = cpu_to_be64(mask); in mk_set_tcb_ulp()
259 if (unsupported(fconf, FCOE_F, fs->val.fcoe, fs->mask.fcoe) || in validate_filter()
260 unsupported(fconf, PORT_F, fs->val.iport, fs->mask.iport) || in validate_filter()
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