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/linux/drivers/gpu/ipu-v3/
H A Dipu-ic.c141 const struct ic_task_bitfields *bit; member
278 ic_conf |= ic->bit->ic_conf_en; in ipu_ic_task_enable()
281 ic_conf |= ic->bit->ic_conf_rot_en; in ipu_ic_task_enable()
284 ic_conf |= ic->bit->ic_conf_csc1_en; in ipu_ic_task_enable()
287 ic_conf |= ic->bit->ic_conf_cmb_en; in ipu_ic_task_enable()
288 ic_conf |= ic->bit->ic_conf_csc1_en; in ipu_ic_task_enable()
291 ic_conf |= ic->bit->ic_conf_csc2_en; in ipu_ic_task_enable()
310 ic_conf &= ~(ic->bit->ic_conf_en | in ipu_ic_task_disable()
311 ic->bit->ic_conf_csc1_en | in ipu_ic_task_disable()
312 ic->bit->ic_conf_rot_en); in ipu_ic_task_disable()
[all …]
/linux/Documentation/driver-api/
H A Dioctl.rst18 the ioctl system call. While this can be any 32-bit number that uniquely
36 An 8-bit number, often a character literal, specific to a subsystem
40 An 8-bit number identifying the specific command, unique for a give
45 encodes the ``sizeof(data_type)`` value in a 13-bit or 14-bit integer,
90 move to 64-bit time_t.
101 requires an expensive 64-bit division, a simple __u64 nanosecond value
112 32-bit compat mode
115 In order to support 32-bit user space running on a 64-bit machine, each
126 On the s390 architecture, 31-bit user space has ambiguous representations
127 for data pointers, with the upper bit being ignored. When running such
[all …]
/linux/Documentation/trace/coresight/
H A Dcoresight-etm4x-reference.rst200 val is a 7 bit value for exception levels to exclude. Input
421 32 bit values made up of mask bytes, where mN represents a
520 Where evN is an 8 bit event field. Up to 4 event fields make up the
521 32-bit input value. Number of valid fields is implementation dependent,
548 Where evfield is an 8 bit event selector.
575 Where evBevF is a 16 bit value made up of two event selectors,
590 Where evfield is an 8 bit event selector.
658 **bit (0):**
669 **bit (4):**
688 **bit (5):**
[all …]
/linux/drivers/gpio/
H A Dgpio-sifive.c80 u32 bit = BIT(offset); in sifive_gpio_irq_enable() local
91 regmap_write(chip->regs, SIFIVE_GPIO_RISE_IP, bit); in sifive_gpio_irq_enable()
92 regmap_write(chip->regs, SIFIVE_GPIO_FALL_IP, bit); in sifive_gpio_irq_enable()
93 regmap_write(chip->regs, SIFIVE_GPIO_HIGH_IP, bit); in sifive_gpio_irq_enable()
94 regmap_write(chip->regs, SIFIVE_GPIO_LOW_IP, bit); in sifive_gpio_irq_enable()
120 u32 bit = BIT(offset); in sifive_gpio_irq_eoi() local
125 regmap_write(chip->regs, SIFIVE_GPIO_RISE_IP, bit); in sifive_gpio_irq_eoi()
126 regmap_write(chip->regs, SIFIVE_GPIO_FALL_IP, bit); in sifive_gpio_irq_eoi()
127 regmap_write(chip->regs, SIFIVE_GPIO_HIGH_IP, bit); in sifive_gpio_irq_eoi()
128 regmap_write(chip->regs, SIFIVE_GPIO_LOW_IP, bit); in sifive_gpio_irq_eoi()
H A Dgpio-aspeed.c313 u32 bit, reg; in aspeed_gpio_change_cmd_source() local
320 bit = BIT((bindex & 3) << 3); in aspeed_gpio_change_cmd_source()
325 reg |= bit; in aspeed_gpio_change_cmd_source()
327 reg &= ~bit; in aspeed_gpio_change_cmd_source()
333 reg |= bit; in aspeed_gpio_change_cmd_source()
335 reg &= ~bit; in aspeed_gpio_change_cmd_source()
509 u32 *bit, int *offset) in irqd_to_aspeed_gpio_data() argument
523 *bit = GPIO_BIT(*offset); in irqd_to_aspeed_gpio_data()
536 u32 bit; in aspeed_gpio_irq_ack() local
538 rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit, &offset); in aspeed_gpio_irq_ack()
[all …]
/linux/arch/mips/sgi-ip32/
H A Dip32-irq.c121 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_enable_irq() local
123 crime_mask |= 1 << bit; in crime_enable_irq()
129 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_disable_irq() local
131 crime_mask &= ~(1 << bit); in crime_disable_irq()
144 unsigned int bit = d->irq - CRIME_IRQ_BASE; in crime_edge_mask_and_ack_irq() local
149 crime_int &= ~(1 << bit); in crime_edge_mask_and_ack_irq()
308 unsigned int bit = d->irq - CRIME_IRQ_BASE; in enable_mace_irq() local
310 crime_mask |= (1 << bit); in enable_mace_irq()
316 unsigned int bit = d->irq - CRIME_IRQ_BASE; in disable_mace_irq() local
318 crime_mask &= ~(1 << bit); in disable_mace_irq()
/linux/Documentation/arch/x86/
H A Damd-memory-encryption.rst23 A page is encrypted when a page table entry has the encryption bit set (see
24 below on how to determine its position). The encryption bit can also be
27 bit in the page table entry that points to the next table. This allows the full
29 encryption bit is set in cr3, doesn't imply the full hierarchy is encrypted.
30 Each page table entry in the hierarchy needs to have the encryption bit set to
31 achieve that. So, theoretically, you could have the encryption bit set in cr3
32 so that the PGD is encrypted, but not set the encryption bit in the PGD entry
38 memory. Since the memory encryption bit is controlled by the guest OS when it
39 is operating in 64-bit or 32-bit PAE mode, in all other modes the SEV hardware
40 forces the memory encryption bit to 1.
[all …]
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.c70 unsigned int bit; in mtk_pmx_gpio_set_direction() local
74 bit = BIT(offset & pctl->devdata->mode_mask); in mtk_pmx_gpio_set_direction()
85 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); in mtk_pmx_gpio_set_direction()
92 unsigned int bit; in mtk_gpio_set() local
96 bit = BIT(offset & pctl->devdata->mode_mask); in mtk_gpio_set()
103 regmap_write(mtk_get_regmap(pctl, offset), reg_addr, bit); in mtk_gpio_set()
110 unsigned int bit; in mtk_pconf_set_ies_smt() local
140 bit = BIT(offset & pctl->devdata->mode_mask); in mtk_pconf_set_ies_smt()
147 regmap_write(mtk_get_regmap(pctl, pin), reg_addr, bit); in mtk_pconf_set_ies_smt()
156 unsigned int i, info_num, reg_addr, bit; in mtk_pconf_spec_set_ies_smt_range() local
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-class-led-driver-lm353367 bit 5 PWM-input enabled in Zone 4
68 bit 4 PWM-input enabled in Zone 3
69 bit 3 PWM-input enabled in Zone 2
70 bit 2 PWM-input enabled in Zone 1
71 bit 1 PWM-input enabled in Zone 0
72 bit 0 PWM-input enabled
H A Dconfigfs-usb-gadget-midi227 manufacturer Manufacture ID (24 bit)
28 family Device family ID (16 bit)
29 model Device model ID (16 bit)
30 sw_revision Software Revision (32 bit)
50 midi_ci_verison Supported MIDI-CI version number (8 bit)
52 sysex8_streams Max number of SysEx8 streams (8 bit)
/linux/drivers/input/keyboard/
H A Dadp5589-keys.c227 u8 (*bit) (u8 offset); member
288 .bit = adp5589_bit,
369 .bit = adp5585_bit,
393 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); in adp5589_gpio_get_value() local
397 bit); in adp5589_gpio_get_value()
405 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); in adp5589_gpio_set_value() local
410 kpad->dat_out[bank] |= bit; in adp5589_gpio_set_value()
412 kpad->dat_out[bank] &= ~bit; in adp5589_gpio_set_value()
424 unsigned int bit = kpad->var->bit(kpad->gpiomap[off]); in adp5589_gpio_direction_input() local
429 kpad->dir[bank] &= ~bit; in adp5589_gpio_direction_input()
[all …]
/linux/drivers/clk/mediatek/
H A Dclk-gate.c23 u8 bit; member
38 return val & BIT(cg->bit); in mtk_get_clockgating()
55 regmap_write(cg->regmap, cg->set_ofs, BIT(cg->bit)); in mtk_cg_set_bit()
62 regmap_write(cg->regmap, cg->clr_ofs, BIT(cg->bit)); in mtk_cg_clr_bit()
69 regmap_set_bits(cg->regmap, cg->sta_ofs, BIT(cg->bit)); in mtk_cg_set_bit_no_setclr()
76 regmap_clear_bits(cg->regmap, cg->sta_ofs, BIT(cg->bit)); in mtk_cg_clr_bit_no_setclr()
158 int clr_ofs, int sta_ofs, u8 bit, in mtk_clk_register_gate() argument
180 cg->bit = bit; in mtk_clk_register_gate()
/linux/fs/ufs/
H A Dutil.h343 #define ubh_blkmap(ubh,begin,bit) \ argument
344 …((*ubh_get_addr(ubh, (begin) + ((bit) >> 3)) >> ((bit) & 7)) & (0xff >> (UFS_MAXFRAG - uspi->s_fpb…
371 #define ubh_setbit(ubh,begin,bit) \ argument
372 (*ubh_get_addr(ubh, (begin) + ((bit) >> 3)) |= (1 << ((bit) & 7)))
374 #define ubh_clrbit(ubh,begin,bit) \ argument
375 (*ubh_get_addr (ubh, (begin) + ((bit) >> 3)) &= ~(1 << ((bit) & 7)))
377 #define ubh_isset(ubh,begin,bit) \ argument
378 (*ubh_get_addr (ubh, (begin) + ((bit) >> 3)) & (1 << ((bit) & 7)))
380 #define ubh_isclr(ubh,begin,bit) (!ubh_isset(ubh,begin,bit)) argument
411 unsigned bit, i; in find_last_zero_bit() local
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap54xx-clocks.dtsi20 ti,bit-shift = <8>;
43 ti,bit-shift = <10>;
166 ti,bit-shift = <24>;
195 ti,bit-shift = <23>;
346 ti,bit-shift = <23>;
441 ti,bit-shift = <4>;
461 ti,bit-shift = <8>;
472 ti,bit-shift = <11>;
481 ti,bit-shift = <24>;
491 ti,bit-shift = <26>;
[all …]
H A Dam35xx-clocks.dtsi13 ti,bit-shift = <1>;
21 ti,bit-shift = <9>;
29 ti,bit-shift = <2>;
37 ti,bit-shift = <10>;
45 ti,bit-shift = <0>;
53 ti,bit-shift = <8>;
61 ti,bit-shift = <3>;
/linux/arch/m68k/fpsp040/
H A Dround.S40 | The INEX bit of USER_FPSR will be set if the rounded result was
117 asll #1,%d0 |shift g-bit to c-bit
151 movel LOCAL_HI(%a0),%d2 |get word 2 for s-bit test
152 andil #0x0000003f,%d2 |s bit is the or of all other
163 movel LOCAL_LO(%a0),%d2 |get lower mantissa for s-bit test
164 andil #0x000001ff,%d2 |s bit is the or-ing of all
179 .set ad_1_sgl,0x00000100 | constant to add 1 to l-bit in sgl prec
180 .set ad_1_dbl,0x00000800 | constant to add 1 to l-bit in dbl prec
183 |Jump table for adding 1 to the l-bit indexed by rnd prec
196 roxrw LOCAL_HI(%a0) |shift v-bit back in
[all …]
/linux/sound/i2c/
H A Di2c.c159 if (bus->hw_ops.bit->start) in snd_i2c_bit_hw_start()
160 bus->hw_ops.bit->start(bus); in snd_i2c_bit_hw_start()
165 if (bus->hw_ops.bit->stop) in snd_i2c_bit_hw_stop()
166 bus->hw_ops.bit->stop(bus); in snd_i2c_bit_hw_stop()
171 if (bus->hw_ops.bit->direction) in snd_i2c_bit_direction()
172 bus->hw_ops.bit->direction(bus, clock, data); in snd_i2c_bit_direction()
177 bus->hw_ops.bit->setlines(bus, clock, data); in snd_i2c_bit_set()
183 if (bus->hw_ops.bit->getclock)
184 return bus->hw_ops.bit->getclock(bus);
191 return bus->hw_ops.bit->getdata(bus, ack); in snd_i2c_bit_data()
/linux/Documentation/misc-devices/
H A Disl29003.rst21 The ISL29003 is an integrated light sensor with a 16-bit integrating type
24 provides 16-bit resolution while rejecting 50Hz and 60Hz flicker caused by
27 The driver allows to set the lux range, the bit resolution, the operational
62 0: diode1's current (unsigned 16bit) (default)
63 1: diode1's current (unsigned 16bit)
64 2: difference between diodes (l1 - l2, signed 15bit)
/linux/Documentation/devicetree/bindings/dma/
H A Datmel-xdma.txt13 - bit 13: SIF, source interface identifier, used to get the memory
15 - bit 14: DIF, destination interface identifier, used to get the peripheral
17 - bit 30-24: PERID, peripheral identifier.
35 - bit 13: SIF, source interface identifier, used to get the memory
37 - bit 14: DIF, destination interface identifier, used to get the peripheral
39 - bit 30-24: PERID, peripheral identifier.
/linux/drivers/clk/pxa/
H A Dclk-pxa3xx.c220 #define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? CKENB : CKENA) argument
222 div_hp, bit, is_lp, flags) \ argument
223 PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp, \
224 mult_hp, div_hp, is_lp, CKEN_AB(bit), \
225 (CKEN_ ## bit % 32), flags)
226 #define PXA3XX_PBUS_CKEN(dev_id, con_id, bit, mult_lp, div_lp, \ argument
229 div_lp, mult_hp, div_hp, bit, pxa3xx_is_ring_osc_forced, 0)
230 #define PXA3XX_CKEN_1RATE(dev_id, con_id, bit, parents) \ argument
231 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
232 CKEN_AB(bit), (CKEN_ ## bit % 32), 0)
/linux/include/linux/ceph/
H A Dceph_features.h14 #define DEFINE_CEPH_FEATURE(bit, incarnation, name) \ argument
15 static const uint64_t __maybe_unused CEPH_FEATURE_##name = (1ULL<<bit); \
17 (1ULL<<bit | CEPH_FEATURE_INCARNATION_##incarnation);
20 #define DEFINE_CEPH_FEATURE_DEPRECATED(bit, incarnation, name, when) \ argument
21 static const uint64_t __maybe_unused DEPRECATED_CEPH_FEATURE_##name = (1ULL<<bit); \
23 (1ULL<<bit | CEPH_FEATURE_INCARNATION_##incarnation);
29 #define DEFINE_CEPH_FEATURE_RETIRED(bit, inc, name, unused, unadvertised) argument
/linux/Documentation/driver-api/media/drivers/
H A Dcx2341x-devel.rst75 0x44 - Write a bit here and shows up in Interrupt status 0x40
117 - 0x7000: LSB I2C write clock bit (inverted)
118 - 0x7004: LSB I2C write data bit (inverted)
119 - 0x7008: LSB I2C read clock bit
120 - 0x700c: LSB I2C read data bit
135 interrupt mask 0x0048. If a bit is cleared in the mask, then we want our ISR to
138 - bit 31 Encoder Start Capture
139 - bit 30 Encoder EOS
140 - bit 29 Encoder VBI capture
141 - bit 28 Encoder Video Input Module reset event
[all …]
/linux/arch/sh/boards/mach-highlander/
H A Dpsw.c34 if (mask & (1 << psw_info->bit)) { in psw_irq_handler()
35 psw->state = !!(mask & (1 << psw_info->bit)); in psw_irq_handler()
59 .bit = 6,
77 .bit = 5,
95 .bit = 4,
/linux/arch/arm/mach-omap2/
H A Dboard-n8x0.c280 int bit, *openp, index; in n8x0_mmc_callback() local
283 bit = 1 << 1; in n8x0_mmc_callback()
287 bit = 1; in n8x0_mmc_callback()
292 if (card_mask & bit) in n8x0_mmc_callback()
305 int r, bit, *openp; in n8x0_mmc_late_init() local
338 bit = 1 << 1; in n8x0_mmc_late_init()
341 bit = 1; in n8x0_mmc_late_init()
347 if (r == 0xf || r == (0xf & ~bit)) in n8x0_mmc_late_init()
350 if (r & bit) in n8x0_mmc_late_init()
/linux/Documentation/virt/kvm/devices/
H A Dxics.rst32 sources, each identified by a 20-bit source number, and a set of
41 KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls on the vcpu. The 64 bit
63 the interrupt source number. The 64 bit state word has the following
77 * Level sensitive flag, 1 bit
79 This bit is 1 for a level-sensitive interrupt source, or 0 for
82 * Masked flag, 1 bit
84 This bit is set to 1 if the interrupt is masked (cannot be delivered
88 * Pending flag, 1 bit
90 This bit is 1 if the source has a pending interrupt, otherwise 0.

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