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/linux/sound/soc/fsl/
H A Dfsl_spdif.cdiff 34dcdebecf2f05e1b275e1da8352f8e4c1aab6f6 Fri Jul 01 11:32:37 CEST 2022 Shengjiu Wang <shengjiu.wang@nxp.com> ASoC: fsl_spdif: Add support for PLL switch at runtime.

i.MX8MQ/MN/MM/MP platforms typically have 2 AUDIO PLLs being
configured to handle 8kHz and 11kHz series audio rates.

The patch implements the functionality to select at runtime
the appropriate AUDIO PLL as function of audio file rate.
As the clock parent may be changed, need to probe txclk
according to sample rate again.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1656667961-1799-3-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
H A DKconfigdiff 34dcdebecf2f05e1b275e1da8352f8e4c1aab6f6 Fri Jul 01 11:32:37 CEST 2022 Shengjiu Wang <shengjiu.wang@nxp.com> ASoC: fsl_spdif: Add support for PLL switch at runtime.

i.MX8MQ/MN/MM/MP platforms typically have 2 AUDIO PLLs being
configured to handle 8kHz and 11kHz series audio rates.

The patch implements the functionality to select at runtime
the appropriate AUDIO PLL as function of audio file rate.
As the clock parent may be changed, need to probe txclk
according to sample rate again.

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1656667961-1799-3-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>