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/freebsd/sys/arm64/arm64/
H A Dbus_space_asm.S53 cbz x4, 2f
60 * x4 = Count
66 subs x4, x4, #1
74 cbz x4, 2f
81 * x4 = Count
87 subs x4, x4, #1
95 cbz x4, 2f
102 * x4 = Count
108 subs x4, x4, #1
116 cbz x4, 2f
[all …]
H A Dswtch.S83 ldr x4, [x0, #TD_PCB]
84 ldr w5, [x4, #PCB_FLAGS]
107 mov x4, x0
115 ldr w5, [x4, #PCB_FLAGS]
119 ldp x5, x6, [x4, #PCB_SP]
122 ldr x6, [x4, #PCB_TPIDRRO]
124 ldp x19, x20, [x4, #PCB_REGS + (PCB_X19 + 0) * 8]
125 ldp x21, x22, [x4, #PCB_REGS + (PCB_X19 + 2) * 8]
126 ldp x23, x24, [x4, #PCB_REGS + (PCB_X19 + 4) * 8]
127 ldp x25, x26, [x4, #PCB_REGS + (PCB_X19 + 6) * 8]
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx53-kp-ddc.dts108 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x4
109 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x4
110 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x4
111 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x4
112 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x4
113 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x4
114 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x4
115 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x4
116 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x4
117 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x4
[all …]
H A Dimx6sl-pinfunc.h17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
25 #define MX6SL_PAD_AUD_RXC__I2C3_SDA 0x050 0x2a8 0x730 0x4 0x0
33 #define MX6SL_PAD_AUD_RXD__SD1_LCTL 0x054 0x2ac 0x000 0x4 0x0
40 #define MX6SL_PAD_AUD_RXFS__I2C3_SCL 0x058 0x2b0 0x72c 0x4 0x0
48 #define MX6SL_PAD_AUD_TXC__SD2_LCTL 0x05c 0x2b4 0x000 0x4 0x0
55 #define MX6SL_PAD_AUD_TXD__SD4_LCTL 0x060 0x2b8 0x000 0x4 0x0
62 #define MX6SL_PAD_AUD_TXFS__SD3_LCTL 0x064 0x2bc 0x000 0x4 0x0
69 #define MX6SL_PAD_ECSPI1_MISO__SD2_WP 0x068 0x358 0x834 0x4 0x0
76 #define MX6SL_PAD_ECSPI1_MOSI__SD2_VSELECT 0x06c 0x35c 0x000 0x4 0x0
83 #define MX6SL_PAD_ECSPI1_SCLK__SD2_RESET 0x070 0x360 0x000 0x4 0x0
[all …]
H A Dimxrt1050-pinfunc.h21 #define MXRT1050_IOMUXC_GPIO_EMC_00_FLEXIO1_D00 0x014 0x204 0x000 0x4 0x0
28 #define MXRT1050_IOMUXC_GPIO_EMC_01_FLEXIO1_D01 0x018 0x208 0x000 0x4 0x0
35 #define MXRT1050_IOMUXC_GPIO_EMC_02_FLEXIO1_D02 0x01C 0x20C 0x000 0x4 0x0
42 #define MXRT1050_IOMUXC_GPIO_EMC_03_FLEXIO1_D03 0x020 0x210 0x000 0x4 0x0
49 #define MXRT1050_IOMUXC_GPIO_EMC_04_FLEXIO1_D04 0x024 0x214 0x000 0x4 0x0
56 #define MXRT1050_IOMUXC_GPIO_EMC_05_FLEXIO1_D05 0x028 0x218 0x000 0x4 0x0
63 #define MXRT1050_IOMUXC_GPIO_EMC_06_FLEXIO1_D06 0x02C 0x21C 0x000 0x4 0x0
70 #define MXRT1050_IOMUXC_GPIO_EMC_07_FLEXIO1_D07 0x030 0x220 0x000 0x4 0x0
77 #define MXRT1050_IOMUXC_GPIO_EMC_08_FLEXIO1_D08 0x034 0x224 0x000 0x4 0x0
84 #define MXRT1050_IOMUXC_GPIO_EMC_09_FLEXIO1_D09 0x038 0x228 0x000 0x4 0x0
[all …]
H A Dimx7d-pinfunc.h18 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0
23 #define MX7D_PAD_LPSR_GPIO1_IO01__ANATOP_24M_OUT 0x0004 0x0034 0x0000 0x4 0x0
43 #define MX7D_PAD_LPSR_GPIO1_IO04__UART5_DTE_RTS 0x0010 0x0040 0x0710 0x3 0x4
44 #define MX7D_PAD_LPSR_GPIO1_IO04__I2C1_SCL 0x0010 0x0040 0x05D4 0x4 0x2
51 #define MX7D_PAD_LPSR_GPIO1_IO05__I2C1_SDA 0x0014 0x0044 0x05D8 0x4 0x2
56 #define MX7D_PAD_LPSR_GPIO1_IO06__UART5_DCE_RX 0x0018 0x0048 0x0714 0x3 0x4
58 #define MX7D_PAD_LPSR_GPIO1_IO06__I2C2_SCL 0x0018 0x0048 0x05DC 0x4 0x2
66 #define MX7D_PAD_LPSR_GPIO1_IO07__I2C2_SDA 0x001C 0x004C 0x05E0 0x4 0x2
74 #define MX7D_PAD_GPIO1_IO08__I2C3_SCL 0x0014 0x026C 0x05E4 0x4 0x0
82 #define MX7D_PAD_GPIO1_IO09__I2C3_SDA 0x0018 0x0270 0x05E8 0x4 0x0
[all …]
H A Dimx6sll-pinfunc.h23 #define MX6SLL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x0018 0x02E0 0x05AC 0x4 0x0
30 #define MX6SLL_PAD_REF_CLK_32K__SD1_LCTL 0x001C 0x02E4 0x0000 0x4 0x0
36 #define MX6SLL_PAD_PWM1__CSI_MCLK 0x0020 0x02E8 0x0000 0x4 0x0
42 #define MX6SLL_PAD_KEY_COL0__SD1_CD_B 0x0024 0x02EC 0x0770 0x4 0x1
47 #define MX6SLL_PAD_KEY_ROW0__SD1_WP 0x0028 0x02F0 0x0774 0x4 0x1
52 #define MX6SLL_PAD_KEY_COL1__SD3_DATA4 0x002C 0x02F4 0x0784 0x4 0x0
58 #define MX6SLL_PAD_KEY_ROW1__SD3_DATA5 0x0030 0x02F8 0x0788 0x4 0x0
64 #define MX6SLL_PAD_KEY_COL2__SD3_DATA6 0x0034 0x02FC 0x078C 0x4 0x0
70 #define MX6SLL_PAD_KEY_ROW2__SD3_DATA7 0x0038 0x0300 0x0790 0x4 0x0
193 #define MX6SLL_PAD_EPDC_DATA12__UART2_DCE_RX 0x0094 0x035C 0x074C 0x1 0x4
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp-pinfunc.h52 #define MX8MP_IOMUXC_GPIO1_IO08__ENET_QOS_1588_EVENT0_AUX_IN 0x034 0x294 0x000 0x4 0x0
58 #define MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B 0x038 0x298 0x000 0x4 0x0
66 #define MX8MP_IOMUXC_GPIO1_IO11__USDHC3_VSELECT 0x040 0x2A0 0x000 0x4 0x0
76 #define MX8MP_IOMUXC_GPIO1_IO14__USDHC3_CD_B 0x04C 0x2AC 0x608 0x4 0x0
81 #define MX8MP_IOMUXC_GPIO1_IO15__USDHC3_WP 0x050 0x2B0 0x634 0x4 0x0
158 #define MX8MP_IOMUXC_SD1_CLK__UART1_DCE_TX 0x08C 0x2EC 0x000 0x4 0x0
159 #define MX8MP_IOMUXC_SD1_CLK__UART1_DTE_RX 0x08C 0x2EC 0x5E8 0x4 0x0
164 #define MX8MP_IOMUXC_SD1_CMD__UART1_DCE_RX 0x090 0x2F0 0x5E8 0x4 0x1
165 #define MX8MP_IOMUXC_SD1_CMD__UART1_DTE_TX 0x090 0x2F0 0x000 0x4 0x0
170 #define MX8MP_IOMUXC_SD1_DATA0__UART1_DCE_RTS 0x094 0x2F4 0x5E4 0x4 0x0
[all …]
H A Dimx93-pinfunc.h16 #define MX93_PAD_DAP_TDI__FLEXIO2_FLEXIO30 0x0000 0x01B0 0x0000 0x4 0x0
20 #define MX93_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31 0x0004 0x01B4 0x0000 0x4 0x0
24 #define MX93_PAD_DAP_TCLK_SWCLK__FLEXIO1_FLEXIO30 0x0008 0x01B8 0x0000 0x4 0x0
30 #define MX93_PAD_DAP_TDO_TRACESWO__FLEXIO1_FLEXIO31 0x000C 0x01BC 0x0000 0x4 0x0
37 #define MX93_PAD_GPIO_IO00__LPSPI6_PCS0 0x0010 0x01C0 0x0000 0x4 0x0
45 #define MX93_PAD_GPIO_IO01__LPSPI6_SIN 0x0014 0x01C4 0x0000 0x4 0x0
53 #define MX93_PAD_GPIO_IO02__LPSPI6_SOUT 0x0018 0x01C8 0x0000 0x4 0x0
61 #define MX93_PAD_GPIO_IO03__LPSPI6_SCK 0x001C 0x01CC 0x0000 0x4 0x0
69 #define MX93_PAD_GPIO_IO04__LPSPI7_PCS0 0x0020 0x01D0 0x0000 0x4 0x0
77 #define MX93_PAD_GPIO_IO05__LPSPI7_SIN 0x0024 0x01D4 0x0000 0x4 0x0
[all …]
H A Dimx8mn-pinfunc.h57 …ne MX8MN_IOMUXC_GPIO1_IO09_USDHC3_RESET_B 0x04C 0x2B4 0x000 0x4 0x0
65 …ne MX8MN_IOMUXC_GPIO1_IO11_USDHC3_VSELECT 0x054 0x2BC 0x000 0x4 0x0
77 …ne MX8MN_IOMUXC_GPIO1_IO14_USDHC3_CD_B 0x060 0x2C8 0x598 0x4 0x2
81 …ne MX8MN_IOMUXC_GPIO1_IO15_USDHC3_WP 0x064 0x2CC 0x5B8 0x4 0x2
87 …ne MX8MN_IOMUXC_ENET_MDC_SPDIF1_OUT 0x068 0x2D0 0x000 0x4 0x0
93 …ne MX8MN_IOMUXC_ENET_MDIO_SPDIF1_IN 0x06C 0x2D4 0x5CC 0x4 0x1
99 …ne MX8MN_IOMUXC_ENET_TD3_SPDIF1_EXT_CLK 0x070 0x2D8 0x568 0x4 0x1
161 …ne MX8MN_IOMUXC_SD1_CLK_UART1_DCE_TX 0x0A0 0x308 0x000 0x4 0x0
162 …ne MX8MN_IOMUXC_SD1_CLK_UART1_DTE_RX 0x0A0 0x308 0x4F4 0x4 0x4
166 …ne MX8MN_IOMUXC_SD1_CMD_UART1_DCE_RX 0x0A4 0x30C 0x4F4 0x4 0x5
[all …]
/freebsd/sys/crypto/openssl/aarch64/
H A Decp_sm2p256-armv8.S176 mov x4,x8
192 csel x8,x8,x4,cs
207 mov x4,x8
223 csel x8,x8,x4,cs
261 mov x4,x8
267 sbcs x4,x4,x12
274 csel x8,x8,x4,cc
311 mov x4,x8
317 adcs x4,x4,x12
324 csel x8,x8,x4,eq
[all …]
H A Dpoly1305-armv8.S77 ldp x4,x5,[x0] // load hash value
91 adds x4,x4,x10 // accumulate input
94 mul x12,x4,x7 // h0*r0
96 umulh x13,x4,x7
102 mul x10,x4,x8 // h0*r1
104 umulh x14,x4,x8
122 adds x4,x12,x10
128 stp x4,x5,[x0] // store hash value
142 ldp x4,x5,[x0] // load hash base 2^64
146 adds x12,x4,#5 // compare to modulus
[all …]
/freebsd/lib/libc/aarch64/string/
H A Dtimingsafe_memcmp.S58 bfi x4, x6, #32, #32
60 rev x4, x4
61 cmp x3, x4
67 ldr x4, [x1]
71 cmp x3, x4 // mismatch in first pair?
73 csel x4, x4, x6, ne
75 rev x4, x4
76 cmp x3, x4
82 .Lgt16: ldp x3, x4, [x0], #16
85 csel x3, x3, x4, ne // use second pair if first pair equal
[all …]
H A Dmemccpy.S50 add x4, x9, x8 // dst + cnt
77 add x4, x9, x8
132 fmov x4, d2
136 orr x8, x4, x5 // insert match in mask at limit
152 tst x4, x5 // terminator encountered inside buffer?
177 lsl x4, x12, #2 // shift 0xf to the limits position
178 lsl x4, x6, x4
181 csel x4, x4, xzr, lo
182 orr x5, x5, x4 // insert match in mask at limit
195 lsl x4, x12, #2
[all …]
H A Dstrncmp.S34 add x4, x1, #16
36 eor x4, x4, x1 // bits that changed
37 orr x3, x3, x4 // in either str1 or str2
48 lsl x4, x13, x15
73 tst x6, x4
122 lsl x4, x13, x15
158 tst x6, x4
180 lsl x4, x2, #2
181 lsl x4, x13, x4
182 orn x5, x4, x5 // mismatch or NUL byte?
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear13xx.dtsi88 interrupts = <0 28 0x4>;
95 interrupts = <0 29 0x4>;
104 interrupts = <0 19 0x4>;
121 interrupts = <0 59 0x4>;
144 interrupts = <0 20 0x4>,
145 <0 21 0x4>,
146 <0 22 0x4>,
147 <0 23 0x4>;
155 interrupts = <0 33 0x4>,
156 <0 34 0x4>;
[all...]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dxgene-pci-msi.txt28 interrupts = <0x0 0x10 0x4>
29 <0x0 0x11 0x4>
30 <0x0 0x12 0x4>
31 <0x0 0x13 0x4>
32 <0x0 0x14 0x4>
33 <0x0 0x15 0x4>
34 <0x0 0x16 0x4>
35 <0x0 0x17 0x4>
36 <0x0 0x18 0x4>
37 <0x0 0x19 0x4>
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/apm/
H A Dapm-storm.dtsi269 csr-offset = <0x4>;
283 csr-offset = <0x4>;
297 csr-offset = <0x4>;
310 csr-offset = <0x4>;
323 csr-offset = <0x4>;
336 csr-offset = <0x4>;
432 interrupts = < 0x0 0x10 0x4
433 0x0 0x11 0x4
434 0x0 0x12 0x4
435 0x0 0x13 0x4
[all …]
/freebsd/contrib/arm-optimized-routines/math/
H A Dpoly_generic.h27 static inline VTYPE VWRAP (estrin_4) (VTYPE x, VTYPE x2, VTYPE x4, in VWRAP()
31 return FMA (poly[4], x4, p03); in VWRAP()
33 static inline VTYPE VWRAP (estrin_5) (VTYPE x, VTYPE x2, VTYPE x4, in VWRAP()
38 return FMA (p45, x4, p03); in VWRAP()
40 static inline VTYPE VWRAP (estrin_6) (VTYPE x, VTYPE x2, VTYPE x4, in VWRAP()
46 return FMA (p46, x4, p03); in VWRAP()
48 static inline VTYPE VWRAP (estrin_7) (VTYPE x, VTYPE x2, VTYPE x4, in VWRAP()
53 return FMA (p47, x4, p03); in VWRAP()
55 static inline VTYPE VWRAP (estrin_8) (VTYPE x, VTYPE x2, VTYPE x4, VTYPE x8, in VWRAP()
58 return FMA (poly[8], x8, VWRAP (estrin_7) (x, x2, x4, poly)); in VWRAP()
[all …]
/freebsd/sys/dev/bxe/
H A D57712_int_offsets.h46 …{ 0x4, 0x0, 0x0, 0x0, 0x0}, // COMMON_INBOUND_INTERRUPT_TEST_AGG_INT_3_RE…
64 { 0x9c08, 0x4, 0x0, 0x0, 0x4}, // XSTORM_HIGIG_HDR_LENGTH_OFFSET(portId)
65 { 0xc080, 0x10, 0x0, 0x0, 0x4}, // XSTORM_VF_SPQ_PAGE_BASE_OFFSET(vfId)
68 { 0x9338, 0x1, 0x4, 0x0, 0x1}, // XSTORM_JUMBO_SUPPORT_OFFSET(pfId)
87 { 0x4, 0x0, 0x0, 0x0, 0x0}, // PAUSE_TEST_XOFF_PORT0_KUKUE_CODE_OPPCOE
161 { 0x17b0, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_LO_OFFSET
162 { 0x17b4, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_ADDRESS_HI_OFFSET
163 { 0x17b8, 0x0, 0x0, 0x0, 0x4}, // TSTORM_PCI_READ_TEST_RAM_ADDRESS_OFFSET
175 …{ 0xe200, 0x8, 0x20, 0x0, 0x4}, // CSTORM_HC_SYNC_LINE_DHC_OFFSET(sbSyncLines…
187 { 0x4000, 0x20, 0x4, 0x0, 0x10}, // CSTORM_BYTE_COUNTER_OFFSET(sbId,dhcIndex)
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dkatmai.dts74 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
86 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
98 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
122 ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
123 0x4 0x00200000 0x4 0x00200000 0x00000400
124 0x4 0xe0000000 0x4 0xe0000000 0x20000000
145 interrupts = <0x0 0x1 0x2 0x3 0x4>;
149 interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
150 /*RXEOB*/ 0x1 &UIC1 0x7 0x4
151 /*SERR*/ 0x2 &UIC1 0x1 0x4
[all …]
H A Dtaishan.dts73 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
86 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
98 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
149 interrupts = <0x0 0x1 0x2 0x3 0x4>;
153 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
154 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
155 /*SERR*/ 0x2 &UIC1 0x0 0x4
156 /*TXDE*/ 0x3 &UIC1 0x1 0x4
157 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
171 interrupts = <0x7 0x4>;
[all …]
H A Dicon.dts70 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
82 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
94 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
118 ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
119 0x4 0x00200000 0x4 0x00200000 0x00000400
120 0x4 0xe0000000 0x4 0xe0000000 0x20000000
141 interrupts = <0x0 0x1 0x2 0x3 0x4>;
145 interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
146 /*RXEOB*/ 0x1 &UIC1 0x7 0x4
147 /*SERR*/ 0x2 &UIC1 0x1 0x4
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8568mds.dts30 0x4 0x0 0xf8008000 0x00008000
128 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
129 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
130 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
131 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
132 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */
133 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */
134 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */
135 0x4 0x14 0x1 0x0 0x2 0x0 /* TxD7 */
136 0x4 0xf 0x2 0x0 0x2 0x0 /* RxD0 */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam437x-l4.dtsi39 reg = <0x0 0x4>;
61 reg = <0xf0000 0x4>;
144 reg = <0x7000 0x4>,
145 <0x7010 0x4>,
146 <0x7114 0x4>;
178 reg = <0x9050 0x4>,
179 <0x9054 0x4>,
180 <0x9058 0x4>;
237 reg = <0xd000 0x4>,
238 <0xd010 0x4>;
[all...]

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