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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC CPM Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc885-tsa
[all …]
H A Dfsl,qe-tsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-tsa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PowerQUICC QE Time-slot assigner (TSA) controller
10 - Herve Codina <herve.codina@bootlin.com>
13 The TSA is the time-slot assigner that can be found on some PowerQUICC SoC.
14 Its purpose is to route some TDM time-slots to other internal serial
20 - enum:
21 - fsl,mpc8321-tsa
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/linux/drivers/soc/fsl/qe/
H A Dtsa.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/soc/cpm1-fsl,tsa.h>
12 #include <dt-bindings/soc/qe-fsl,tsa.h>
27 #define TSA_CPM1_SIRAM_ENTRY_CNT(x) FIELD_PREP(TSA_CPM1_SIRAM_ENTRY_CNT_MASK, x) argument
40 #define TSA_QE_SIRAM_ENTRY_CNT(x) FIELD_PREP(TSA_QE_SIRAM_ENTRY_CNT_MASK, x) argument
51 * - CPM1: 32bit register split in 2*16bit (16bit TDM)
52 * - QE: 4x16bit registers, one per TDM
62 #define TSA_CPM1_SIMODE_TDMA(x) FIELD_PREP(TSA_CPM1_SIMODE_TDMA_MASK, x) argument
64 #define TSA_CPM1_SIMODE_TDMB(x) FIELD_PREP(TSA_CPM1_SIMODE_TDMB_MASK, x) argument
66 #define TSA_QE_SIMODE_TDM_SAD(x) FIELD_PREP(TSA_QE_SIMODE_TDM_SAD_MASK, x) argument
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/linux/drivers/net/dsa/sja1105/
H A Dsja1105_ptp.c1 // SPDX-License-Identifier: GPL-2.0
7 /* The adjfine API clamps ppb between [-32,768,000, 32,768,000], and
8 * therefore scaled_ppm between [-2,147,483,648, 2,147,483,647].
11 * Percentually speaking, this is a +/- 0.032x adjustment of the
12 * free-running counter (0.968x to 1.032x).
20 * one-shot toggle (no return to level) on the PTP_CLK pin. When used as a
29 /* This range is actually +/- SJA1105_MAX_ADJ_PPB
30 * divided by 1000 (ppb -> ppm) and with a 16-bit
34 * Convert scaled_ppm from the +/- ((10^6) << 16) range
35 * into the +/- (1 << 31) range.
[all …]
/linux/drivers/memory/samsung/
H A Dexynos5422-dmc.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/devfreq-event.h>
101 * struct dmc_opp_table - Operating level desciption
113 * struct exynos5_dmc - main structure describing DMC device
196 __val = (t_val) << (timing)->bit_beg; \
220 TIMING_FIELD("tW2W-C2C", 14, 14),
221 TIMING_FIELD("tR2R-C2C", 12, 12),
243 for (i = 0; i < dmc->num_counters; i++) { in exynos5_counters_set_event()
244 if (!dmc->counter[i]) in exynos5_counters_set_event()
246 ret = devfreq_event_set_event(dmc->counter[i]); in exynos5_counters_set_event()
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/linux/net/ipv4/
H A Droute.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * ROUTE - implementation of the IP router.
48 * Andi Kleen : Load-limit warning messages.
215 seq_printf(seq, "%-127s\n", in rt_cache_seq_show()
236 for (cpu = *pos-1; cpu < nr_cpu_ids; ++cpu) { in rt_cpu_seq_start()
274 seq_printf(seq, "%08x %08x %08x %08x %08x %08x %08x " in rt_cpu_seq_show()
275 "%08x %08x %08x %08x %08x %08x " in rt_cpu_seq_show()
276 "%08x %08x %08x %08x\n", in rt_cpu_seq_show()
278 0, /* st->in_hit */ in rt_cpu_seq_show()
279 st->in_slow_tot, in rt_cpu_seq_show()
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H A Dtcp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Corey Minyard <wf-rch!minyard@relay.EU.net>
13 * Florian La Roche, <flla@stud.uni-sb.de>
25 * sk->inuse=1 and was trying to connect
51 * Alan Cox : sk->keepopen now seems to work
53 * Alan Cox : Fixed assorted sk->rqueue->next errors
63 * Alan Cox : FIN with no memory -> CRASH
113 * Alan Cox : Changed the semantics of sk->socket to
164 * Matt Day : poll()->select() match BSD precisely on error
166 * Marc Tamsky : Various sk->prot->retransmits and
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