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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dsamsung-pinctrl.txt1 Samsung GPIO and Pin Mux/Config controller
3 Samsung's ARM based SoC's integrates a GPIO and Pin mux/config hardware
6 on-chip controllers onto these pads.
9 - compatible: should be one of the following.
10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller,
11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller,
12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller,
13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller,
14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller,
15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller,
[all …]
H A Dsamsung,pinctrl-wakeup-interrupt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-wakeu
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H A Dsamsung,pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung S3C/S5P/Exynos SoC pin controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
12 - Tomasz Figa <tomasz.figa@gmail.com>
15 This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
18 All the pin controller nodes should be represented in the aliases node using
22 - External GPIO interrupts (see interrupts property in pin controller node);
[all …]
H A Dste,nomadik.txt4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
7 (these have the register ranges used by the pin controller).
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
12 phrase "pin configuration node".
14 ST Ericsson's pin configuration nodes act as a container for an arbitrary number of
16 pin, a group, or a list of pins or groups. This configuration can include the
17 mux function to select on those pin(s)/group(s), and various pin configuration
[all …]
H A Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
23 uart1(cts), lcd-spi(cs1), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
41 ac97-1(sysclko)
44 mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso),
46 mpp21 21 gpio, sdio0(wp), sdio1(wp), spi1(cs), lcd-spi(cs0),
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmarvell-bt-8xxx.txt2 ------
9 - compatible : should be one of the following:
10 * "marvell,sd8897-bt" (for SDIO)
11 * "marvell,sd8997-bt" (for SDIO)
16 - marvell,cal-data: Calibration data downloaded to the device during
20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
21 firmware will use the pin to wakeup host system (u16).
22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
25 - interrupt-names: Used only for USB based devices (See below)
26 - interrupts : specifies the interrupt pin number to the cpu. For SDIO, the
[all …]
H A Dbroadcom-bluetooth.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/broadcom-bluetooth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 This binding describes Broadcom UART-attached bluetooth chips.
18 - items:
19 - enum:
20 - infineon,cyw43439-bt
21 - const: brcm,bcm4329-bt
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dmarvell-8xxx.txt2 ------
10 - compatible : should be one of the following:
21 - marvell,caldata* : A series of properties with marvell,caldata prefix,
23 initialization. This is an array of unsigned 8-bit values.
26 "marvell,caldata-txpwrlimit-2g" (length = 566).
27 "marvell,caldata-txpwrlimit-5g-sub0" (length = 502).
28 "marvell,caldata-txpwrlimit-5g-sub1" (length = 688).
29 "marvell,caldata-txpwrlimit-5g-sub2" (length = 750).
30 "marvell,caldata-txpwrlimit-5g-sub3" (length = 502).
31 - marvell,wakeup-pin : a wakeup pin number of wifi chip which will be configured
[all …]
H A Dmarvell,sd8787.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
11 - Frank Li <Frank.Li@nxp.com>
21 - marvell,sd8787
22 - marvell,sd8897
23 - marvell,sd8978
24 - marvell,sd8997
25 - nxp,iw416
[all …]
/freebsd/sys/contrib/device-tree/Bindings/rtc/
H A Disil,isl12057.txt8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
13 RTC alarm rings. In order to mark the device has a wakeup source and
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
20 - "compatible": must be "isil,isl12057"
21 - "reg": I2C bus address of the device
25 - "wakeup-source": mark the chip as a wakeup source, independently of
29 Example isl12057 node without IRQ#2 pin connected (no alarm support):
37 Example isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note
[all …]
H A Dingenic,rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: rtc.yaml#
14 - if:
20 - ingenic,jz4770-rtc
21 - ingenic,jz4780-rtc
24 "#clock-cells": false
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dwkup-m3-ipc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/ti/wkup-m3-ipc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Wakeup M3 IPC device
10 - Dave Gerlach <d-gerlach@ti.com>
11 - Drew Fustini <dfustini@baylibre.com>
14 The TI AM33xx and AM43xx family of devices use a small Cortex M3 co-processor
15 (commonly referred to as Wakeup M3 or CM3) to help with various low power tasks
17 C-states for CPU Idle. Once the wkup_m3_ipc driver uses the wkup_m3_rproc driver
[all …]
/freebsd/sys/contrib/device-tree/Bindings/gnss/
H A Dsirfstar.txt1 SiRFstar-based GNSS Receiver DT binding
3 SiRFstar chipsets are used in GNSS-receiver modules produced by several
11 - compatible : Must be one of
19 - vcc-supply : Main voltage regulator (pin name: 3V3_IN, VCC, VDD)
22 - reg : I2C slave address
25 - reg : SPI chip select address
29 - sirf,onoff-gpios : GPIO used to power on and off device (pin name: ON_OFF)
30 - sirf,wakeup-gpios : GPIO used to determine device power state
31 (pin name: RFPWRUP, WAKEUP)
32 - timepulse-gpios : Time pulse GPIO (pin name: 1PPS, TM)
[all …]
H A Dsirfstar.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Johan Hovold <johan@kernel.org>
23 - $ref: gnss-common.yaml#
24 - $ref: /schemas/serial/serial-peripheral-props.yaml#
29 - csr,gsd4t
30 - csr,csrg05ta03-icje-r
31 - fastrax,uc430
32 - linx,r4
[all …]
/freebsd/sys/contrib/device-tree/Bindings/input/
H A Dnvidia,tegra20-kbc.txt2 The key controller has maximum 24 pins to make matrix keypad. Any pin
3 can be configured as row or column. The maximum column pin can be 8
7 - compatible: "nvidia,tegra20-kbc"
8 - reg: Register base address of KBC.
9 - interrupts: Interrupt number for the KBC.
10 - nvidia,kbc-row-pins: The KBC pins which are configured as row. This is an
11 array of pin numbers which is used as rows.
12 - nvidia,kbc-col-pins: The KBC pins which are configured as column. This is an
13 array of pin numbers which is used as column.
14 - linux,keymap: The keymap for keys as described in the binding document
[all …]
H A Datmel,maxtouch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nick Dyer <nick@shmanahar.org>
11 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: input.yaml#
30 vdda-supply:
34 vdd-supply:
38 reset-gpios:
41 Optional GPIO specifier for the touchscreen's reset pin
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/
H A Dgs101-oriole.dts1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "gs101-pinctrl.h"
18 compatible = "google,gs101-oriole", "google,gs101";
27 stdout-path = &serial_0;
30 gpio-keys {
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/bluetooth/
H A Dbrcm,bluetooth.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 This binding describes Broadcom UART-attached bluetooth chips.
18 - items:
19 - enum:
20 - infineon,cyw43439-bt
21 - const: brcm,bcm4329-bt
22 - enum:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
15 (Enable/Fail), Enable pin t
[all...]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
[all …]
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2
[all...]
H A Dexynos4210-universal_c210.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
39 fixed-rate-clock
[all...]
/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dbrcm,brcmstb-gpio.txt3 The controller's registers are organized as sets of eight 32-bit
9 - compatible:
10 Must be "brcm,brcmstb-gpio"
12 - reg:
16 - #gpio-cells:
17 Should be <2>. The first cell is the pin number (within the controller's
18 pin space), and the second is used for the following:
19 bit[0]: polarity (0 for active-high, 1 for active-low)
21 - gpio-controller:
24 - brcm,gpio-bank-widths:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/input/touchscreen/
H A Dsis_i2c.txt4 - compatible: must be "sis,9200-ts"
5 - reg: i2c slave address
6 - interrupts: touch controller interrupt (see interrupt
10 - pinctrl-names: should be "default" (see pinctrl binding [1]).
11 - pinctrl-0: a phandle pointing to the pin settings for the
13 - attn-gpios: the gpio pin used as attention line
14 - reset-gpios: the gpio pin used to reset the controller
15 - wakeup-source: touchscreen can be used as a wakeup source
17 [0]: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
18 [1]: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
[all …]
H A Degalax-ts.txt4 - compatible: must be "eeti,egalax_ts"
5 - reg: i2c slave address
6 - interrupts: touch controller interrupt
7 - wakeup-gpios: the gpio pin to be used for waking up the controller
8 and also used as irq pin
15 interrupt-parent = <&gpio1>;
17 wakeup-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;

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