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/linux/Documentation/devicetree/bindings/net/bluetooth/
H A Dbrcm,bluetooth.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 This binding describes Broadcom UART-attached bluetooth chips.
18 - items:
19 - enum:
20 - infineon,cyw43439-bt
21 - const: brcm,bcm4329-bt
22 - enum:
[all …]
/linux/Documentation/devicetree/bindings/usb/
H A Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-drd.yaml
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8186-mtu3
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H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
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/linux/kernel/sched/
H A Dwait.c1 // SPDX-License-Identifier: GPL-2.0-only
11 spin_lock_init(&wq_head->lock); in __init_waitqueue_head()
12 lockdep_set_class_and_name(&wq_head->lock, key, name); in __init_waitqueue_head()
13 INIT_LIST_HEAD(&wq_head->head); in __init_waitqueue_head()
22 wq_entry->flags &= ~WQ_FLAG_EXCLUSIVE; in add_wait_queue()
23 spin_lock_irqsave(&wq_head->lock, flags); in add_wait_queue()
25 spin_unlock_irqrestore(&wq_head->lock, flags); in add_wait_queue()
33 wq_entry->flags |= WQ_FLAG_EXCLUSIVE; in add_wait_queue_exclusive()
34 spin_lock_irqsave(&wq_head->lock, flags); in add_wait_queue_exclusive()
36 spin_unlock_irqrestore(&wq_head->lock, flags); in add_wait_queue_exclusive()
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/linux/Documentation/devicetree/bindings/power/reset/
H A Datmel,at91sam9260-shdwc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/atmel,at91sam9260-shdwc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Claudiu Beznea <claudiu.beznea@microchip.com>
14 and VDDCORE and the wake-up detection on debounced input lines.
19 - atmel,at91sam9260-shdwc
20 - atmel,at91sam9rl-shdwc
21 - atmel,at91sam9x5-shdwc
29 atmel,wakeup-mode:
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/linux/Documentation/ABI/testing/
H A Dsysfs-power15 labels, which may be "mem" (suspend), "standby" (power-on
16 suspend), "freeze" (suspend-to-idle) and "disk" (hibernation).
21 See Documentation/admin-guide/pm/sleep-states.rst for more
28 The /sys/power/mem_sleep file controls the operating mode of
31 supported). The mode that will be used on subsequent attempts
35 Writing one of the above strings to this file causes the mode
39 See Documentation/admin-guide/pm/sleep-states.rst for more
46 The /sys/power/disk file controls the operating mode of the
47 suspend-to-disk mechanism. Reading from this file returns
51 'firmware' - means that the memory image will be saved to disk
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/linux/drivers/power/reset/
H A Dat91-poweroff.c5 * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
27 #define AT91_SHDW_MR 0x04 /* Shut Down Mode Register */
28 #define AT91_SHDW_WKMODE0 GENMASK(2, 0) /* Wake-up 0 Mode Selection */
32 #define AT91_SHDW_RTTWKEN BIT(16) /* Real Time Timer Wake-up Enable */
33 #define AT91_SHDW_RTCWKEN BIT(17) /* Real Time Clock Wake-up Enable */
36 #define AT91_SHDW_WAKEUP0 BIT(0) /* Wake-up 0 Status */
37 #define AT91_SHDW_RTTWK BIT(16) /* Real-time Timer Wake-up */
38 #define AT91_SHDW_RTCWK BIT(17) /* Real-time Clock Wake-up [SAM9RL] */
65 /* Simple power-on, just bail out */ in at91_wakeup_status()
76 dev_info(&pdev->dev, "Wake-Up source: %s\n", reason); in at91_wakeup_status()
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H A Datc260x-poweroff.c1 // SPDX-License-Identifier: GPL-2.0+
27 /* S4-Deep Sleep Mode is NOT available for WALL/USB power */ in atc2603c_do_poweroff()
30 dev_info(pwrc->dev, "Enabling S4-Deep Sleep Mode"); in atc2603c_do_poweroff()
33 /* Update wakeup sources */ in atc2603c_do_poweroff()
38 ret = regmap_update_bits(pwrc->regmap, ATC2603C_PMU_SYS_CTL0, in atc2603c_do_poweroff()
41 dev_warn(pwrc->dev, "failed to write SYS_CTL0: %d\n", ret); in atc2603c_do_poweroff()
43 /* Update power mode */ in atc2603c_do_poweroff()
46 ret = regmap_update_bits(pwrc->regmap, ATC2603C_PMU_SYS_CTL3, reg_mask, in atc2603c_do_poweroff()
49 dev_err(pwrc->dev, "failed to write SYS_CTL3: %d\n", ret); in atc2603c_do_poweroff()
58 ret = regmap_update_bits(pwrc->regmap, in atc2603c_do_poweroff()
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/linux/arch/x86/realmode/rm/
H A Dwakeup_asm.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ACPI wakeup real mode startup stub
7 #include <asm/msr-index.h>
10 #include <asm/processor-flags.h>
12 #include "wakeup.h"
16 /* This should match the structure in wakeup.h */
21 video_mode: .short 0 /* Video mode number */
30 pmode_behavior: .long 0 /* Wakeup behavior flags */
95 /* Restore MISC_ENABLE before entering protected mode, in case
134 /* -> jmp *%eax in trampoline_32.S */
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/linux/arch/arm/mach-omap2/
H A Dclockdomain.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2011 Texas Instruments, Inc.
6 * Copyright (C) 2008-2011 Nokia Corporation
22 #include <linux/clk-provider.h>
37 /* array of clockdomain deps to be added/removed when clkdm in hwsup mode */
56 if (!strcmp(name, temp_clkdm->name)) { in _clkdm_lookup()
66 * _clkdm_register - register a clockdomain
70 * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is
77 if (!clkdm || !clkdm->name) in _clkdm_register()
78 return -EINVAL; in _clkdm_register()
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H A Dclockdomain.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2008-2011 Nokia Corporation
33 * hardware-supervised idle mode, the PRCM may transition the
38 * force-sleep mode, then the HW_AUTO mode will be used to put the
40 * the force-wakeup mode, then it will be used whenever a clock or
42 * HW_AUTO mode.
58 * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode
59 * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only
62 * clockdomain should stay active in hwsup mode; and conversely,
64 * hwsup mode.
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/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-controller.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
9 compatible = "raumfeld,raumfeld-controller-pxa303", "marvell,pxa300";
11 reg_vbatt: regulator-vbatt {
12 compatible = "regulator-fixed";
13 regulator-name = "vbatt-fixed-supply";
14 regulator-min-microvolt = <3700000>;
15 regulator-max-microvolt = <3700000>;
16 regulator-always-on;
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/linux/arch/mips/loongson2ef/common/
H A Dpm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * loongson-specific suspend support
57 * Setup the board-specific events for waking up loongson from wait mode
64 * Check wakeup events
72 * If the events are really what we want to wakeup the CPU, wake it up
96 /* setup wakeup events via enabling the IRQs */ in loongson_suspend_enter()
103 /* Put CPU into wait mode */ in loongson_suspend_enter()
106 /* wait for the given events to wakeup cpu from wait mode */ in loongson_suspend_enter()
/linux/drivers/gnss/
H A Dsirf.c1 // SPDX-License-Identifier: GPL-2.0
45 struct gpio_desc *wakeup; member
62 mutex_lock(&data->serdev_mutex); in sirf_serdev_open()
63 if (++data->serdev_count == 1) { in sirf_serdev_open()
64 ret = serdev_device_open(data->serdev); in sirf_serdev_open()
66 data->serdev_count--; in sirf_serdev_open()
70 serdev_device_set_baudrate(data->serdev, data->speed); in sirf_serdev_open()
71 serdev_device_set_flow_control(data->serdev, false); in sirf_serdev_open()
75 mutex_unlock(&data->serdev_mutex); in sirf_serdev_open()
82 mutex_lock(&data->serdev_mutex); in sirf_serdev_close()
[all …]
/linux/arch/powerpc/kernel/
H A Didle_book3s.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 * SRR1 wakeup reason return value.
10 * The platform / CPU caller must ensure SPRs and any other non-GPR
15 #include <asm/asm-offsets.h>
16 #include <asm/ppc-opcode.h>
24 * No state will be lost regardless of wakeup mechanism (interrupt or NIA).
26 * An EC=0 type wakeup will return with a value of 0. SRESET wakeup (which can
40 * GPRs may be lost, so they are saved here. Wakeup is by interrupt only.
41 * The SRESET wakeup returns to this function's caller by calling
44 * A wakeup without GPR loss may alteratively be handled as in
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dste,nomadik.txt4 - compatible: "stericsson,db8500-pinctrl", "stericsson,db8540-pinctrl",
5 "stericsson,stn8815-pinctrl"
6 - nomadik-gpio-chips: array of phandles to the corresponding GPIO chips
8 - prcm: phandle to the PRCMU managing the back end of this pin controller
10 Please refer to pinctrl-bindings.txt in this directory for details of the
23 (see pinctrl-bindings.txt):
26 - function: A string containing the name of the function to mux to the
28 - groups : An array of strings. Each string contains the name of a pin
30 set-up.
33 - pins: A string array describing the pins affected by the configuration
[all …]
/linux/drivers/usb/dwc3/
H A Ddwc3-qcom-legacy.c1 // SPDX-License-Identifier: GPL-2.0
4 * Inspired by dwc3-of-simple.c
88 enum usb_dr_mode mode; member
122 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_override_enable()
124 dwc3_qcom_setbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_override_enable()
127 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_SS_PHY_CTRL, in dwc3_qcom_vbus_override_enable()
129 dwc3_qcom_clrbits(qcom->qscratch_base, QSCRATCH_HS_PHY_CTRL, in dwc3_qcom_vbus_override_enable()
139 /* enable vbus override for device mode */ in dwc3_qcom_vbus_notifier()
141 qcom->mode = event ? USB_DR_MODE_PERIPHERAL : USB_DR_MODE_HOST; in dwc3_qcom_vbus_notifier()
151 /* disable vbus override in host mode */ in dwc3_qcom_host_notifier()
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/linux/Documentation/admin-guide/
H A Dbtmrvl.rst14 bit 8:0 -- Gap
15 bit 16:8 -- GPIO
18 It could be any valid GPIO pin# (e.g. 0-7) or 0xff (SDIO interface
19 wakeup will be used instead).
21 where Gap is the gap in milli seconds between wakeup signal and
22 wakeup event, or 0xff for special host sleep setting.
35 These commands are used to enable/disable auto sleep mode
39 1 -- Enable auto sleep mode
40 0 -- Disable auto sleep mode
44 # Enable auto sleep mode
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/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9261ek.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9261ek.dts - Device Tree file for Atmel at91sam9261 reference board
5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 /dts-v1/;
16 stdout-path = "serial0:115200n8";
25 clock-frequency = <32768>;
29 clock-frequency = <18432000>;
40 atmel,power-control-gpio = <&pioA 12 GPIO_ACTIVE_LOW>;
44 bits-per-pixel = <16>;
45 atmel,lcdcon-backlight;
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/linux/drivers/net/can/flexcan/
H A Dflexcan.h1 /* SPDX-License-Identifier: GPL-2.0
2 * flexcan.c - FLEXCAN CAN controller driver
4 * Copyright (c) 2005-2006 Varma Electronics Oy
6 * Copyright (c) 2010-2017 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de>
10 * Based on code originally by Andrey Volkov <avolkov@varma-el.com>
17 #include <linux/can/rx-offload.h>
22 * SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB
45 /* Disable non-correctable errors interrupt and freeze mode */
53 /* Setup stop mode with GPR to support wakeup */
55 /* Support CAN-FD mode */
[all …]
/linux/arch/arm64/boot/dts/exynos/google/
H A Dgs101-pixel-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device Tree nodes common for all GS101-based Pixel
5 * Copyright 2021-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/usb/pd.h>
14 #include "gs101-pinctrl.h"
25 stdout-path = &serial_0;
[all …]
/linux/drivers/usb/mtu3/
H A Dmtu3.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mtu3.h - MediaTek USB3 DRD header
35 #define MU3D_EP_TXCR0(epnum) (U3D_TX1CSR0 + (((epnum) - 1) * 0x10))
36 #define MU3D_EP_TXCR1(epnum) (U3D_TX1CSR1 + (((epnum) - 1) * 0x10))
37 #define MU3D_EP_TXCR2(epnum) (U3D_TX1CSR2 + (((epnum) - 1) * 0x10))
39 #define MU3D_EP_RXCR0(epnum) (U3D_RX1CSR0 + (((epnum) - 1) * 0x10))
40 #define MU3D_EP_RXCR1(epnum) (U3D_RX1CSR1 + (((epnum) - 1) * 0x10))
41 #define MU3D_EP_RXCR2(epnum) (U3D_RX1CSR2 + (((epnum) - 1) * 0x10))
43 #define USB_QMU_TQHIAR(epnum) (U3D_TXQHIAR1 + (((epnum) - 1) * 0x4))
44 #define USB_QMU_RQHIAR(epnum) (U3D_RXQHIAR1 + (((epnum) - 1) * 0x4))
[all …]
/linux/Documentation/devicetree/bindings/rtc/
H A Dfsl,ls-ftm-alarm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/fsl,ls-ftm-alarm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - fsl,ls1012a-ftm-alarm
16 - fsl,ls1021a-ftm-alarm
17 - fsl,ls1028a-ftm-alarm
18 - fsl,ls1043a-ftm-alarm
19 - fsl,ls1046a-ftm-alarm
[all …]
/linux/Documentation/devicetree/bindings/power/supply/
H A Drichtek,rt9471.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alina Yu <alina_yu@richtek.com>
11 - ChiYuan Huang <cy_huang@richtek.com>
14 RT9471 is a switch-mode single cell Li-Ion/Li-Polymer battery charger for
16 voltage regulations in both charging and boost mode.
19 https://www.richtek.com/assets/product_file/RT9471=RT9471D/DS9471D-02.pdf
28 charge-enable-gpios:
32 wakeup-source: true
[all …]
/linux/drivers/media/rc/
H A Dite-cir.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 #define ITE_DRIVER_NAME "ite-cir"
34 /* hw-specific operation function pointers; most of these must be
98 /* duty cycle, 0-100 */
114 /* low-speed carrier frequency limits (Hz) */
118 /* high-speed carrier frequency limits (Hz) */
130 * n in RDCR produces a tolerance of +/- n * 6.25% around the center
135 * frequency A = (H - L) / (H + L). We can use this in order to honor the
136 * s_rx_carrier_range() call in ir-core. We'll suppose that any request
170 * Environment Control - Low Pin Count Input / Output
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