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/freebsd/sys/contrib/device-tree/Bindings/arm/
H A Dvexpress-scc.txt2 -----------------------------------------------------
15 - compatible value: "arm,vexpress-scc,<model>", "arm,vexpress-scc";
18 eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7):
19 compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
23 - reg: when the SCC is memory mapped, physical address and size of the
25 - interrupts: when the SCC can generate a system-level interrupt
30 compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
H A Darm,vexpress-juno.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,vexpress-jun
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H A Darm,cci-400.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 ARM multi-cluster systems maintain intra-cluster coherency through a cache
24 pattern: "^cci(@[0-9a-f]+)?$"
28 - arm,cci-400
29 - arm,cci-500
30 - arm,cci-550
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/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2p-ca15_a7.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15_A7 MPCore (V2P-CA15_A7)
8 * HBI-0249A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15_CA7";
18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
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