xref: /linux/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RZ/A1 combined Pin and GPIO controller
8
9maintainers:
10  - Jacopo Mondi <jacopo+renesas@jmondi.org>
11  - Geert Uytterhoeven <geert+renesas@glider.be>
12
13description:
14  The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO
15  controller, named "Ports" in the hardware reference manual.
16  Pin multiplexing and GPIO configuration is performed on a per-pin basis
17  writing configuration values to per-port register sets.
18  Each "port" features up to 16 pins, each of them configurable for GPIO
19  function (port mode) or in alternate function mode.
20  Up to 8 different alternate function modes exist for each single pin.
21
22properties:
23  compatible:
24    oneOf:
25      - const: renesas,r7s72100-ports     # RZ/A1H
26      - items:
27          - const: renesas,r7s72101-ports # RZ/A1M
28          - const: renesas,r7s72100-ports # fallback
29      - const: renesas,r7s72102-ports     # RZ/A1L
30
31  reg:
32    maxItems: 1
33
34allOf:
35  - $ref: pinctrl.yaml#
36
37required:
38  - compatible
39  - reg
40
41patternProperties:
42  "^gpio-[0-9]*$":
43    type: object
44    additionalProperties: false
45
46    description:
47      Each port of the r7s72100 pin controller hardware is itself a GPIO
48      controller.
49      Different SoCs have different numbers of available pins per port, but
50      generally speaking, each of them can be configured in GPIO ("port") mode
51      on this hardware.
52      Describe GPIO controllers using sub-nodes with the following properties.
53
54    properties:
55      gpio-controller: true
56
57      '#gpio-cells':
58        const: 2
59
60      gpio-ranges:
61        maxItems: 1
62
63    required:
64      - gpio-controller
65      - '#gpio-cells'
66      - gpio-ranges
67
68
69additionalProperties:
70  anyOf:
71    - type: object
72      allOf:
73        - $ref: pincfg-node.yaml#
74        - $ref: pinmux-node.yaml#
75
76      description:
77        A pin multiplexing sub-node describes how to configure a set of (or a
78        single) pin in some desired alternate function mode.
79        A single sub-node may define several pin configurations.
80        A few alternate function require special pin configuration flags to be
81        supplied along with the alternate function configuration number.
82        The hardware reference manual specifies when a pin function requires
83        "software IO driven" mode to be specified. To do so use the generic
84        properties from the <include/linux/pinctrl/pinconf_generic.h> header
85        file to instruct the pin controller to perform the desired pin
86        configuration operation.
87        The hardware reference manual specifies when a pin has to be configured
88        to work in bi-directional mode and when the IO direction has to be
89        specified by software. Bi-directional pins must be managed by the pin
90        controller driver internally, while software driven IO direction has to
91        be explicitly selected when multiple options are available.
92
93      properties:
94        pinmux:
95          description: |
96            Integer array representing pin number and pin multiplexing
97            configuration.
98            When a pin has to be configured in alternate function mode, use
99            this property to identify the pin by its global index, and provide
100            its alternate function configuration number along with it.
101            When multiple pins are required to be configured as part of the
102            same alternate function they shall be specified as members of the
103            same argument list of a single "pinmux" property.
104            Helper macros to ease assembling the pin index from its position
105            (port where it sits on and pin number) and alternate function
106            identifier are provided by the pin controller header file at:
107            <include/dt-bindings/pinctrl/r7s72100-pinctrl.h>
108            Integers values in "pinmux" argument list are assembled as:
109            ((PORT * 16 + PIN) | MUX_FUNC << 16)
110
111        input-enable: true
112        output-enable: true
113
114      required:
115        - pinmux
116
117      additionalProperties: false
118
119    - type: object
120      additionalProperties:
121        $ref: "#/additionalProperties/anyOf/0"
122
123examples:
124  - |
125    #include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
126    pinctrl: pinctrl@fcfe3000 {
127            compatible = "renesas,r7s72100-ports";
128
129            reg = <0xfcfe3000 0x4230>;
130
131            /*
132             * A GPIO controller node, controlling 16 pins indexed from 0.
133             * The GPIO controller base in the global pin indexing space is pin
134             * 48, thus pins [0 - 15] on this controller map to pins [48 - 63]
135             * in the global pin indexing space.
136             */
137            port3: gpio-3 {
138                    gpio-controller;
139                    #gpio-cells = <2>;
140                    gpio-ranges = <&pinctrl 0 48 16>;
141            };
142
143            /*
144             * A serial communication interface with a TX output pin and an RX
145             * input pin.
146             * Pin #0 on port #3 is configured as alternate function #6.
147             * Pin #2 on port #3 is configured as alternate function #4.
148             */
149            scif2_pins: serial2 {
150                    pinmux = <RZA1_PINMUX(3, 0, 6)>, <RZA1_PINMUX(3, 2, 4)>;
151            };
152
153
154            /*
155             * I2c master: both SDA and SCL pins need bi-directional operations
156             * Pin #4 on port #1 is configured as alternate function #1.
157             * Pin #5 on port #1 is configured as alternate function #1.
158             * Both need to work in bi-directional mode, the driver must manage
159             * this internally.
160             */
161            i2c2_pins: i2c2 {
162                    pinmux = <RZA1_PINMUX(1, 4, 1)>, <RZA1_PINMUX(1, 5, 1)>;
163            };
164
165
166            /*
167             * Multi-function timer input and output compare pins.
168             */
169            tioc0_pins: tioc0 {
170                    /*
171                     * Configure TIOC0A as software driven input
172                     * Pin #0 on port #4 is configured as alternate function #2
173                     * with IO direction specified by software as input.
174                     */
175                    tioc0_input_pins {
176                            pinmux = <RZA1_PINMUX(4, 0, 2)>;
177                            input-enable;
178                    };
179
180                    /*
181                     * Configure TIOC0B as software driven output
182                     * Pin #1 on port #4 is configured as alternate function #1
183                     * with IO direction specified by software as output.
184                     */
185                    tioc0_output_pins {
186                            pinmux = <RZA1_PINMUX(4, 1, 1)>;
187                            output-enable;
188                    };
189            };
190    };
191