Searched +full:sun4i +full:- +full:a10 +full:- +full:ve +full:- +full:clk (Results 1 – 6 of 6) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ve-clk.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A10 Video Engine Clock10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 "#clock-cells":19 "#reset-cells":23 const: allwinner,sun4i-a10-ve-clk[all …]
4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>46 #include <dt-bindings/thermal/thermal.h>47 #include <dt-bindings/dma/sun4i-a10.h>48 #include <dt-bindings/clock/sun7i-a20-ccu.h>49 #include <dt-bindings/reset/sun4i-a10-ccu.h>50 #include <dt-bindings/pinctrl/sun4i-a10.h>53 interrupt-parent = <&gic>;54 #address-cells = <1>;[all …]
2 * Copyright 2012-2015 Maxime Ripard4 * Maxime Ripard <maxime.ripard@free-electrons.com>6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/clock/sun5i-ccu.h>46 #include <dt-bindings/dma/sun4i-a10.h>47 #include <dt-bindings/reset/sun5i-ccu.h>50 interrupt-parent = <&intc>;51 #address-cells = <1>;52 #size-cells = <1>;55 #address-cells = <1>;[all …]
5 * This file is dual-licensed: you can use it either under the terms44 #include <dt-bindings/thermal/thermal.h>45 #include <dt-bindings/dma/sun4i-a10.h>46 #include <dt-bindings/clock/sun4i-a10-ccu.h>47 #include <dt-bindings/reset/sun4i-a10-ccu.h>50 #address-cells = <1>;51 #size-cells = <1>;52 interrupt-parent = <&intc>;59 #address-cells = <1>;60 #size-cells = <1>;[all …]
1 /*-2 * SPDX-License-Identifier: BSD-2-Clause41 #include <dev/clk/clk_div.h>42 #include <dev/clk/clk_fixed.h>43 #include <dev/clk/clk_mux.h>45 #include <dev/clk/allwinner/aw_ccung.h>47 #include <dt-bindings/clock/sun4i-a10-ccu.h>48 #include <dt-bindings/clock/sun7i-a20-ccu.h>49 #include <dt-bindings/reset/sun4i-a10-ccu.h>51 /* Non-exported resets */[all …]
1 /*-3 * Copyright (c) 2014-2015 M. Warner Losh <imp@FreeBSD.org>26 * The magic-bit-bang sequence used in this code may be based on a linux46 #include <dev/clk/clk.h>51 * set with a few extra implementation-specific registers that need to59 /* BITx -- Unknown bit that needs to be set/cleared at position x */60 /* UFx -- Uknown multi-bit field frobbed during init */165 * Here starts the magic -- most of the comments are based in ahci_a10_phy_reset()176 ATA_OUTL(ctlr->r_mem, AHCI_RWCR, 0); in ahci_a10_phy_reset()183 ahci_set(ctlr->r_mem, AHCI_PHYCS1R, PHYCS1R_HIGHZ); in ahci_a10_phy_reset()[all …]