Home
last modified time | relevance | path

Searched +full:quad +full:- +full:channel (Results 1 – 25 of 64) sorted by relevance

123

/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dti,pcm6240.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2022 - 2024 Texas Instruments Incorporated
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Shenghao Ding <shenghao-ding@ti.com>
24 https://www.ti.com/lit/gpn/pcm3120-q1
25 https://www.ti.com/lit/gpn/pcm3140-q1
26 https://www.ti.com/lit/gpn/pcm5120-q1
27 https://www.ti.com/lit/gpn/pcm6120-q1
28 https://www.ti.com/lit/gpn/pcm6260-q1
[all …]
H A Dti,tas6424.txt1 Texas Instruments TAS6424 Quad-Channel Audio amplifier
6 - compatible: "ti,tas6424" - TAS6424
7 - reg: I2C slave address
8 - sound-dai-cells: must be equal to 0
9 - standby-gpios: GPIO used to shut the TAS6424 down.
10 - mute-gpios: GPIO used to mute all the outputs
18 #sound-dai-cells = <0>;
22 https://www.ti.com/product/TAS6424-Q1
H A Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channe
[all...]
H A Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
[all …]
/freebsd/share/man/man4/
H A Dsnd_hdsp.435 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
57 .Bl -bullet -compact
59 RME HDSP 9632 (optional AO4S-192 and AIS-192 extension boards)
67 For ADAT ports, 8 channel, 4 channel and 2 channel formats are supported.
69 (32kHz-48kHz) and 4 channels at double speed (64kHz-96kHz).
70 Only the HDSP 9632 can operate at quad speed (128kHz-192kHz), ADAT is
72 Depending on sample rate and channel format selected, not all pcm channels can
79 .Bl -tag -width indent
82 When opened in multi-channel audio software, this makes all ports available
[all …]
H A Dsnd_hdspe.434 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
56 .Bl -bullet -compact
58 RME HDSPe AIO (optional AO4S-192 and AI4S-192 extension boards)
66 For ADAT ports, 8 channel, 4 channel and 2 channel formats are supported.
68 (32kHz-48kHz), 4 channels at double speed (64kHz-96kHz), and 2 channels at
69 quad speed (128kHz-192kHz).
70 Depending on sample rate and channel format selected, not all pcm channels can
77 .Bl -tag -width indent
80 When opened in multi-channel audio software, this makes all ports available
[all …]
H A Dscc.42 .\" SPDX-License-Identifier: BSD-2-Clause
45 communication channel to subordinate drivers.
55 .Bl -bullet -compact
57 QUICC: Freescale/NXP QUad Integrated Communications Controllers.
/freebsd/sys/powerpc/powermac/
H A Ddbdmavar.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
46 uint32_t address; /* 32-bit system physical address */
47 uint32_t cmdDep; /* Branch address or quad word to load/store */
49 uint16_t xferStatus; /* Contents of channel status after completion */
71 0x000 Channel Control 4
72 0x004 Channel Status 4
87 /* Channel control is the write channel to channel status, the upper 16 bits
92 /* Status bits 0-7 are device dependent status bits */
H A Ddbdma.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
51 dbdma_channel_t *channel = (dbdma_channel_t *)(chan); in dbdma_phys_callback() local
53 channel->sc_slots_pa = segs[0].ds_addr; in dbdma_phys_callback()
54 dbdma_write_reg(channel, CHAN_CMDPTR, channel->sc_slots_pa); in dbdma_phys_callback()
62 dbdma_channel_t *channel; in dbdma_allocate_channel() local
64 channel = *chan = malloc(sizeof(struct dbdma_channel), M_DBDMA, in dbdma_allocate_channel()
67 channel->sc_regs = dbdma_regs; in dbdma_allocate_channel()
68 channel->sc_off = offset; in dbdma_allocate_channel()
69 dbdma_stop(channel); in dbdma_allocate_channel()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/potentiometer/
H A Drenesas,x9250.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas X9250 quad potentiometers
10 - Herve Codina <herve.codina@bootlin.com>
18 - $ref: /schemas/spi/spi-peripheral-props.yaml
23 - renesas,x9250t
24 - renesas,x9250u
29 vcc-supply:
33 avp-supply:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/iio/addac/
H A Dadi,ad74413r.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74412R and AD74413R are quad-channel software configurable input/output
18 The devices feature a 16-bit ADC and four configurable 13-bit DACs to provide
20 The AD74413R differentiates itself from the AD74412R by being HART-compatible.
27 - adi,ad74412r
28 - adi,ad74413r
33 '#address-cells':
[all …]
/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
[all …]
/freebsd/sys/dev/sound/pci/
H A Dhdsp-pcm.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2012-2021 Ruslan Bukin <br@bsdpad.com>
5 * Copyright (c) 2023-2024 Florian Walpen <dev@submerge.ch>
31 * RME HDSP driver for FreeBSD (pcm-part).
94 return (0x00000000); /* ADAT disabled at quad speed. */ in hdsp_adat_slot_map()
113 /* Map HDSP 9652 ports to slot bitmap, no quad speed. */ in hdsp_port_slot_map()
130 return (slots & (~(slots - 1))); /* Extract first bit set. */ in hdsp_slot_first()
141 return (slots & (ends ^ (ends - 1))); in hdsp_slot_first_row()
150 --n; in hdsp_slot_first_n()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Datmel,quadspi.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel Quad Serial Peripheral Interface (QSPI)
10 - Tudor Ambarus <tudor.ambarus@linaro.org>
13 - $ref: spi-controller.yaml#
18 - atmel,sama5d2-qspi
19 - microchip,sam9x60-qspi
20 - microchip,sama7g5-qspi
21 - microchip,sama7g5-ospi
[all …]
H A Dst,stm32-qspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI)
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Patrice Chotard <patrice.chotard@foss.st.com>
14 - $ref: spi-controller.yaml#
18 const: st,stm32f469-qspi
22 - description: registers
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6q-icore-ofcap12.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
10 #include "imx6qdl-icore.dtsi"
13 model = "Engicam i.CoreM6 Quad/Dual OpenFrame Capacitive touch 12 Kit";
14 compatible = "engicam,imx6-icore", "fsl,imx6q";
22 remote-endpoint = <&lvds0_out>;
31 lvds-channel@0 {
39 remote-endpoint = <&panel_in>;
H A Dimx6q-icore-ofcap10.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
10 #include "imx6qdl-icore.dtsi"
13 model = "Engicam i.CoreM6 Quad/Dual OpenFrame Capacitive touch 10.1 Kit";
14 compatible = "engicam,imx6-icore", "fsl,imx6q";
17 compatible = "ampire,am-1280800n3tzqw-t00h";
22 remote-endpoint = <&lvds0_out>;
31 lvds-channel@0 {
32 fsl,data-mapping = "spwg";
33 fsl,data-width = <24>;
[all …]
H A Dimx6q-icore.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
7 /dts-v1/;
10 #include "imx6qdl-icore.dtsi"
13 model = "Engicam i.CoreM6 Quad/Dual Starter Kit";
14 compatible = "engicam,imx6-icore", "fsl,imx6q";
29 interrupt-parent = <&gpio3>;
37 lvds-channel@0 {
38 fsl,data-mapping = "spwg";
39 fsl,data-width = <18>;
42 display-timings {
[all …]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Ddlg,da9121.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
/freebsd/sys/contrib/device-tree/Bindings/clock/st/
H A Dst,quadfs.txt1 Binding for a type of quad channel digital frequency synthesizer found on
10 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
13 - compatible : shall be:
15 "st,quadfs-d0"
16 "st,quadfs-d2"
17 "st,quadfs-d3"
18 "st,quadfs-pll"
21 - #clock-cells : from common clock binding; shall be set to 1.
23 - reg : A Base address and length of the register set.
25 - clocks : from common clock binding
[all …]
/freebsd/sys/contrib/device-tree/Bindings/firmware/
H A Dintel,stratix10-svc.txt3 Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
12 exception layers must channel through the EL3 software whenever it needs
22 -------------------
26 - compatible: "intel,stratix10-svc" or "intel,agilex-svc"
27 - method: smc or hvc
28 smc - Secure Monitor Call
29 hvc - Hypervisor Call
30 - memory-region:
32 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
36 -------
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dmaxim,max96712.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Quad GMSL2 to CSI-2 Deserializer with GMSL1 Compatibility
11 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
15 CSI-2 D-PHY or C-PHY formatted outputs. The device allows each link to
16 simultaneously transmit bidirectional control-channel data while forward
18 four remotely located sensors using industry-standard coax or STP
23 MAX96712 can be paired with first-generation 3.12Gbps or 1.5Gbps GMSL1
34 enable-gpios: true
[all …]
H A Dmaxim,max9286.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Maxim Integrated Quad GMSL Deserializer
11 - Jacopo Mondi <jacopo+renesas@jmondi.org>
12 - Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
13 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
18 Serial Links (GMSL) and outputs them on a CSI-2 D-PHY port using up to 4 data
22 channel that encapsulates I2C messages. The MAX9286 forwards all I2C traffic
[all …]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-a33-ga10h-v1.1.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun8i-a33.dtsi"
45 #include "sun8i-reference-design-tablet.dtsi"
48 model = "Allwinner GA10H Quad Core Tablet (v1.1)";
49 compatible = "allwinner,ga10h-v1.1", "allwinner,sun8i-a33";
52 /* Make u-boot set mac-address for rtl8703as (no eeprom) */
64 firmware-name = "gsl3675-ga10h.fw";
65 touchscreen-size-x = <1630>;
66 touchscreen-size-y = <990>;
[all …]
/freebsd/sys/dev/scc/
H A Dscc_bfe_quicc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
60 device_set_desc(dev, "QUICC quad channel SCC"); in scc_quicc_probe()
63 sc->sc_class = &scc_quicc_class; in scc_quicc_probe()

123