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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dfsl,imx6ull-pxp.yaml5 $id: http://devicetree.org/schemas/media/fsl,imx6ull-pxp.yaml#
15 The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
24 - fsl,imx6ul-pxp
25 - fsl,imx6ull-pxp
26 - fsl,imx7d-pxp
29 - fsl,imx6sll-pxp
30 - fsl,imx6sx-pxp
31 - const: fsl,imx6ull-pxp
62 - fsl,imx6sx-pxp
63 - fsl,imx6ul-pxp
[all …]
H A Dfsl-pxp.txt4 The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine
10 - compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28,
13 - interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d.
15 - clocks: the PXP AXI clock
19 pxp@21cc000 {
20 compatible = "fsl,imx6ull-pxp";
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_hw.c61 struct pxp_ptt_entry pxp; member
90 p_pool->ptts[i].pxp.offset = ECORE_BAR_INVALID_OFFSET; in ecore_ptt_pool_alloc()
91 p_pool->ptts[i].pxp.pretend.control = 0; in ecore_ptt_pool_alloc()
120 p_ptt->pxp.offset = ECORE_BAR_INVALID_OFFSET; in ecore_ptt_invalidate()
177 return OSAL_LE32_TO_CPU(p_ptt->pxp.offset) << 2; in ecore_ptt_get_hw_addr()
209 p_ptt->pxp.offset = OSAL_CPU_TO_LE32(new_hw_addr >> 2); in ecore_ptt_set_win()
214 OSAL_LE32_TO_CPU(p_ptt->pxp.offset)); in ecore_ptt_set_win()
403 p_ptt->pxp.pretend.control = OSAL_CPU_TO_LE16(control); in ecore_fid_pretend()
404 p_ptt->pxp.pretend.fid.concrete_fid.fid = OSAL_CPU_TO_LE16(fid); in ecore_fid_pretend()
409 *(u32 *)&p_ptt->pxp.pretend); in ecore_fid_pretend()
[all …]
H A Dcommon_hsi.h169 /* Global PXP windows (GTT) */
455 /* PXP CONSTANTS */
617 #define SDM_COMP_TYPE_PXP 5 // Send direct message to PXP (like "internal write" command) to wr…
1187 * Pxp Pretend Command Register.
1214 * PTT Record in PXP Admin Window.
H A Dreg_addr.h36420 …PXP VPD event #0; [17] PCIE glue/PXP VPD event #1; [18] PCIE glue/PXP VPD event #2; [19] PCIE glue…
36426 …error; [25] MSEM PRAM Parity error; [26] pxp_misc_mps_attn; [27] PCIE glue/PXP Expansion ROM event…
36429 …PXP VPD event #0; [17] PCIE glue/PXP VPD event #1; [18] PCIE glue/PXP VPD event #2; [19] PCIE glue…
36435 …error; [25] MSEM PRAM Parity error; [26] pxp_misc_mps_attn; [27] PCIE glue/PXP Expansion ROM event…
36438 …PXP VPD event #0; [17] PCIE glue/PXP VPD event #1; [18] PCIE glue/PXP VPD event #2; [19] PCIE glue…
36444 …error; [25] MSEM PRAM Parity error; [26] pxp_misc_mps_attn; [27] PCIE glue/PXP Expansion ROM event…
36447 …PXP VPD event #0; [17] PCIE glue/PXP VPD event #1; [18] PCIE glue/PXP VPD event #2; [19] PCIE glue…
36453 …error; [25] MSEM PRAM Parity error; [26] pxp_misc_mps_attn; [27] PCIE glue/PXP Expansion ROM event…
36456 …PXP VPD event #0; [17] PCIE glue/PXP VPD event #1; [18] PCIE glue/PXP VPD event #2; [19] PCIE glue…
36462 …error; [25] MSEM PRAM Parity error; [26] pxp_misc_mps_attn; [27] PCIE glue/PXP Expansion ROM event…
[all …]
H A Decore_hsi_eth.h1517 u8 pxp_tph_valid_bd /* PXP command TPH Valid - for BD/SGE fetch */;
1518 u8 pxp_tph_valid_pkt /* PXP command TPH Valid - for packet placement */;
1519 u8 pxp_st_hint /* PXP command Steering tag hint. Use enum pxp_tph_st_hint */;
1520 __le16 pxp_st_index /* PXP command Steering tag index */;
1626 u8 pxp_st_hint /* PXP command Steering tag hint (use enum pxp_tph_st_hint) */;
1627 u8 pxp_tph_valid_bd /* PXP command TPH Valid - for BD fetch */;
1628 u8 pxp_tph_valid_pkt /* PXP command TPH Valid - for packet fetch */;
1629 __le16 pxp_st_index /* PXP command Steering tag index */;
H A Decore_int.c243 case 1: return "PXP"; in grc_timeout_attn_master_to_str()
617 {"PCIE glue/PXP VPD %d", (16 << ATTENTION_LENGTH_SHIFT), OSAL_NULL, BLOCK_PGLCS},
738 {"PCIE glue/PXP Exp. ROM", ATTENTION_SINGLE, OSAL_NULL, BLOCK_PGLCS},
H A Decore_hsi_debug_tools.h855 DBG_GRC_PARAM_DUMP_PXP /* dump PXP memories (0/1) */,
H A Decore_dev.c3889 /* Enable the PF's internal FID_enable in the PXP */ in ecore_hw_init()
4220 /* Clear the PF's internal FID_enable in the PXP. in ecore_hw_stop()
/freebsd/sys/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,imx93-media-blk-ctrl.yaml43 - const: pxp
78 "pxp", "lcdif", "isi", "csi", "dsi";
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ull.dtsi38 &pxp {
39 compatible = "fsl,imx6ull-pxp";
H A Dimx7d.dtsi169 pxp: pxp@30700000 { label
170 compatible = "fsl,imx7d-pxp";
H A Dimx6sll.dtsi640 pxp: pxp@20f0000 { label
641 compatible = "fsl,imx6sll-pxp", "fsl,imx6ull-pxp";
H A Dimx6dl.dtsi94 pxp: pxp@20f0000 { label
H A Dimx6sx.dtsi1283 pxp: pxp@2218000 { label
1284 compatible = "fsl,imx6sx-pxp", "fsl,imx6ull-pxp";
H A Dimx6ul.dtsi1041 pxp: pxp@21cc000 { label
1042 compatible = "fsl,imx6ul-pxp";
H A Dimx6sl.dtsi765 pxp: pxp@20f0000 { label
/freebsd/sys/dev/bxe/
H A Decore_init_ops.h76 /* in later chips PXP root complex handles BIOS ZLR w/o interrupting */ in ecore_write_big_buf()
106 /* in later chips PXP root complex handles BIOS ZLR w/o interrupting */ in ecore_write_big_buf_wb()
190 /* in later chips PXP root complex handles BIOS ZLR w/o interrupting */ in ecore_init_wr_wb()
209 /* in later chips PXP root complex handles BIOS ZLR w/o interrupting */ in ecore_init_fw()
342 * PXP Arbiter
H A Decore_init.h652 /* Block IGU, MISC, PXP and PXP2 parity errors as long as we don't
655 BLOCK_PRTY_INFO(PXP, 0x7ffffff, 0x3ffffff, 0x3ffffff, 0x7ffffff,
H A Dbxe.c7349 bxe_print_next_block(sc, par_num++, "PXP"); in bxe_check_blocks_with_parity2()
8025 BLOGE(sc, "PXP hw attention-0 0x%08x\n", val); in bxe_attn_int_deasserted2()
8028 BLOGE(sc, "FATAL error from PXP\n"); in bxe_attn_int_deasserted2()
8034 BLOGE(sc, "PXP hw attention-1 0x%08x\n", val); in bxe_attn_int_deasserted2()
10880 * - PCI Glue, PSWHST, PXP/PXP2 RF (all controlled by one reset bit)
10955 * In case of attention in the QM, we need to reset PXP in bxe_process_kill_chip_reset()
10958 * before resetting the PXP, then the PSWRQ would send a write in bxe_process_kill_chip_reset()
10959 * request to PGLUE. Then when PXP is reset, PGLUE would try to in bxe_process_kill_chip_reset()
11057 /* PXP */ in bxe_process_kill()
17044 * enable HW interrupt from PXP on USDM overflow in bxe_init_hw_common()
[all …]
/freebsd/contrib/sendmail/src/
H A Dparseaddr.c2776 register char **pxp = pvp; local
2780 while (*pxp != NULL && strcmp(*pxp, "@") != 0)
2782 pxp++;
2785 if (*pxp == NULL)
2790 while ((*pxp++ = *qxq++) != NULL)
2794 *--pxp = NULL;
/freebsd/sys/contrib/device-tree/src/arm/nxp/mxs/
H A Dimx28.dtsi1012 pxp: pxp@8002a000 { label
H A Dimx23.dtsi438 pxp@8002a000 {
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93.dtsi1280 "pxp", "lcdif", "isi", "csi", "dsi";
/freebsd/contrib/tcpdump/
H A Dprint-ppp.c1246 ND_PRINT(": Features: %u, PxP: %s, History: %u, #CTX-ID: %u", in print_ccp_config_options()

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