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/linux/Documentation/devicetree/bindings/phy/
H A Dsamsung,usb2-phy.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,usb2-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 The first phandle argument in the PHY specifier identifies the PHY, its
18 0 - USB device ("device"),
19 1 - USB host ("host"),
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/linux/drivers/phy/samsung/
H A Dphy-exynos5250-sata.c1 // SPDX-License-Identifier: GPL-2.0-only
52 struct regmap *pmureg; member
66 return -EFAULT; in wait_for_reg_status()
73 return regmap_update_bits(sata_phy->pmureg, SATAPHY_CONTROL_OFFSET, in exynos_sata_phy_power_on()
82 return regmap_update_bits(sata_phy->pmureg, SATAPHY_CONTROL_OFFSET, in exynos_sata_phy_power_off()
94 ret = regmap_update_bits(sata_phy->pmureg, SATAPHY_CONTROL_OFFSET, in exynos_sata_phy_init()
97 dev_err(&sata_phy->phy->dev, "phy init failed\n"); in exynos_sata_phy_init()
99 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
101 val = readl(sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
105 writel(val, sata_phy->regs + EXYNOS5_SATA_RESET); in exynos_sata_phy_init()
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H A Dphy-samsung-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include "phy-samsung-usb2.h"
21 struct samsung_usb2_phy_driver *drv = inst->drv; in samsung_usb2_phy_power_on()
24 dev_dbg(drv->dev, "Request to power_on \"%s\" usb phy\n", in samsung_usb2_phy_power_on()
25 inst->cfg->label); in samsung_usb2_phy_power_on()
27 if (drv->vbus) { in samsung_usb2_phy_power_on()
28 ret = regulator_enable(drv->vbus); in samsung_usb2_phy_power_on()
33 ret = clk_prepare_enable(drv->clk); in samsung_usb2_phy_power_on()
36 ret = clk_prepare_enable(drv->ref_clk); in samsung_usb2_phy_power_on()
39 if (inst->cfg->power_on) { in samsung_usb2_phy_power_on()
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/linux/drivers/watchdog/
H A Ds3c2410_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
92 * DOC: Quirk flags for different Samsung watchdog IP-cores
97 * differences in both watchdog and PMU IP-cores should be accounted for. Quirk
104 * write-only, writing any values to this register clears the interrupt, but
129 * %QUIRK_HAS_32BIT_CNT: WTDAT and WTCNT are 32-bit registers. With these
130 * 32-bit registers, larger values will be set, which means that larger timeouts
166 * struct s3c2410_wdt_variant - Per-variant config data
168 * @disable_reg: Offset in pmureg for the register that disables the watchdog
170 * @mask_reset_reg: Offset in pmureg for the register that masks the watchdog
175 * @rst_stat_reg: Offset in pmureg for the register that has the reset status.
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
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H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
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H A Ds5pv210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
45 #address-cells = <1>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a8";
55 xxti: oscillator-0 {
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H A Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
46 bus_dmc: bus-dmc {
47 compatible = "samsung,exynos-bus";
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