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Searched +full:platform +full:- +full:pll +full:- +full:div2 (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,qoriq-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,qoriq-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 multiple phase locked loops (PLL) to create a variety of frequencies
24 --------------- -------------
36 - items:
37 - enum:
38 - fsl,p2041-clockgen
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/linux/drivers/clk/sophgo/
H A Dclk-sg2044-pll.c1 // SPDX-License-Identifier: GPL-2.0
3 * Sophgo SG2044 PLL clock controller driver
13 #include <linux/clk-provider.h>
22 #include <dt-bindings/clock/sophgo,sg2044-pll.h>
57 for (_var = (_limit)->min; _var <= (_limit)->max; _var++)
85 struct sg2044_pll_internal pll; member
90 struct sg2044_clk_common * const *pll; member
107 return value >= limit->min && value <= limit->max; in sg2044_clk_fit_limit()
142 struct sg2044_pll *pll = hw_to_sg2044_pll(hw); in sg2044_pll_recalc_rate() local
146 ret = regmap_read(pll->common.regmap, in sg2044_pll_recalc_rate()
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/linux/drivers/media/tuners/
H A Dmt2060.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 { .addr = priv->cfg->i2c_address, .flags = 0, .len = 1 }, in mt2060_readreg()
32 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .len = 1 }, in mt2060_readreg()
39 return -ENOMEM; in mt2060_readreg()
47 if (i2c_transfer(priv->i2c, msg, 2) != 2) { in mt2060_readreg()
49 rc = -EREMOTEIO; in mt2060_readreg()
61 .addr = priv->cfg->i2c_address, .flags = 0, .len = 2 in mt2060_writereg()
68 return -ENOMEM; in mt2060_writereg()
75 if (i2c_transfer(priv->i2c, &msg, 1) != 1) { in mt2060_writereg()
77 rc = -EREMOTEIO; in mt2060_writereg()
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/linux/drivers/clk/ti/
H A Dadpll.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/clk-provider.h>
183 err = of_property_read_string_index(d->np, in ti_adpll_clk_get_name()
184 "clock-output-names", in ti_adpll_clk_get_name()
190 name = devm_kasprintf(d->dev, GFP_KERNEL, "%08lx.adpll.%s", in ti_adpll_clk_get_name()
191 d->pa, postfix); in ti_adpll_clk_get_name()
207 d->clocks[index].clk = clock; in ti_adpll_setup_clock()
208 d->clocks[index].unregister = unregister; in ti_adpll_setup_clock()
214 dev_warn(d->dev, "clock %s con_id lookup may fail\n", in ti_adpll_setup_clock()
216 snprintf(con_id, 16, "pll%03lx%s", d->pa & 0xfff, postfix + 1); in ti_adpll_setup_clock()
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/linux/arch/arm64/boot/dts/qcom/
H A Dsm8750-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
20 #include "sm8750-pmics.dtsi"
24 compatible = "qcom,sm8750-qrd", "qcom,sm8750";
25 chassis-type = "handset";
31 wcd939x: audio-codec {
32 compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec";
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