/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt7986a-bananapi-bpi-r3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Frank Wunderlich <frank-w@public-files.de> 9 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-binding [all...] |
H A D | mt7622-bananapi-bpi-r64.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 17 model = "Bananapi BPI-R64"; 18 chassis-type = "embedded"; 19 compatible = "bananapi,bpi-r6 [all...] |
H A D | mt8192-asurada.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/spmi/spmi.h> 25 stdout-path = "serial0:115200n8"; 33 backlight_lcd0: backlight-lcd0 { 34 compatible = "pwm-backlight"; 36 power-suppl [all...] |
H A D | mt8192-asurada-hayato-r1.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include "mt8192-asurada.dtsi" 10 compatible = "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; 14 function-row-physmap = < 42 &pio { 43 bt_pins: bt-pin [all...] |
H A D | mt6795-sony-xperia-m5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 14 compatible = "sony,xperia-m5", "mediatek,mt6795"; 15 chassis-type = "handset"; 26 compatible = "led-backlight"; 29 default-brightnes [all...] |
H A D | mt8365-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2021-2022 BayLibre, SAS. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h> 19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; 26 stdout-path = "serial0:921600n8"; 31 compatible = "linaro,optee-tz"; 36 gpio-keys { [all …]
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H A D | mt8183-kukui-jacuzzi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "mt8183-kukui.dtsi" 7 /* Must come after mt8183-kukui.dtsi to modify cros_ec */ 8 #include <arm/cros-ec-keyboard.dtsi> 11 pp1200_mipibrdg: pp1200-mipibrdg { 12 compatible = "regulator-fixed"; 13 regulator-nam [all...] |
H A D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-leve [all...] |
H A D | mt8195-demo.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 14 #include <dt-bindings/regulator/mediatek,mt6360-regulato [all...] |
H A D | mt7622-rfb1.dts | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 18 chassis-type = "embedded"; 19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-suppl [all...] |
H A D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_pp5000>; 28 enable-gpios = <&pio 17 [all...] |
H A D | mt8192-asurada-audio-rt1015p.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 10 rt1015p: audio-codec { 12 pinctrl-names = "default"; 13 pinctrl-0 = <&rt1015p_pins>; 14 sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>; 15 #sound-dai-cells = <0>; 19 &pio { 20 rt1015p_pins: rt1015p-default-pins { [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | mediatek,mt8195-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 13 The MediaTek's MT8195 Pin controller is used to control SoC pins. 17 const: mediatek,mt8195-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: [all …]
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H A D | pinctrl-mt8195.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8195.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 13 The Mediatek's Pin controller is used to control SoC pins. 17 const: mediatek,mt8195-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: [all …]
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H A D | mediatek,mt8186-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 13 The MediaTek's MT8186 Pin controller is used to control SoC pins. 17 const: mediatek,mt8186-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: [all …]
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H A D | pinctrl-mt8186.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8186.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 13 The Mediatek's Pin controller is used to control SoC pins. 17 const: mediatek,mt8186-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: [all …]
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H A D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the 4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0) 5 and multiple alternate functions(ALT1 - ALTx) that directly connect 9 Pull Up (PU) are driven by the related PIO block. 11 ST pinctrl driver controls PIO multiplexing block and also interacts with 14 GPIO bank can have one of the two possible types of interrupt-wirings. 20 | |----> [gpio-bank (n) ] 21 | |----> [gpio-bank (n + 1)] 22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)] 23 | |----> [gpio-bank (... )] [all …]
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H A D | mediatek,mt8188-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8188-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hui Liu <hui.liu@mediatek.com> 13 The MediaTek's MT8188 Pin controller is used to control SoC pins. 17 const: mediatek,mt8188-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 25 are defined in <dt-bindings/gpio/gpio.h>. [all …]
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
H A D | mt7629-rfb.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 8 #include <dt-bindings/input/input.h> 13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629"; 20 stdout-path = "serial0:115200n8"; 23 gpio-keys { 24 compatible = "gpio-keys"; 26 button-rese [all...] |
/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stih407-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include "st-pincfg.h" 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 /* 0-5: PIO_SBC */ 18 /* 10-19: PIO_FRONT0 */ 31 /* 30-35: PIO_REAR */ 38 /* 40-42: PIO_FLASH */ 45 pin-controller-sbc@961f080 { 46 #address-cells = <1>; 47 #size-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/allwinner/ |
H A D | sun50i-h616-orangepi-zero2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "sun50i-h616-orangepi-zero.dtsi" 12 compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; 16 allwinner,rx-dela [all...] |
/freebsd/sys/contrib/device-tree/src/arm/allwinner/ |
H A D | sun5i-a13-utoo-p66.dts | 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 44 #include "sun5i-a13.dtsi" 45 #include "sun5i-reference-design-tablet.dtsi" 46 #include <dt-bindings/interrupt-controller/irq.h> 50 compatible = "utoo,p66", "allwinner,sun5i-a13"; 52 /* The P66 uses the uart pins as gpios */ 54 /delete-property/serial0; 58 /delete-property/stdout-path; 63 compatible = "i2c-gpio"; [all …]
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H A D | sun7i-a20-olinuxino-micro.dts | 4 * Maxime Ripard <maxime.ripard@free-electrons.com> 6 * This file is dual-licensed: you can use it either under the terms 45 /dts-v1/; 46 #include "sun7i-a20.dtsi" 47 #include "sunxi-common-regulators.dtsi" 49 #include <dt-bindings/gpio/gpio.h> 50 #include <dt-bindings/input/input.h> 51 #include <dt-bindings/interrupt-controller/irq.h> 54 model = "Olimex A20-Olinuxino Micro"; 55 compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20"; [all …]
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H A D | sun7i-a20-olinuxino-lime.dts | 2 * This is based on sun4i-a10-olinuxino-lime.dts 4 * Copyright 2014 - Hans de Goede <hdegoede@redhat.com> 7 * This file is dual-licensed: you can use it either under the terms 46 /dts-v1/; 47 #include "sun7i-a20.dtsi" 48 #include "sunxi-common-regulators.dtsi" 50 #include <dt-bindings/gpio/gpio.h> 51 #include <dt-bindings/interrupt-controller/irq.h> 54 model = "Olimex A20-OLinuXino-LIME"; 55 compatible = "olimex,a20-olinuxino-lime", "allwinner,sun7i-a20"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-mt65xx.txt | 4 - compatible: should be one of the following. 5 - mediatek,mt2701-spi: for mt2701 platforms 6 - mediatek,mt2712-spi: for mt2712 platforms 7 - mediatek,mt6589-spi: for mt6589 platforms 8 - mediatek,mt6765-spi: for mt6765 platforms 9 - mediatek,mt7622-spi: for mt7622 platforms 10 - "mediatek,mt7629-spi", "mediatek,mt7622-spi": for mt7629 platforms 11 - mediatek,mt8135-spi: for mt8135 platforms 12 - mediatek,mt8173-spi: for mt8173 platforms 13 - mediatek,mt8183-spi: for mt8183 platforms [all …]
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