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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A Dlontium,lt9211.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lontium,lt9211.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lontium LT9211 DSI/LVDS/DPI to DSI/LVDS/DPI bridge.
10 - Marek Vasut <marex@denx.de>
13 The LT9211 are bridge devices which convert Single/Dual-Link DSI/LVDS
14 or Single DPI to Single/Dual-Link DSI/LVDS or Single DPI.
19 - lontium,lt9211
27 reset-gpios:
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H A Dfsl,ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MP DPI to LVDS bridge chip
10 - Marek Vasut <marex@denx.de>
14 for configuring the on-SoC DPI-to-LVDS serializer. This describes
15 those registers as bridge within the DT.
20 - fsl,imx6sx-ldb
21 - fsl,imx8mp-ldb
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H A Dtoshiba,tc358775.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358775 DSI to LVDS bridge
10 - Vinay Simha BN <simhavcs@gmail.com>
13 This binding supports DSI to LVDS bridges TC358765 and TC358775
15 MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.
17 Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel
18 limited by 135 MHz LVDS speed
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H A Dti,sn65dsi83.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/ti,sn65dsi83.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SN65DSI83 and SN65DSI84 DSI to LVDS bridge chip
10 - Marek Vasut <marex@denx.de>
13 Texas Instruments SN65DSI83 1x Single-link MIPI DSI
14 to 1x Single-link LVDS
16 Texas Instruments SN65DSI84 1x Single-link MIPI DSI
17 to 1x Dual-link or 2x Single-link LVDS
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H A Dfsl,imx8qxp-pxl2dpi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 interfaces the pixel link 36-bit data output and the DSI controller’s
15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module
16 used in LVDS mode, to remap the pixel color codings between those modules.
25 const: fsl,imx8qxp-pxl2dpi
27 fsl,sc-resource:
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H A Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8qm/qxp LVDS Display Bridge
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
23 LDB split mode to support a dual link LVDS display. The channel indexes
41 - fsl,imx8qm-ldb
42 - fsl,imx8qxp-ldb
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H A Dtoshiba,tc358764.txt1 TC358764 MIPI-DSI to LVDS panel bridge
4 - compatible: "toshiba,tc358764"
5 - reg: the virtual channel number of a DSI peripheral
6 - vddc-supply: core voltage supply, 1.2V
7 - vddio-supply: I/O voltage supply, 1.8V or 3.3V
8 - vddlvds-supply: LVDS1/2 voltage supply, 3.3V
9 - reset-gpios: a GPIO spec for the reset pin
13 0: DSI Input, not required, if the bridge is DSI controlled
14 1: LVDS Output, mandatory
16 [1]: Documentation/devicetree/bindings/media/video-interfaces.txt
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H A Dtoshiba,tc358764.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/toshiba,tc358764.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Toshiba TC358764 MIPI-DSI to LVDS bridge
10 - Andrzej Hajda <andrzej.hajda@intel.com>
20 reset-gpios:
23 vddc-supply:
26 vddio-supply:
29 vddlvds-supply:
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H A Dnxp,ptn3460.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nxp,ptn3460.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PTN3460 eDP to LVDS bridge
10 - Sean Paul <seanpaul@chromium.org>
17 description: I2C address of the bridge
20 edid-emulation:
34 powerdown-gpios:
38 reset-gpios:
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H A Dmicrochip,sam9x75-lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/microchip,sam9x75-lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip SAM9X75 LVDS Controller
10 - Dharma Balasubiramani <dharma.b@microchip.com>
15 LVDS output signals. LVDSC functions include bit mapping, balanced mode
20 const: microchip,sam9x75-lvds
30 - description: Peripheral Bus Clock
32 clock-names:
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H A Dparade,ps8622.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/parade,ps8622.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Parade PS8622/PS8625 DisplayPort to LVDS Converter
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 - parade,ps8622
16 - parade,ps8625
21 lane-count:
26 use-external-pwm:
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H A Dlvds-codec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Transparent LVDS encoders and decoders
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This binding supports transparent LVDS encoders and decoders that don't
16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
18 to LVDS panels. This binding targets devices compatible with the following
21 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
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H A Dthine,thc63lvd1024.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/thine,thc63lvd1024.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Thine Electronics THC63LVD1024 LVDS Decoder
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The THC63LVD1024 is a dual link LVDS receiver designed to convert LVDS
16 modes, handling up to two LVDS input streams and up to two digital CMOS/TTL
34 even-numbered pixels are received on port@0 and odd-numbered pixels on
[all …]
H A Drenesas,lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/renesas,lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car LVDS Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
[all …]
H A Dps8622.txt1 ps8622-bridge bindings
4 - compatible: "parade,ps8622" or "parade,ps8625"
5 - reg: first i2c address of the bridge
6 - sleep-gpios: OF device-tree gpio specification for PD_ pin.
7 - reset-gpios: OF device-tree gpio specification for RST_ pin.
10 - lane-count: number of DP lanes to use
11 - use-external-pwm: backlight will be controlled by an external PWM
12 - video interfaces: Device node can contain video interface port
15 [1]: Documentation/devicetree/bindings/media/video-interfaces.txt
18 lvds-bridge@48 {
[all …]
H A Dptn3460.txt1 ptn3460 bridge bindings
4 - compatible: "nxp,ptn3460"
5 - reg: i2c address of the bridge
6 - powerdown-gpio: OF device-tree gpio specification for PD_N pin.
7 - reset-gpio: OF device-tree gpio specification for RST_N pin.
8 - edid-emulation: The EDID emulation entry to use
9 +-------+------------+------------------+
18 +-------+------------+------------------+
20 - video interfaces: Device node can contain video interface port
23 [1]: Documentation/devicetree/bindings/media/video-interfaces.txt
[all …]
H A Dmegachips-stdpxxxx-ge-b850v3-fw.txt2 STDP4028-ge-b850v3-fw bridges (LVDS-DP)
3 STDP2690-ge-b850v3-fw bridges (DP-DP++)
7 Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
9 Each bridge has a dedicated flash containing firmware for supporting the custom
12 suffix "-ge-b850v3-fw" to make it clear that the driver is for the bridges with
19 stdp4028-ge-b850v3-fw required properties:
20 - compatible : "megachips,stdp4028-ge-b850v3-fw"
21 - reg : I2C bus address
22 - interrupts : one interrupt should be described here, as in
24 - ports : One input port(reg = <0>) and one output port(reg = <1>)
[all …]
H A Dfsl,imx8qxp-pixel-link.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
27 - fsl,imx8qm-dc-pixel-link
28 - fsl,imx8qxp-dc-pixel-link
30 fsl,dc-id:
36 fsl,dc-stream-id:
52 "^port@[1-4]$":
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/freebsd/sys/contrib/device-tree/Bindings/display/imx/
H A Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
3 LVDS Display Bridge
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dst,stm32mp25-lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/st,stm32mp25-lvds.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 LVDS Display Interface Transmitter
10 - Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
11 - Yannick Fertre <yannick.fertre@foss.st.com>
14 The STMicroelectronics STM32 LVDS Display Interface Transmitter handles the
15 LVDS protocol: it maps the pixels received from the upstream Pixel-DMA (LTDC)
16 onto the LVDS PHY.
[all …]
H A Dxylon,logicvc-display.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/xylon,logicvc-display.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
16 with Xilinx Zynq-7000 SoCs and Xilinx FPGAs.
20 synthesis time. As a result, many of the device-tree bindings are meant to
24 Layers are declared in the "layers" sub-node and have dedicated configuration.
32 - xylon,logicvc-3.02.a-display
33 - xylon,logicvc-4.01.a-display
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1028a-kontron-sl28.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Device Tree file for the Kontron SMARC-sAL28 board.
9 /dts-v1/;
10 #include "fsl-ls1028a.dtsi"
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-binding
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/freebsd/sys/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,imx8mp-media-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Elder <paul.elder@ideasonboard.com>
13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
20 - const: fsl,imx8mp-media-blk-ctrl
21 - const: syscon
26 '#address-cells':
29 '#size-cells':
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-udoo.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
19 stdout-path = &uart2;
23 compatible = "gpio-backlight";
25 default-on;
29 gpio-poweroff {
30 compatible = "gpio-poweroff";
32 pinctrl-0 = <&pinctrl_power_off>;
33 pinctrl-names = "default";
43 * in reality it is a -20t (parallel) model,
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H A Dimx6q-b850v3.dts5 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "imx6q-bx50v3.dtsi"
49 compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q";
52 stdout-path = &uart3;
57 fsl,dual-channel;
60 lvds0: lvds-channel@0 {
61 fsl,data-mappin
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