Searched full:lane3 (Results 1 – 6 of 6) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | phy-rockchip-usbdp.yaml | 61 lane3. For 4 lanes DP lanes map, we could have "rockchip,dp-lane-mux =
63 phy lane1, DP lane2 on Type-C phy lane2, DP lane3 on Type-C phy lane3. If
|
| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-8040-mcbin.dtsi | 189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
|
| /freebsd/sys/contrib/alpine-hal/ |
| H A D | al_hal_pcie_axi_reg.h | 268 uint32_t lane3; member
278 uint32_t lane3; member
|
| H A D | al_hal_pcie.c | 1024 pcie_port->regs->axi.status.lane[3] = ®s->axi.status.lane3; in al_pcie_port_handle_init()
1091 pcie_port->regs->axi.status.lane[3] = ®s->axi.status.lane3; in al_pcie_port_handle_init()
1172 pcie_port->regs->axi.status.lane[3] = ®s->axi.status.lane3; in al_pcie_port_handle_init()
|
| /freebsd/usr.sbin/cxgbetool/ |
| H A D | reg_defs_t5.c | 42600 { "Lane3", 3, 1 },
46672 { "Lane3", 3, 1 },
50744 { "Lane3", 3, 1 },
54816 { "Lane3", 3, 1 },
|
| /freebsd/sys/dev/qlnx/qlnxe/ |
| H A D | reg_addr.h | 3637 … (0xf<<24) // Latest Transmitter Preset Requested from Upstream Component on Lane3
3639 … (0x7<<28) // Latest Receiver Preset Requested from Upstream Component on Lane3
11240 …xf<<12) // Real-time indication from FEC deskew FIFO per lane; bit 12 = lane 0 upto bit 15 = lane3.
28628 …SR_5_X401_L3_MASTER_CDN_O_K2_E5 (0x1<<3) // Lane3 master reset
35960 …R_5_X401_L3_MASTER_CDN_O_K2_E5 (0x1<<3) // Lane3 master reset
40392 … 0x0542ccUL //Access:R DataWidth:0x20 // Lane3 debug signal bus t…
40393 … 0x0542d0UL //Access:R DataWidth:0x20 // Lane3 debug signal bus t…
40394 … 0x0542d4UL //Access:R DataWidth:0xe // Lane3 debug signal bus t…
67213 …ff. LANE1 registers = 0x2000-0x27ff. LANE2 registers = 0x2800-0x2fff. LANE3 registers = 0x30…
|