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Searched full:lane2 (Results 1 – 15 of 15) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-rockchip-usbdp.yaml60 3>;", assuming DP lane0 on Type-C phy lane2, DP lane1 on Type-C phy
63 phy lane1, DP lane2 on Type-C phy lane2, DP lane3 on Type-C phy lane3. If
H A Dqcom,msm8996-qmp-pcie-phy.yaml89 - lane2
H A Dfsl,imx8qm-hsio.yaml55 | | Lane0| Lane1| Lane2|
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dmediatek-pcie-gen3.yaml86 enum: [ phy, mac, phy-lane0, phy-lane1, phy-lane2 ]
246 - const: phy-lane2
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-8040-mcbin.dtsi189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_pcie_axi_reg.h266 uint32_t lane2; member
276 uint32_t lane2; member
H A Dal_hal_pcie.c1023 pcie_port->regs->axi.status.lane[2] = &regs->axi.status.lane2; in al_pcie_port_handle_init()
1090 pcie_port->regs->axi.status.lane[2] = &regs->axi.status.lane2; in al_pcie_port_handle_init()
1171 pcie_port->regs->axi.status.lane[2] = &regs->axi.status.lane2; in al_pcie_port_handle_init()
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j784s4-main.dtsi89 <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */
91 <0x18 0x3>, <0x1c 0x3>, /* SERDES1 lane2/3 select */
93 <0x28 0x3>, <0x2c 0x3>; /* SERDES2 lane2/3 select */
H A Dk3-j7200-main.dtsi40 <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */
H A Dk3-j721s2-main.dtsi65 <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */
H A Dk3-j721e-main.dtsi56 <0x48 0x3>, <0x4c 0x3>; /* SERDES4 lane2/3 select */
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp3098 unsigned Lane2 = Ins2.getConstantOperandVal(2); in tryInsertVectorElt() local
3099 if (Lane2 % 2 != 0 || Lane1 != Lane2 + 1) in tryInsertVectorElt()
3130 ARM::ssub_0 + Lane2 / 2, dl, VT, Ins2.getOperand(0), in tryInsertVectorElt()
3149 CurDAG->getTargetInsertSubreg(ARM::ssub_0 + Lane2 / 2, dl, MVT::v4f32, in tryInsertVectorElt()
3161 CurDAG->getTargetInsertSubreg(ARM::ssub_0 + Lane2 / 2, dl, MVT::v4f32, in tryInsertVectorElt()
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996.dtsi739 reset-names = "lane2";
/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h3405 … the EVENT_COUNTER_DATA_REG register. - 0x0: Lane0 - 0x1: Lane1 - 0x2: Lane2 - .. - 0xF: Lane…
3629 … (0xf<<8) // Latest Transmitter Preset Requested from Upstream Component on Lane2
3631 … (0x7<<12) // Latest Receiver Preset Requested from Upstream Component on Lane2
3801 …M Detect state and uses this value instead. - 0: Lane0 - 1: Lane1 - 2: Lane2 - .. - 15: Lane1…
3825 …ug Status Register of Layer1-PerLane. - 0x0: Lane0 - 0x1: Lane1 - 0x2: Lane2 - .. - 0xF: Lane…
3935 …_EQ_STATUS[1/2/3] viewport registers. - 0x0: Lane0 - 0x1: Lane1 - 0x2: Lane2 - .. - 0xF: Lane…
4142 … detect state and uses this value instead. 0x0 = Lane0. 0x1 = Lane1. 0x2 = Lane2. 0x7 = Lane7.
4186 …bug status register of Layer1-PerLane. 0x0 = Lane0. 0x1 = Lane1. 0x2 = Lane2. 0x7 = Lane7. 0…
4298 …D_EQ_STATUS[1/2/3] viewport registers. 0x0 = Lane0. 0x1 = Lane1. 0x2 = Lane2. _ ... 0x7 = Lan…
28626 …SR_5_X401_L2_MASTER_CDN_O_K2_E5 (0x1<<2) // Lane2 master reset
[all …]
/freebsd/usr.sbin/cxgbetool/
H A Dreg_defs_t5.c42601 { "Lane2", 2, 1 },
46673 { "Lane2", 2, 1 },
50745 { "Lane2", 2, 1 },
54817 { "Lane2", 2, 1 },