lane\-count (full) in projects: freebsd

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Searched +full:lane +full:- +full:count (Results 1 – 25 of 199) sorted by relevance

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/freebsd/sys/contrib/device-tree/Bindings/display/bridge/
H A D	parade,ps8622.yaml	`1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 15 - parade,ps8622 16 - parade,ps8625 21 lane-count: 26 use-external-pwm: 30 reset-gpios: 34 sleep-gpios: [all …]`
H A D	ps8622.txt	1 ps8622-bridge bindings 4 - compatible: "parade,ps8622" or "parade,ps8625" 5 - reg: first i2c address of the bridge 6 - sleep-gpios: OF device-tree gpio specification for PD_ pin. 7 - reset-gpios: OF device-tree gpio specification for RST_ pin. 10 - lane-count: number of DP lanes to use 11 - use-external-pwm: backlight will be controlled by an external PWM 12 - video interfaces: Device node can contain video interface port 15 [1]: Documentation/devicetree/bindings/media/video-interfaces.txt 18 lvds-bridge@48 { [all …]
/freebsd/sys/arm64/rockchip/
H A D	rk3568_pciephy.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 49 #include <contrib/device-tree/include/dt-bindings/phy/phy.h> 69 {"rockchip,rk3568-pcie3-phy", 1}, 87 rk3568_pciephy_bifurcate(device_t dev, int control, uint32_t lane) in rk3568_pciephy_bifurcate() argument 91 switch (lane) { in rk3568_pciephy_bifurcate() 93 SYSCON_WRITE_4(sc->phy_grf, control, GRF_PCIE30PHY_WR_EN); in rk3568_pciephy_bifurcate() 96 SYSCON_WRITE_4(sc->phy_grf, control, in rk3568_pciephy_bifurcate() 100 SYSCON_WRITE_4(sc->phy_grf, control, in rk3568_pciephy_bifurcate() 104 device_printf(dev, "Illegal lane %d\n", lane); in rk3568_pciephy_bifurcate() [all …]
/freebsd/sys/contrib/alpine-hal/
H A D	al_hal_serdes_internal_regs.h	`1 /- 10 found at http://www.gnu.org/licenses/gpl-2.0.html 44 Per lane register fields 47 * RX and TX lane hard reset 48 * 0 - Hard reset is asserted 49 * 1 - Hard reset is de-asserted 57 * RX and TX lane hard reset control 58 * 0 - Hard reset is taken from the interface pins 59 * 1 - Hard reset is taken from registers 66 /* RX lane power state control */ [all …]`
H A D	al_hal_serdes_hssp_internal_regs.h	`9 found at http://www.gnu.org/licenses/gpl-2.0.html 43 * Per lane register fields 46 * RX and TX lane hard reset 47 * 0 - Hard reset is asserted 48 * 1 - Hard reset is de-asserted 56 * RX and TX lane hard reset control 57 * 0 - Hard reset is taken from the interface pins 58 * 1 - Hard reset is taken from registers 65 /* RX lane power state control / 74 / TX lane power state control */ [all …]`
H A D	al_hal_serdes_interface.h	`9 found at http://www.gnu.org/licenses/gpl-2.0.html 53 /* INDENT-OFF / 57 / INDENT-ON / 120 Parallel loopback from the PMA receive lane data ports, to the 121 * transmit lane data ports 178 * Tx de-emphasis parameters 183 AL_SERDES_TX_DEEMP_C_MINUS, /< c(-1) / 196 * Transmit Amplitude control signal. Used to define the full-scale 198 * 000 - Not Supported 199 * 001 - 952mVdiff-pkpk [all …]`
H A D	al_hal_serdes_hssp.c	9 found at http://www.gnu.org/licenses/gpl-2.0.html 56 /* c(-1) configurations / 111 Lane Rx rate change software flow disable 115 enum al_serdes_lane lane); 124 * Lane Rx rate change software flow enable if all conditions met 128 enum al_serdes_lane lane); 508 enum al_serdes_lane lane) in al_serdes_lane_rx_rate_change_sw_flow_en() argument 510 al_serdes_reg_write(obj, (enum al_serdes_reg_page)lane, AL_SRDS_REG_TYPE_PMA, 201, 0xfc); in al_serdes_lane_rx_rate_change_sw_flow_en() 511 al_serdes_reg_write(obj, (enum al_serdes_reg_page)lane, AL_SRDS_REG_TYPE_PMA, 202, 0xff); in al_serdes_lane_rx_rate_change_sw_flow_en() 512 al_serdes_reg_write(obj, (enum al_serdes_reg_page)lane, AL_SRDS_REG_TYPE_PMA, 203, 0xff); in al_serdes_lane_rx_rate_change_sw_flow_en() [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A D	MVETailPredication.cpp	1 //===- MVETailPredication.cpp - MVE Tail Predication ------------- C++ --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 10 /// Armv8.1m introduced MVE, M-Profile Vector Extension, and low-overhead 12 /// combined with a new form of predication called tail-predication, can be used 13 /// to provide implicit vector predication within a low-overhead loop. 17 /// DLSTP and WLSTP instructions, which setup a tail-predicated loop and the 18 /// the total number of data elements processed by the loop. The loop-end 23 /// backend will attempt to convert into a low-overhead loop. The vectorizer is 25 /// predicated upon an get.active.lane.mask intrinsic. This pass looks at these [all …]
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A D	VPlan.h	1 //===- VPlan.h - Represent A Vectorizer Plan --------------------- C++ --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 23 //===----------------------------------------------------------------------===// 97 /// A range of powers-of-2 vectorization factors with fixed start and 154 /// vectors, where for the latter the lane index sometimes needs calculating 158 /// Kind describes how to interpret Lane. 160 /// For First, Lane is the index into the first N elements of a 161 /// fixed-vector <N x <ElTy>> or a scalable vector <vscale x N x <ElTy>>. 163 /// For ScalableLast, Lane is the offset from the start of the last [all …]
H A D	VPlan.cpp	1 //===- VPlan.cpp - Vectorizer Plan ----------------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 /// before generating LLVM-IR. 15 /// LLVM-IR code. 17 //===----------------------------------------------------------------------===// 64 (Instr && Instr->getParent()) ? Instr->getParent()->getPlan() : nullptr); in operator <<() 74 // Lane = RuntimeVF - VF.getKnownMinValue() + Lane in getAsRuntimeExpr() 76 Builder.getInt32(VF.getKnownMinValue() - Lane)); in getAsRuntimeExpr() 78 return Builder.getInt32(Lane); in getAsRuntimeExpr() [all …]
H A D	VPlanTransforms.h	1 //===- VPlanTransforms.h - Utility VPlan to VPlan transforms --------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 38 /// Sink users of fixed-order recurrences after the recipe defining their 43 /// \returns true if all users of fixed-order recurrences could be re-arranged 57 /// Apply VPlan-to-VPlan optimizations to \p Plan, including induction recipe 62 /// Wrap predicated VPReplicateRecipes with a mask operand in an if-then 68 /// Replace (ICMP_ULE, wide canonical IV, backedge-taken-count) checks with an 69 /// (active-lane-mask recipe, wide canonical IV, trip-count). If \p [all …]
H A D	VPlanTransforms.cpp	1 //===-- VPlanTransforms.cpp - Utility VPlan to VPlan transforms -----------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 37 Plan->getVectorLoopRegion()); in VPInstructionsToVPRecipes() 40 if (!VPBB->getParent()) in VPInstructionsToVPRecipes() 42 VPRecipeBase Term = VPBB->getTerminator(); in VPInstructionsToVPRecipes() 43 auto EndIter = Term ? Term->getIterator() : VPBB->end(); in VPInstructionsToVPRecipes() 46 make_early_inc_range(make_range(VPBB->begin(), EndIter))) { in VPInstructionsToVPRecipes() 49 Instruction Inst = cast<Instruction>(VPV->getUnderlyingValue()); in VPInstructionsToVPRecipes() [all …]
/freebsd/sys/dev/hwpmc/
H A D	hwpmc_ppc970.c	1 /- 2 SPDX-License-Identifier: BSD-2-Clause 46 ((r & ~(0x1f << (7 * (1 - i) + 1))) \| (x << (7 * (1 - i) + 1))) 47 /* MMCR1 has 6 PMCSEL items (PMC3->PMC8), in sequence. / 49 ((r & ~(0x1f << (5 * (7 - i) + 2))) \| (x << (5 * (7 - i) + 2))) 53 * Any PMC can count a direct event. Indirect events are handled specially. 56 * Encoding 00 000 -- Add byte lane bit counters 57 * MMCR1[24:31] -- select bit matching PMC being an adder. 59 * PMCxSEL: 1x -- select from byte lane: 10 == lower lane (0/1), 11 == upper 60 * lane (2/3). [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/
H A D	uncore-other.json	10 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.… 20 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) ", 164 "ScaleUnit": "7.11E-06Bytes", 174 "ScaleUnit": "7.11E-06Bytes", 355 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed", 360 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory st… 365 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed", 370 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory s… 375 …"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory writ… 380 …"PublicDescription": "Counts only multi-socket cacheline Directory state updates memory writes iss… [all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/
H A D	uncore-other.json	10 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.… 20 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) ", 164 "ScaleUnit": "7.11E-06Bytes", 174 "ScaleUnit": "7.11E-06Bytes", 355 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Not Needed", 360 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory st… 365 "BriefDescription": "Multi-socket cacheline Directory state lookups; Snoop Needed", 370 …"PublicDescription": "Counts transactions that looked into the multi-socket cacheline Directory s… 375 …"BriefDescription": "Multi-socket cacheline Directory state updates; Directory Updated memory writ… 380 …"PublicDescription": "Counts only multi-socket cacheline Directory state updates memory writes iss… [all …]
/freebsd/sys/contrib/device-tree/Bindings/soundwire/
H A D	qcom,soundwire.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schema [all...]`
H A D	qcom,sdw.txt	`7 - compatible: 10 Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>", 12 "qcom,soundwire-v1.3.0" 13 "qcom,soundwire-v1.5.0" 14 "qcom,soundwire-v1.5.1" 15 "qcom,soundwire-v1.6.0" 16 - reg: 18 Value type: <prop-encoded-array> 22 - interrupts: 24 Value type: <prop-encoded-array> [all …]`
/freebsd/lib/libpmc/pmu-events/arch/x86/tremontx/
H A D	uncore-other.json	11 …"BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_cha_tor_inserts.… 23 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) ", 313 …"PublicDescription": "Counts when a normal (Non-Isochronous) read is issued to any of the memory c… 318 "BriefDescription": "CHA to iMC Full Line Writes Issued : Full Line Non-ISOCH", 324 …"PublicDescription": "Counts when a normal (Non-Isochronous) full line write is issued from the CH… 335 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa… 352 "BriefDescription": "Snoop filter capacity evictions for E-state entries.", 358 …lter is full and evicts an existing entry to track a new entry.? Does not count clean evictions su… 363 "BriefDescription": "Snoop filter capacity evictions for M-state entries.", 369 …lter is full and evicts an existing entry to track a new entry.? Does not count clean evictions su… [all …]
/freebsd/sys/contrib/device-tree/Bindings/display/samsung/
H A D	samsung,exynos5-dp.yaml	`1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos5-dp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 17 const: samsung,exynos5-dp 25 clock-names: [all …]`
/freebsd/sys/contrib/openzfs/module/zfs/
H A D	zio_inject.c	1 // SPDX-License-Identifier: CDDL-1.0 10 * or https://opensource.org/licenses/CDDL-1.0. 26 * Copyright (c) 2024-2025, Klara, Inc. 89 * above. Thus modifications to this count must be a RW_WRITER of the 90 * inject_lock, and reads of this count must be (at least) a RW_READER 139 if (zb->zb_objset == DMU_META_OBJSET && in zio_match_handler() 140 record->zi_objset == DMU_META_OBJSET && in zio_match_handler() 141 record->zi_object == DMU_META_DNODE_OBJECT) { in zio_match_handler() 142 if (record->zi_type == DMU_OT_NONE \|\| in zio_match_handler() 143 type == record->zi_type) in zio_match_handler() [all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/Frontend/OpenMP/
H A D	OMPIRBuilder.h	1 //===- IR/OpenMPIRBuilder.h - OpenMP encoding builder for LLVM IR - C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 12 //===----------------------------------------------------------------------===// 55 /// llvm::SplitBasicBlock and BasicBlock::splitBasicBlock require a well-formed 81 /// Captures attributes that affect generating LLVM-IR using the 90 /// is set when the -fopenmp-is-target-device compiler frontend option is 98 /// if `IsGPU` is true. This restriction might be lifted if an accelerator- 203 unsigned Count; member 205 TargetRegionEntryInfo() : DeviceID(0), FileID(0), Line(0), Count(0) {} in TargetRegionEntryInfo() [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A D	AMDKernelCodeT.h	1 //===-- AMDGPUKernelCodeT.h - Print AMDGPU assembly code ---------- C++ --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===// 16 //---------------------------------------------------------------------------// 18 //---------------------------------------------------------------------------// 82 /// Used to set COMPUTE_PGM_RSRC2.USER_SGPR (set to total count of 87 …BUFFER = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_WIDTH) - 1) << AMD_CODE_PROPE… 91 …GPR_DISPATCH_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_WIDTH) - 1) << AMD_CODE_PROPE… 95 …AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_WIDTH) - … [all …]
H A D	SILowerI1Copies.cpp	1 //===-- SILowerI1Copies.cpp - Lower I1 Copies -----------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 10 // to lane masks (32 / 64-bit scalar registers). The pass assumes machine SSA 11 // form and a wave-level control flow graph. 14 // within the same basic block are already represented as lane masks in scalar 22 //===----------------------------------------------------------------------===// 30 #define DEBUG_TYPE "si-i1-copies" 87 return Reg.isVirtual() && MRI->getRegClass(Reg) == &AMDGPU::VReg_1RegClass; in isVreg1() 99 MRI->constrainRegClass(Reg, &AMDGPU::SReg_1_XEXECRegClass); in cleanConstrainRegs() [all …]
/freebsd/sys/dev/al_eth/
H A D	al_init_eth_kr.c	1 /- 38 @brief auto-negotiation and link training algorithms and state machines 44 * - preparation - waiting till the link partner (lp) will be ready and 46 * - measurement (per coefficient) - issue decrement for the coefficient 49 * - completion - indicate the receiver is ready and wait for the lp to 54 /* timeout in mSec before auto-negotiation will be terminated */ 107 enum al_serdes_lane lane; member 137 rc = al_eth_kr_an_init(kr_data->adapter, an_adv); in al_eth_kr_an_run() 140 kr_data->adapter->name, __func__); in al_eth_kr_an_run() 144 rc = al_eth_kr_an_start(kr_data->adapter, AL_ETH_AN__LT_LANE_0, in al_eth_kr_an_run() [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A D	X86InstCombineIntrinsic.cpp	1 //===-- X86InstCombineIntrinsic.cpp - X86 specific InstCombine pass -------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 14 //===----------------------------------------------------------------------===// 31 VectorType *IntTy = VectorType::getInteger(cast<VectorType>(V->getType())); in getNegativeIsTrueBoolVec() 49 ExtMask->getType()->isIntOrIntVectorTy(1)) in getBoolVecFromMask() 63 // Zero Mask - masked load instruction creates a zero vector. in simplifyX86MaskedLoad() 68 // intrinsic to the LLVM intrinsic to allow target-independent optimizations. in simplifyX86MaskedLoad() 72 unsigned AddrSpace = cast<PointerType>(Ptr->getType())->getAddressSpace(); in simplifyX86MaskedLoad() 76 // The pass-through vector for an x86 masked load is a zero vector. in simplifyX86MaskedLoad() [all …]

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