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/freebsd/share/man/man4/
H A Dmac_biba.41 .\" Copyright (c) 2002-2004 Networks Associates Technology, Inc.
7 .\" DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the
40 .Bd -ragged -offset indent
47 .Bd -ragged -offset indent
53 .Bd -literal -offset indent
63 up of hierarchal grades, and non-hierarchal components.
68 with higher values reflecting higher integrity.
69 The non-hierarchal compartment field is expressed as a set of up to 256
71 A complete label consists of both hierarchal and non-hierarchal elements.
74 .Bl -column -offset indent ".Li biba/equal" "lower than all other labels"
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H A Dmac_mls.41 .\" Copyright (c) 2002-2004 Networks Associates Technology, Inc.
7 .\" DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the
36 .Nd "Multi-Level Security confidentiality policy"
40 .Bd -ragged -offset indent
47 .Bd -ragged -offset indent
53 .Bd -literal -offset indent
59 policy module implements the Multi-Level Security, or MLS model,
72 65535, with higher values reflecting higher sensitivity levels.
78 With normal labels, dominance is defined as a label having a higher
85 .Dq Li higher
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H A Dmac_lomac.47 .\" DARPA/SPAWAR contract N66001-01-C-8035 ("CBOSS"), as part of the
36 .Nd "Low-watermark Mandatory Access Control data integrity policy"
40 .Bd -ragged -offset indent
47 .Bd -ragged -offset indent
53 .Bd -literal -offset indent
71 with higher values reflecting higher integrity.
74 .Bl -column -offset indent ".Sy Label" "dominated by all other labels"
91 .Dq Li lomac/equal(equal-equal)
109 .Bd -literal -offset indent
118 greater or equal integrity to the low end of the range, and lesser or equal
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H A Dng_l2cap.41 .\" Copyright (c) 2001-2002 Maksim Yevmenkin <m_evmenkin@yahoo.com>
45 L2CAP provides connection-oriented and connectionless data services to upper
48 L2CAP permits higher level
52 .Bl -enum -offset indent
60 The Baseband always provides the impression of full-duplex communication
62 This does not imply that all L2CAP communications are bi-directional.
78 Each channel is bound to a single protocol in a many-to-one fashion.
83 the appropriate higher level protocol.
85 Each one of the end-points of an L2CAP channel is referred to by a channel
88 channel end-point on the device.
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/freebsd/contrib/wpa/src/wps/
H A Dwps.h2 * Wi-Fi Protected Setup
3 * Copyright (c) 2007-2016, Jouni Malinen <j@w1.fi>
16 * enum wsc_op_code - EAP-WSC OP-Code values
34 * struct wps_credential - WPS Credential
71 * struct wps_device_data - WPS Device Data
73 * @device_name: Device Name (0..32 octets encoded in UTF-8)
74 * @manufacturer: Manufacturer (0..64 octets encoded in UTF-8)
75 * @model_name: Model Name (0..32 octets encoded in UTF-8)
76 * @model_number: Model Number (0..32 octets encoded in UTF-8)
77 * @serial_number: Serial Number (0..32 octets encoded in UTF-8)
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/freebsd/contrib/llvm-project/lld/docs/ELF/
H A Dwarn_backrefs.rst1 --warn-backrefs
4 ``--warn-backrefs`` gives a warning when an undefined symbol reference is
10 ``--start-lib`` and ``--end-lib`` that archive will be searched for resolving
21 backward references. If there are cyclic references then the ``--start-group``
22 and ``--end-group`` options can be used, or the same archive can be placed on
29 ``--start-group`` and ``--end-group`` options are redundant.
37 The ``warn-backrefs`` option provides information that helps identify cases
40 | % ld.lld --warn-backrefs ... -lB -lA
43 | % ld.lld --warn-backrefs ... --start-lib B/b.o --end-lib --start-lib A/a.o --end-lib
46 …# To suppress the warning, you can specify --warn-backrefs-exclude=<glob> to match B/b.o or B.a(b.…
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/freebsd/contrib/llvm-project/compiler-rt/lib/xray/
H A Dxray_arm.cpp1 //===-- xray_arm.cpp --------------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 // Implementation of ARM-specific routines (32-bit).
13 //===----------------------------------------------------------------------===//
20 extern "C" void __clear_cache(void *start, void *end);
32 // 0xUUUUWXYZ -> 0x000W0XYZ
37 // 0xWXYZUUUU -> 0x000W0XYZ
44 // MOVT R<regNo>, #<higher 16 bits of the |Value|>
60 // MOVT r0, #<higher 16 bits of the |Value|>
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/
H A Dicl-metrics.json3 …Total pipeline cost of branch related instructions (used for program control-flow including functi…
4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR…
9 …of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and B…
10- INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS) * ( (ICACHE_64B.IFTAG_STALL / CPU_CLK_UNHALTED.THREAD) …
27 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
33 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
39 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor",
45 "BriefDescription": "The ratio of Executed- by Issued-Uops",
49 …"PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop m…
52 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
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/freebsd/contrib/llvm-project/compiler-rt/lib/sanitizer_common/
H A Dsanitizer_procmaps_common.cpp1 //===-- sanitizer_procmaps_common.cpp -------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
28 return c - '0'; in TranslateDigit()
30 return c - 'a' + 10; in TranslateDigit()
32 return c - 'A' + 10; in TranslateDigit()
33 return -1; in TranslateDigit()
36 // Parse a number and promote 'p' up to the first non-digit character.
69 module->addAddressRange(start, end, IsExecutable(), IsWritable()); in AddAddressRanges()
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/
H A Dicx-metrics.json3 …Total pipeline cost of branch related instructions (used for program control-flow including functi…
4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR…
9 …of instruction fetch related bottlenecks by large code footprint programs (i-side cache; TLB and B…
10- INT_MISC.UOP_DROPPING ) / TOPDOWN.SLOTS) * ( (ICACHE_64B.IFTAG_STALL / CPU_CLK_UNHALTED.THREAD) …
39 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
45 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
51 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor",
57 "BriefDescription": "The ratio of Executed- by Issued-Uops",
61 …"PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop m…
64 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
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/freebsd/contrib/llvm-project/compiler-rt/lib/fuzzer/
H A DFuzzerDataFlowTrace.cpp1 //===- FuzzerDataFlowTrace.cpp - DataFlowTrace ---*- C++ -* ===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
70 It == Functions.end() in AppendCoverage()
72 .first->second in AppendCoverage()
73 : It->second; in AppendCoverage()
96 // Give higher weight if the function has a DFT. in FunctionWeights()
98 // Give higher weight to functions with less frequently seen basic blocks. in FunctionWeights()
100 // Give higher weight to functions with the most uncovered basic blocks. in FunctionWeights()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNILPSched.cpp1 //===---------------------------- GCNILPSched.cpp - -----------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
17 #define DEBUG_TYPE "machine-scheduler"
37 /// CurCycle - The current scheduler state corresponds to this cycle.
55 /// CalcNodeSethiUllmanNumber - Compute Sethi Ullman number.
56 /// Smaller number is the higher priority.
59 unsigned &SethiUllmanNumber = SUNumbers[SU->NodeNum]; in CalcNodeSethiUllmanNumber()
64 for (const SDep &Pred : SU->Preds) { in CalcNodeSethiUllmanNumber()
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H A DSIModeRegisterDefaults.h1 //===-- SIModeRegisterDefaults.h --------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
22 /// propagate signaling NaN inputs per IEEE 754-2008. Min_dx10 and max_dx10
23 /// become IEEE 754- 2008 compliant due to signaling NaN propagation and
27 /// Used by the vector ALU to force DX10-style treatment of NaNs: when set,
83 // FIXME: Inlining should be OK for dx10-clamp, since the caller's mode should
108 // the standard values, otherwise, these values are sorted such that higher
109 // hardware encoded values have higher enum values.
154 } // end namespace AMDGPU
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonConstExtenders.cpp1 //===- HexagonConstExtenders.cpp ------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
28 #define DEBUG_TYPE "hexagon-cext-opt"
33 "hexagon-cext-threshold", cl::init(3), cl::Hidden,
37 ReplaceLimit("hexagon-cext-limit", cl::init(0), cl::Hidden,
47 int32_t U = (V & -A) + O; in adjustUp()
53 int32_t U = (V & -A) + O; in adjustDown()
54 return U <= V ? U : U-A; in adjustDown()
74 if (Offset >= A.Offset && (Offset - A.Offset) % A.Align == 0) { in intersect()
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/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/
H A Dadl-metrics.json3 …Total pipeline cost of branch related instructions (used for program control-flow including functi…
4 … 3 * BR_INST_RETIRED.NEAR_CALL + (BR_INST_RETIRED.NEAR_TAKEN - BR_INST_RETIRED.COND_TAKEN - 2 * BR…
24 … "BriefDescription": "Per-Logical Processor actual clocks when the Logical Processor is active.",
31 …"BriefDescription": "Total issue-pipeline slots (per-Physical Core till ICL; per-Logical Processor…
38 … "BriefDescription": "Fraction of Physical Core issue-slots utilized by this Logical Processor",
45 "BriefDescription": "The ratio of Executed- by Issued-Uops",
49 …"PublicDescription": "The ratio of Executed- by Issued-Uops. Ratio > 1 suggests high rate of uop m…
53 "BriefDescription": "Instructions Per Cycle across hyper-threads (per physical core)",
67 …"BriefDescription": "Actual per-core usage of the Floating Point execution units (regardless of th…
71 …on": "Actual per-core usage of the Floating Point execution units (regardless of the vector width)…
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/freebsd/sys/riscv/riscv/
H A Dbus_space_asm.S1 /*-
2 * Copyright (c) 2016-2020 Ruslan Bukin <br@bsdpad.com>
7 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
11 * UK Higher Education Innovation Fund (HEIF).
40 END(generic_bs_r_1)
46 END(generic_bs_r_2)
52 END(generic_bs_r_4)
58 END(generic_bs_r_8)
64 END(generic_bs_w_1)
70 END(generic_bs_w_2)
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/freebsd/contrib/llvm-project/lldb/source/Target/
H A DThreadPlanStepUntil.cpp1 //===-- ThreadPlanStepUntil.cpp --------
89 until_collection::iterator pos, end = m_until_points.end(); Clear() local
111 until_collection::iterator pos, end = m_until_points.end(); GetDescription() local
135 until_collection::iterator pos, end = m_until_points.end(); ValidatePlan() local
192 until_collection::iterator pos, end = m_until_points.end(); AnalyzeStop() local
285 until_collection::iterator pos, end = m_until_points.end(); DoWillResume() local
305 until_collection::iterator pos, end = m_until_points.end(); WillStop() local
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/freebsd/share/man/man9/
H A Dmi_switch.948 function implements the machine-independent prelude to a thread context
54 Inter-Processor Interrupt (IPI).
59 .Bl -enum -offset indent
69 Involuntary preemption due to arrival of a higher-priority thread.
71 At the tail end of
102 .Bl -tag -offset indent -width "SWT_REMOTEWAKEIDLE"
122 Preemption by a higher-priority thread, initiated by a remote processor.
157 to perform the low-level context switch.
160 is the machine-dependent function that performs the actual switch from the
/freebsd/share/man/man7/
H A Dtuning.731 .Sh SYSTEM SETUP - DISKLABEL, NEWFS, TUNEFS, SWAP
63 partitions are read-mostly, with very little writing, while
68 heavily write-loaded partitions will not bleed over into the mostly-read
81 .Dq Li "tunefs -n enable /filesystem" .
82 Softupdates drastically improves meta-data performance, mainly file
103 A number of run-time
117 file systems normally update the last-accessed time of a file or
138 atime turned on for mostly read-only partitions such as
161 or essentially read-only partitions such as
170 File systems tend to store meta-data on power-of-2 boundaries
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/freebsd/sys/contrib/openzfs/tests/zfs-tests/tests/functional/mmap/
H A Dmmap_ftruncate.ksh1 #!/bin/ksh -p
2 # SPDX-License-Identifier: CDDL-1.0
11 # or https://opensource.org/licenses/CDDL-1.0.
21 # CDDL HEADER END
58 rm -f $TESTFILE
63 log_must zpool sync -f
66 typeset -i start=$(date +%s)
68 typeset -i end=$(date +%s)
69 typeset -i delta=$((end - start))
72 # when this test passes, the ftruncate() call itself should be near-instant.
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/freebsd/contrib/llvm-project/llvm/lib/WindowsManifest/
H A DWindowsManifestMerger.cpp1 //===-- WindowsManifestMerger.cpp ------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===---------------------------------------------------------------------===//
11 //===---------------------------------------------------------------------===//
60 {"urn:schemas-microsoft-com:asm.v1", "ms_asmv1"},
61 {"urn:schemas-microsoft-com:asm.v2", "ms_asmv2"},
62 {"urn:schemas-microsoft-com:asm.v3", "ms_asmv3"},
65 {"urn:schemas-microsoft-com:compatibility.v1", "ms_compatibilityv1"}};
88 for (xmlNodePtr Child = Parent->children; Child; Child = Child->next) { in getChildWithName()
89 if (xmlStringsEqual(Child->name, ElementName)) { in getChildWithName()
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/freebsd/lib/libc/riscv/gen/
H A Dsigsetjmp.S1 /*-
7 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
11 * UK Higher Education Innovation Fund (HEIF).
43 END(sigsetjmp)
59 END(siglongjmp)
/freebsd/contrib/ofed/libibverbs/man/
H A Dibv_fork_init.31 .\" -*- nroff -*-
2 .\" Licensed under the OpenIB.org BSD license (FreeBSD Variant) - See COPYING.md
4 .TH IBV_FORK_INIT 3 2006-10-31 libibverbs "Libibverbs Programmer's Manual"
6 ibv_fork_init \- initialize libibverbs to support fork()
23 are always blocked until all child processes end or change address
36 (2.6.17 and higher).
/freebsd/lib/libsys/riscv/
H A DSYS.h1 /*-
8 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
12 * UK Higher Education Innovation Fund (HEIF).
56 END(__sys_##name)
63 END(__sys_##name)
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DMemoryTagManagerAArch64MTE.cpp1 //===-- MemoryTagManagerAArch64MTE.cpp --------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
35 return RemoveTagBits(addr1) - RemoveTagBits(addr2); in AddressDiff()
59 new_start -= align_down_amount; in ExpandToGranule()
63 // Then align up to the end of the granule in ExpandToGranule()
64 size_t align_up_amount = granule - (new_len % granule); in ExpandToGranule()
75 "End address (0x%" PRIx64 in MakeInvalidRangeErr()
85 // We must remove tags here otherwise an address with a higher in MakeTaggedRange()
110 region->GetMemoryTagged() != MemoryRegionInfo::eYes) { in MakeTaggedRange()
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