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/linux/drivers/phy/hisilicon/
H A Dphy-histb-combphy.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016-2017 HiSilicon Co., Ltd. http://www.hisilicon.com
21 #include <dt-bindings/phy/phy.h>
37 int fixed; member
50 struct histb_combphy_mode mode; member
56 void __iomem *reg = priv->mmio + COMBPHY_CFG_REG; in nano_register_write()
74 static int is_mode_fixed(struct histb_combphy_mode *mode) in is_mode_fixed() argument
76 return mode->fixed != PHY_NONE; in is_mode_fixed()
81 struct histb_combphy_mode *mode = &priv->mode; in histb_combphy_set_mode() local
82 struct regmap *syscon = priv->syscon; in histb_combphy_set_mode()
[all …]
/linux/drivers/acpi/acpica/
H A Devxfevnt.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: evxfevnt - External Interfaces, ACPI event disable/enable
6 * Copyright (C) 2000 - 2025, Intel Corp.
28 * DESCRIPTION: Transfers the system into ACPI mode.
44 /* If the Hardware Reduced flag is set, machine is always in acpi mode */ in acpi_enable()
50 /* Check current mode */ in acpi_enable()
54 "System is already in ACPI mode\n")); in acpi_enable()
58 /* Transition to ACPI mode */ in acpi_enable()
63 "Could not transition to ACPI mode")); in acpi_enable()
73 "Platform took > %d00 usec to enter ACPI mode", retry)); in acpi_enable()
[all …]
H A Dhwacpi.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: hwacpi - ACPI Hardware Initialization/Mode Interface
6 * Copyright (C) 2000 - 2025, Intel Corp.
21 * PARAMETERS: mode - SYS_MODE_ACPI or SYS_MODE_LEGACY
25 * DESCRIPTION: Transitions the system into the requested mode.
28 acpi_status acpi_hw_set_mode(u32 mode) in acpi_hw_set_mode() argument
35 /* If the Hardware Reduced flag is set, machine is always in acpi mode */ in acpi_hw_set_mode()
43 * system does not support mode transition. in acpi_hw_set_mode()
47 "No SMI_CMD in FADT, mode transition failed")); in acpi_hw_set_mode()
54 * As old systems may have used zero for mode transition, in acpi_hw_set_mode()
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Dkirkwood-net5big.dts1 // SPDX-License-Identifier: GPL-2.0
9 * Based on netxbig_v2-setup.c,
14 /dts-v1/;
17 #include "kirkwood-6281.dtsi"
18 #include "kirkwood-netxbig.dtsi"
22 compatible = "lacie,net5big_v2", "lacie,netxbig", "marvell,kirkwood-88f6281", "marvell,kirkwood";
33 compatible = "regulator-fixed";
35 regulator-name = "hdd1power";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
[all …]
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dverifier_log.c1 // SPDX-License-Identifier: GPL-2.0
55 int i, mode, err, prog_fd, res; in verif_log_subtest() local
61 bpf_object__for_each_program(prog, skel->obj) { in verif_log_subtest()
74 insns = bpf_program__insns(skel->progs.good_prog); in verif_log_subtest()
75 insn_cnt = bpf_program__insn_cnt(skel->progs.good_prog); in verif_log_subtest()
85 memset(logs.reference + fixed_log_sz, 0, sizeof(logs.reference) - fixed_log_sz); in verif_log_subtest()
88 * we get -ENOSPC and beginning of the full verifier log. This only in verif_log_subtest()
93 * But if provided too short log buf, kernel will NULL-out log->ubuf in verif_log_subtest()
96 * Long story short, we do the following -ENOSPC test only for in verif_log_subtest()
101 opts.log_level = log_level | 8; /* fixed-length log */ in verif_log_subtest()
[all …]
/linux/arch/x86/include/asm/
H A Dperf_event.h1 /* SPDX-License-Identifier: GPL-2.0 */
207 /* Counters Sub-Leaf */
209 /* Auto Counter Reload Sub-Leaf */
211 /* Events Sub-Leaf */
222 /* EQ-bit Supported */
237 /* Deep C-state Reset */
251 /* Call-stack Mode Supported */
302 * Fixed-purpose performance events:
305 /* RDPMC offset for Fixed PMCs */
310 * All the fixed-mode PMCs are configured via this single MSR:
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dhisilicon,hi3798cv200-combphy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,hi3798cv200-combphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawn.guo@linaro.org>
14 const: hisilicon,hi3798cv200-combphy
19 '#phy-cells':
20 description: The cell contains the PHY mode
29 hisilicon,fixed-mode:
30 description: If the phy device doesn't support mode select but a fixed mode
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dsamsung-sxgbe.txt4 - compatible: Should be "samsung,sxgbe-v2.0a"
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain the SXGBE interrupts
7 These interrupts are ordered by fixed and follows variable
9 index 0 - this is fixed common interrupt of SXGBE and it is always
11 index 1 to 25 - 8 variable transmit interrupts, variable 16 receive interrupts
13 - phy-mode: String, operation mode of the PHY interface.
15 - samsung,pbl: Integer, Programmable Burst Length.
17 - samsung,burst-map: Integer, Program the possible bursts supported by sxgbe
18 This is an integer and represents allowable DMA bursts when fixed burst.
[all …]
H A Dnixge.txt4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
5 older device trees with DMA engines co-located in the address map,
7 - reg: Address and length of the register set for the device. It contains the
8 information of registers in the same order as described by reg-names.
9 - reg-names: Should contain the reg names
12 - interrupts: Should contain tx and rx interrupt
13 - interrupt-names: Should be "rx" and "tx"
14 - phy-mode: See ethernet.txt file in the same directory.
15 - nvmem-cells: Phandle of nvmem cell containing the MAC address
16 - nvmem-cell-names: Should be "address"
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2160a-bluebox3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 // Copyright 2020-2021 NXP
7 /dts-v1/;
9 #include "fsl-lx2160a.dtsi"
13 compatible = "fsl,lx2160a-bluebox3", "fsl,lx2160a";
23 stdout-path = "serial0:115200n8";
26 sb_3v3: regulator-sb3v3 {
27 compatible = "regulator-fixed";
28 regulator-name = "MC34717-3.3VSB";
29 regulator-min-microvolt = <3300000>;
[all …]
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 mmc-controller.yaml and the properties used by the Xenon implementation.
20 - Ulf Hansson <ulf.hansson@linaro.org>
25 - enum:
26 - marvell,armada-cp110-sdhci
27 - marvell,armada-ap806-sdhci
29 - items:
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623a.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/power/mt7623a-power.h>
13 power-domains = <&scpsys MT7623A_POWER_DOMAIN_IFR_MSC>;
17 power-domains = <&scpsys MT7623A_POWER_DOMAIN_ETH>;
22 phy-mode = "trgmii";
24 fixed-link {
26 full-duplex;
33 phy-mode = "rgmii";
[all …]
H A Dmt7623n-bananapi-bpi-r2.dts2 * Copyright 2017-2018 Sean Wang <sean.wang@mediatek.com>
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 model = "Bananapi BPI-R2";
14 compatible = "bananapi,bpi-r2", "mediatek,mt7623";
21 stdout-path = "serial2:115200n8";
25 compatible = "hdmi-connector";
28 ddc-i2c-bus = <&hdmiddc0>;
32 remote-endpoint = <&hdmi0_out>;
[all …]
H A Dmt7623n-rfb-emmc.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
24 stdout-path = "serial2:115200n8";
28 compatible = "hdmi-connector";
31 ddc-i2c-bus = <&hdmiddc0>;
35 remote-endpoint = <&hdmi0_out>;
42 proc-supply = <&mt6323_vproc_reg>;
[all …]
/linux/arch/arm/boot/dts/nxp/vf/
H A Dvf610-zii-scu4-aib.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Copyright (C) 2016-2018 Zodiac Inflight Innovations
5 /dts-v1/;
10 compatible = "zii,vf610scu4-aib", "zii,vf610dev", "fsl,vf610";
13 stdout-path = &uart0;
21 gpio-leds {
22 compatible = "gpio-leds";
23 pinctrl-0 = <&pinctrl_leds_debug>;
24 pinctrl-names = "default";
26 led-debug {
[all …]
/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmscc,ocelot.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
22 Frame DMA or register-based I/O.
26 This is found in the NXP T1040, where it is a memory-mapped platform
[all …]
H A Dmicrochip,lan937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - UNGLinuxDriver@microchip.com
13 - $ref: dsa.yaml#/$defs/ethernet-ports
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
22 - microchip,lan9374
[all …]
H A Dlan9303.txt2 -------------------------------------------------
6 - compatible: should be
7 - "smsc,lan9303-i2c" for I2C managed mode
9 - "smsc,lan9303-mdio" for mdio managed mode
13 - reset-gpios: GPIO to be used to reset the whole device
14 - reset-duration: reset duration in milliseconds, defaults to 200 ms
23 auto-detected and mapped accordingly.
27 I2C managed mode:
31 fixed-link { /* RMII fixed link to LAN9303 */
33 full-duplex;
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91-sama5d3_ksz9477_evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
5 /dts-v1/;
9 model = "EVB-KSZ9477";
10 compatible = "microchip,sama5d3-ksz9477-evb", "atmel,sama5d36",
14 stdout-path = &dbgu;
17 reg_3v3: regulator-3v3 {
18 compatible = "regulator-fixed";
19 regulator-name = "3v3";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
H A Dmt7986b-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
12 chassis-type = "embedded";
13 compatible = "mediatek,mt7986b-rfb", "mediatek,mt7986b";
20 stdout-path = "serial0:115200n8";
37 compatible = "mediatek,eth-mac";
39 phy-mode = "2500base-x";
41 fixed-link {
43 full-duplex;
49 compatible = "mediatek,eth-mac";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include "armada-8040.dtsi"
13 compatible = "marvell,armada8040-db", "marvell,armada8040",
14 "marvell,armada-ap806-quad", "marvell,armada-ap806";
17 stdout-path = "serial0:115200n8";
34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
35 compatible = "regulator-fixed";
36 regulator-name = "cp0-usb3h0-vbus";
37 regulator-min-microvolt = <5000000>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dbeacon-renesom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/clock/versaclock.h>
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <32768>;
20 clock-output-names = "osc_32k";
23 reg_1p8v: regulator-1p8v {
24 compatible = "regulator-fixed";
25 regulator-name = "fixed-1.8V";
[all …]

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