| /freebsd/sys/contrib/device-tree/src/mips/mobileye/ |
| H A D | eyeq5-clocks.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 6 #include <dt-bindings/clock/mobileye,eyeq5-clk.h> 9 /* Fixed clock */ 11 compatible = "fixed-clock"; 12 #clock-cells = <0>; 13 clock-frequency = <30000000>; 17 occ_cpu: occ-cpu { 18 compatible = "fixed-factor-clock"; 20 #clock-cells = <0>; 21 clock-div = <1>; [all …]
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| H A D | eyeq5-fixed-clocks.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 7 /* Fixed clock */ 8 pll_cpu: pll-cpu { 9 compatible = "fixed-clock"; 10 #clock-cells = <0>; 11 clock-frequency = <1500000000>; 14 pll_vdi: pll-vdi { 15 compatible = "fixed-clock"; 16 #clock-cells = <0>; 17 clock-frequency = <1280000000>; [all …]
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| H A D | eyeq6h-fixed-clocks.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 6 #include <dt-bindings/clock/mobileye,eyeq5-clk.h> 9 xtal: clock-30000000 { 10 compatible = "fixed-clock"; 11 #clock-cells = <0>; 12 clock-frequency = <30000000>; 15 pll_west: clock-2000000000-west { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 18 clock-frequency = <2000000000>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | am33xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 sys_clkin_ck: clock-sys-clkin-22@40 { 9 #clock-cells = <0>; 10 compatible = "ti,mux-clock"; 11 clock-output-names = "sys_clkin_ck"; 13 ti,bit-shift = <22>; 17 adc_tsc_fck: clock-adc-tsc-fck { 18 #clock-cells = <0>; 19 compatible = "fixed-factor-clock"; 20 clock-output-names = "adc_tsc_fck"; [all …]
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| H A D | omap36xx-omap3430es2plus-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 11 #clock-cells = <2>; 12 #address-cells = <1>; 13 #size-cells = <0>; 15 ssi_ssr_gate_fck_3430es2: clock-ssi-ssr-gate-fck-3430es2@0 { 17 #clock-cells = <0>; 18 compatible = "ti,composite-no-wait-gate-clock"; 19 clock-output-names = "ssi_ssr_gate_fck_3430es2"; 27 #clock-cells = <2>; 28 #address-cells = <1>; [all …]
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| H A D | am43xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 sys_clkin_ck: clock-sys-clkin-31@40 { 9 #clock-cells = <0>; 10 compatible = "ti,mux-clock"; 11 clock-output-names = "sys_clkin_ck"; 13 ti,bit-shift = <31>; 17 crystal_freq_sel_ck: clock-crystal-freq-sel-29@40 { 18 #clock-cells = <0>; 19 compatible = "ti,mux-clock"; 20 clock-output-names = "crystal_freq_sel_ck"; [all …]
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| H A D | omap3xxx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #clock-cells = <0>; 10 compatible = "fixed-clock"; 11 clock-frequency = <16800000>; 15 #clock-cells = <0>; 16 compatible = "ti,mux-clock"; 22 #clock-cells = <0>; 23 compatible = "ti,divider-clock"; 25 ti,bit-shift = <6>; 26 ti,max-div = <3>; [all …]
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| H A D | omap54xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #clock-cells = <0>; 10 compatible = "fixed-clock"; 11 clock-output-names = "pad_clks_src_ck"; 12 clock-frequency = <12000000>; 16 #clock-cells = <0>; 17 compatible = "ti,gate-clock"; 18 clock-output-names = "pad_clks_ck"; 20 ti,bit-shift = <8>; 25 #clock-cells = <0>; [all …]
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| H A D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #clock-cells = <0>; 10 compatible = "fixed-factor-clock"; 12 clock-mult = <1>; 13 clock-div = <3>; 17 #clock-cells = <0>; 18 compatible = "fixed-factor-clock"; 20 clock-mult = <1>; 21 clock-div = <5>; 26 #clock-cells = <0>; [all …]
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| H A D | dra7xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 atl_clkin0_ck: clock-atl-clkin0 { 9 #clock-cells = <0>; 10 compatible = "ti,dra7-atl-clock"; 11 clock-output-names = "atl_clkin0_ck"; 15 atl_clkin1_ck: clock-atl-clkin1 { 16 #clock-cells = <0>; 17 compatible = "ti,dra7-atl-clock"; 18 clock-output-names = "atl_clkin1_ck"; 22 atl_clkin2_ck: clock-atl-clkin2 { [all …]
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| H A D | dm814x-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #clock-cells = <1>; 11 compatible = "ti,dm814-adpll-s-clock"; 14 clock-names = "clkinp", "clkinpulow", "clkinphif"; 15 clock-output-names = "481c5040.adpll.dcoclkldo", 22 #clock-cells = <1>; 23 compatible = "ti,dm814-adpll-lj-clock"; 26 clock-names = "clkinp", "clkinpulow"; 27 clock-output-names = "481c5080.adpll.dcoclkldo", 33 #clock-cells = <1>; [all …]
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| H A D | omap24xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #clock-cells = <0>; 10 compatible = "ti,composite-mux-clock"; 12 ti,bit-shift = <2>; 17 #clock-cells = <0>; 18 compatible = "ti,composite-clock"; 23 #clock-cells = <0>; 24 compatible = "ti,composite-mux-clock"; 26 ti,bit-shift = <6>; 31 #clock-cells = <0>; [all …]
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| H A D | omap44xx-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #clock-cells = <0>; 10 compatible = "fixed-clock"; 11 clock-output-names = "extalt_clkin_ck"; 12 clock-frequency = <59000000>; 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 18 clock-output-names = "pad_clks_src_ck"; 19 clock-frequency = <12000000>; 23 #clock-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/ |
| H A D | stingray-clock.dtsi | 4 * Copyright(c) 2016-2017 Broadcom. All rights reserved. 33 #include <dt-bindings/clock/bcm-sr.h> 36 #clock-cells = <0>; 37 compatible = "fixed-clock"; 38 clock-frequency = <50000000>; 42 #clock-cells = <0>; 43 compatible = "fixed-factor-clock"; 45 clock-div = <2>; 46 clock-mult = <1>; 50 #clock-cells = <1>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/ti/keystone/ |
| H A D | keystone-clocks.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 9 #address-cells = <1>; 10 #size-cells = <1>; 14 #clock-cells = <0>; 15 compatible = "ti,keystone,pll-mux-clock"; 18 bit-shift = <23>; 19 bit-mask = <1>; 20 clock-output-names = "mainmuxclk"; 24 #clock-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | fixed-factor-clock.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/clock/fixed-factor-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Simple fixed factor rate clock sources 10 - Michael Turquette <mturquette@baylibre.com> 11 - Stephen Boyd <sboyd@kernel.org> 16 - description: 17 If the frequency is fixed, the preferred name is 'clock-<freq>' with 19 pattern: "^clock-([0-9]+|[0-9a-z-]+)$" [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ti/ |
| H A D | ti,fixed-factor-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/ti/ti,fixed-factor-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI fixed factor rate clock sources 10 - Tero Kristo <kristo@kernel.org> 11 - Sukrut Bellary <sbellary@baylibre.com> 14 This consists of a divider and a multiplier used to generate a fixed rate 18 - $ref: ti,autoidle.yaml# 22 const: ti,fixed-factor-clock [all …]
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| H A D | fixed-factor-clock.txt | 1 Binding for TI fixed factor rate clock sources. 6 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 10 - compatible : shall be "ti,fixed-factor-clock". 11 - #clock-cells : from common clock binding; shall be set to 0. 12 - ti,clock-div: fixed divider. 13 - ti,clock-mult: fixed multiplier. 14 - clocks: parent clock. 17 - clock-output-names : from common clock binding. 18 - ti,autoidle-shift: bit shift of the autoidle enable bit for the clock, 20 - reg: offset for the autoidle register of this clock, see [2] [all …]
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| /freebsd/sys/dev/clk/allwinner/ |
| H A D | ccu_h6.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 47 #include <dt-bindings/clock/sun50i-h6-ccu.h> 48 #include <dt-bindings/reset/sun50i-h6-ccu.h> 50 /* Non-exported clocks */ 117 CCU_GATE(CLK_BUS_PSI, "bus-psi", "psi_ahb1_ahb2", 0x79c, 0) 120 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb3", 0x84c, 0) 121 CCU_GATE(CLK_BUS_MMC1, "bus-mmc1", "ahb3", 0x84c, 1) 122 CCU_GATE(CLK_BUS_MMC2, "bus-mmc2", "ahb3", 0x84c, 2) 125 /* CCU_GATE(CLK_BUS_UART0, "bus-uart0", "apb2", 0x90c, 0) */ [all …]
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| H A D | ccu_a64.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 47 #include <dt-bindings/clock/sun50i-a64-ccu.h> 48 #include <dt-bindings/reset/sun50i-a64-ccu.h> 50 /* Non-exported clocks */ 141 CCU_GATE(CLK_BUS_MIPI_DSI, "bus-mipi-dsi", "ahb1", 0x60, 1) 142 CCU_GATE(CLK_BUS_CE, "bus-ce", "ahb1", 0x60, 5) 143 CCU_GATE(CLK_BUS_DMA, "bus-dma", "ahb1", 0x60, 6) 144 CCU_GATE(CLK_BUS_MMC0, "bus-mmc0", "ahb1", 0x60, 8) 145 CCU_GATE(CLK_BUS_MMC1, "bus-mmc1", "ahb1", 0x60, 9) [all …]
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| H A D | ccu_a31.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 47 #include <dt-bindings/clock/sun6i-a31-ccu.h> 48 #include <dt-bindings/reset/sun6i-a31-ccu.h> 50 /* Non-exported clocks */ 148 CCU_GATE(CLK_AHB1_MIPIDSI, "ahb1-mipidsi", "ahb1", 0x60, 1) 149 CCU_GATE(CLK_AHB1_SS, "ahb1-ss", "ahb1", 0x60, 5) 150 CCU_GATE(CLK_AHB1_DMA, "ahb1-dma", "ahb1", 0x60, 6) 151 CCU_GATE(CLK_AHB1_MMC0, "ahb1-mmc0", "ahb1", 0x60, 8) 152 CCU_GATE(CLK_AHB1_MMC1, "ahb1-mmc1", "ahb1", 0x60, 9) [all …]
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| H A D | ccu_a10.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 47 #include <dt-bindings/clock/sun4i-a10-ccu.h> 48 #include <dt-bindings/clock/sun7i-a20-ccu.h> 49 #include <dt-bindings/reset/sun4i-a10-ccu.h> 51 /* Non-exported resets */ 52 /* Non-exported clocks */ 66 /* Non-exported fixed clocks */ 106 CCU_GATE(CLK_AHB_OTG, "ahb-otg", "ahb", 0x60, 0) 107 CCU_GATE(CLK_AHB_EHCI0, "ahb-ehci0", "ahb", 0x60, 1) [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | allwinner,sun8i-a23-prcm.yaml | 1 # SPDX-License-Identifier: GPL-2.0+ 3 --- 4 $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Che [all...] |
| H A D | allwinner,sun6i-a31-prcm.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mfd/allwinner,sun6i-a31-prcm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 17 const: allwinner,sun6i-a31-prcm 23 "^.*-(clk|rst)$": 30 - allwinner,sun4i-a10-mod0-clk 31 - allwinner,sun6i-a31-apb0-clk [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm-cygnus-clock.dtsi | 34 #address-cells = <1>; 35 #size-cells = <1>; 39 #clock-cells = <0>; 40 compatible = "fixed-clock"; 41 clock-frequency = <25000000>; 46 #clock-cells = <0>; 47 compatible = "brcm,cygnus-armpll"; 54 #clock-cells = <0>; 55 compatible = "fixed-factor-clock"; 57 clock-div = <2>; [all …]
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