/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,sc7280-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sibi Sankar <quic_sibis@quicinc.com> 13 This document describes the hardware for a component that loads and boots firmware 19 - qcom,sc7280-mss-pil 23 - description: MSS QDSP6 registers 24 - description: RMB registers 26 reg-names: [all …]
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H A D | ti,omap-remoteproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The OMAP family of SoCs usually have one or more slave processor sub-systems 14 that are used to offload some of the processor-intensive tasks, or to manage 17 The processor cores in the sub-system are usually behind an IOMMU, and may 18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2 21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor [all …]
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H A D | qcom,sc7180-mss-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7180-mss-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sibi Sankar <quic_sibis@quicinc.com> 13 This document describes the hardware for a component that loads and boots firmware 19 - qcom,sc7180-mss-pil 23 - description: MSS QDSP6 registers 24 - description: RMB registers 26 reg-names: [all …]
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H A D | st,stm32-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/st,stm32-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 14 - Fabien Dessenne <fabien.dessenne@foss.st.com> 15 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com> 19 const: st,stm32mp1-m4 31 reset-names: 33 - const: mcu_rst 34 - const: hold_boot [all …]
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H A D | ti,k3-dsp-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems 14 that are used to offload some of the processor-intensive tasks or algorithms, 17 These processor sub-systems usually contain additional sub-modules like 23 Each DSP Core sub-system is represented as a single DT node. Each node has a 31 - ti,am62a-c7xv-dsp [all …]
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H A D | amlogic,meson-mx-ao-arc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/amlogic,meson-mx-ao-arc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 controller for always-on operations, typically used for managing 17 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 22 - enum: 23 - amlogic,meson8-ao-arc 24 - amlogic,meson8b-ao-arc 25 - const: amlogic,meson-mx-ao-arc [all …]
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H A D | ti,k3-r5f-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 13 The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F 20 AM64x SoCs do not support LockStep mode, but rather a new non-safety mode 21 called "Single-CPU" mode, where only Core0 is used, but with ability to use 25 firmware and can also be used as a remote processor with IPC communication. 27 Each Dual-Core R5F sub-system is represented as a single DTS node [all …]
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H A D | qcom,q6v5.txt | 3 This document defines the binding for a component that loads and boots firmware 6 - compatible: 10 "qcom,ipq8074-wcss-pil" 11 "qcom,qcs404-wcss-pil" 13 - reg: 15 Value type: <prop-encoded-array> 19 - reg-names: 24 - interrupts-extended: 26 Value type: <prop-encoded-array> 27 Definition: reference to the interrupts that match interrupt-names [all …]
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H A D | qcom,adsp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 14 firmware on the Qualcomm ADSP Hexagon core. 19 - qcom,msm8226-adsp-pil 20 - qcom,msm8953-adsp-pil 21 - qcom,msm8974-adsp-pil 22 - qcom,msm8996-adsp-pil 23 - qcom,msm8996-slpi-pil [all …]
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/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
H A D | fsl,qe-firmware.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-firmware.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale QUICC Engine module Firmware Node 10 - Frank Li <Frank.Li@nxp.com> 13 This node defines a firmware binary that is embedded in the device tree, for 14 the purpose of passing the firmware from bootloader to the kernel, or from 17 The firmware node itself contains the firmware binary contents, a compatible 18 property, and any firmware-specific properties. The node should be placed [all …]
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H A D | fsl,qe-ucc-qmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Herve Codina <herve.codina@bootlin.com> 19 - enum: 20 - fsl,mpc8321-ucc-qmc 21 - const: fsl,qe-ucc-qmc 25 - description: UCC (Unified communication controller) register base 26 - description: Dual port ram base [all …]
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H A D | fsl,qe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Li <Frank.Li@nxp.com> 27 - const: fsl,qe 28 - const: simple-bus 40 bus-frequency: 44 fsl,qe-num-riscs: 48 fsl,qe-snums: 49 $ref: /schemas/types.yaml#/definitions/uint8-array [all …]
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/linux/arch/sparc/include/asm/ |
H A D | oplib_32.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 28 /* Revision, and firmware revision. */ 34 extern phandle prom_root_node; 37 * and usage utility functions. Only prom-lib should use these, 65 /* Enter the prom, with no chance of continuation for the stand-alone 74 * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX 91 /* Get the prom firmware revision. */ 115 phandle prom_getchild(phandle parent_node); 120 phandle prom_getsibling(phandle node); 123 * Returns -1 on error (ie. no such property at this node). [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | qcom,ipa.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alex Elder <elder@kernel.org> 21 and has a distinct interrupt and a separately-defined address space. 28 - | 29 -------- --------- 31 | AP +<---. .----+ Modem | 32 | +--. | | .->+ | 34 -------- | | | | --------- [all …]
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H A D | ti,icssg-prueth.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Md Danish Anwar <danishanwar@ti.com> 13 Ethernet based on the Programmable Real-Time Unit and Industrial 19 - ti,am642-icssg-prueth # for AM64x SoC family 20 - ti,am654-icssg-prueth # for AM65x SoC family 21 - ti,am654-sr1-icssg-prueth # for AM65x SoC family, SR1.0 24 $ref: /schemas/types.yaml#/definitions/phandle [all …]
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H A D | qcom,bam-dmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/qcom,bam-dmux.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Stephan Gerhold <stephan@gerhold.net> 19 a firmware convention that combines several other hardware blocks (such as the 20 DMA engine). As such it is specific to a firmware version, not a particular 25 const: qcom,bam-dmux 32 - description: Power control 33 - description: Power control acknowledgment [all …]
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/linux/arch/powerpc/boot/ |
H A D | oflib.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 17 /* The following structure is used to communicate with open firmware. 89 rets[i-1] = be32_to_cpu(args.args[nargs+i]); in of_call_prom_ret() 109 static int need_map = -1; 115 phandle oprom, chosen; in check_of_version() 119 if (oprom == (phandle) -1) in check_of_version() 123 version[sizeof(version)-1] = 0; in check_of_version() 125 if (!string_match(version, "Open Firmware, 1.") in check_of_version() 129 if (chosen == (phandle) -1) { in check_of_version() 131 if (chosen == (phandle) -1) { in check_of_version() [all …]
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/linux/include/linux/ |
H A D | of_pdt.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 4 * Open Firmware PROM. 18 int (*nextprop)(phandle node, char *prev, char *buf); 20 /* for both functions, return proplen on success; -1 on error */ 21 int (*getproplen)(phandle node, const char *prop); 22 int (*getproperty)(phandle node, const char *prop, char *buf, 26 phandle (*getchild)(phandle parent); 27 phandle (*getsibling)(phandle node); 30 int (*pkg2path)(phandle node, char *buf, const int buflen, int *len); 36 extern void of_pdt_build_devicetree(phandle root_node, struct of_pdt_ops *ops);
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/linux/Documentation/devicetree/bindings/power/reset/ |
H A D | xlnx,zynqmp-power.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/reset/xlnx,zynqmp-power.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michal Simek <michal.simek@amd.com> 13 The zynqmp-power node describes the power management configurations. 18 const: xlnx,zynqmp-power 26 the mboxes property should contain a phandle to the 28 that will be the phandle to the intended sub-mailbox 34 xlnx,zynqmp-ipi-mailbox.txt for typical controller that [all …]
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/linux/Documentation/devicetree/bindings/display/ |
H A D | simple-framebuffer.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/simple-framebuffer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hans de Goede <hdegoede@redhat.com> 13 A simple frame-buffer describes a frame-buffer setup by firmware or 19 sub-nodes of the chosen node (*). Simplefb nodes must be named 24 display, which contains a phandle pointing to the primary display 41 interaction, then the chosen node stdout-path property should point 46 It is advised that devicetree files contain pre-filled, disabled [all …]
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | i2c-opal.txt | 1 Device-tree bindings for I2C OPAL driver 2 ---------------------------------------- 4 Most of the device node and properties layout is specific to the firmware and 5 used by the firmware itself for configuring the port. From the linux 6 perspective, the properties of use are "ibm,port-name" and "ibm,opal-id". 10 - reg: Port-id within a given master 11 - compatible: must be "ibm,opal-i2c" 12 - ibm,opal-id: Refers to a specific bus and used to identify it when calling 14 - bus-frequency: Operating frequency of the i2c bus (in HZ). Informational for 18 - ibm,port-name: Firmware provides this name that uniquely identifies the i2c [all …]
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/linux/arch/x86/platform/olpc/ |
H A D | olpc_dt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * OLPC-specific OFW device tree support code. 6 * Copyright (C) 1996-2005 Paul Mackerras. 22 static phandle __init olpc_dt_getsibling(phandle node) in olpc_dt_getsibling() 27 if ((s32)node == -1) in olpc_dt_getsibling() 30 if (olpc_ofw("peer", args, res) || (s32)node == -1) in olpc_dt_getsibling() 36 static phandle __init olpc_dt_getchild(phandle node) in olpc_dt_getchild() 41 if ((s32)node == -1) in olpc_dt_getchild() 44 if (olpc_ofw("child", args, res) || (s32)node == -1) { in olpc_dt_getchild() 52 static int __init olpc_dt_getproplen(phandle node, const char *prop) in olpc_dt_getproplen() [all …]
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/linux/Documentation/devicetree/bindings/gpu/host1x/ |
H A D | nvidia,tegra234-nvdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Thierry Reding <treding@gmail.com> 16 - Mikko Perttunen <mperttunen@nvidia.com> 20 pattern: "^nvdec@[0-9a-f]*$" 24 - nvidia,tegra234-nvdec 32 clock-names: 34 - const: nvdec [all …]
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/linux/Documentation/devicetree/bindings/soc/qcom/ |
H A D | qcom,wcnss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Gross <agross@kernel.org> 11 - Bjorn Andersson <bjorn.andersson@linaro.org> 21 firmware-name: 25 Relative firmware image path for the WLAN NV blob. 28 $ref: /schemas/types.yaml#/definitions/phandle 32 - qcom,riva" 33 - qcom,pronto" [all …]
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | riscv,aplic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,aplic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V Advanced Platform Level Interrupt Controller (APLIC) 10 - Anup Patel <anup@brainfault.org> 13 The RISC-V advanced interrupt architecture (AIA) defines an advanced 15 in a RISC-V platform. The RISC-V AIA specification can be found at 16 https://github.com/riscv/riscv-aia. 18 The RISC-V APLIC is implemented as hierarchical APLIC domains where all [all …]
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