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/freebsd/sys/contrib/device-tree/Bindings/thermal/
H A Dthermal.txt1 * Thermal Framework Device Tree descriptor
4 defining hardware thermal structure using device tree.
5 A thermal structure includes thermal zones and their components,
9 The target of device tree thermal descriptors is to describe only
10 the hardware thermal aspects. The thermal device tree bindings are
14 There are five types of nodes involved to describe thermal bindings:
15 - thermal sensors: devices which may be used to take temperature
17 - cooling devices: devices which may be used to dissipate heat.
18 - trip points: describe key temperatures at which cooling is recommended. The
20 - cooling maps: used to describe links between trip points and cooling devices;
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H A Dbrcm,sr-thermal.txt1 * Broadcom Stingray Thermal
3 This binding describes thermal sensors that is part of Stingray SoCs.
6 - compatible : Must be "brcm,sr-thermal"
7 - reg : Memory where tmon data will be available.
8 - brcm,tmon-mask: A one cell bit mask of valid TMON sources.
10 - #thermal-sensor-cells : Thermal sensor phandler
11 - polling-delay: Max number of milliseconds to wait between polls.
12 - thermal-sensors: A list of thermal sensor phandles and specifier.
14 in correspond with brcm,tmon-mask.
15 - temperature: trip temperature threshold in millicelsius.
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H A Dnvidia,tegra124-soctherm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/nvidia,tegra124-soctherm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra124 SOCTHERM Thermal Management System
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The SOCTHERM IP block contains thermal sensors, support for
14 polled or interrupt-based thermal monitoring, CPU and GPU throttling based
21 - nvidia,tegra124-soctherm
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H A Dnvidia,tegra124-soctherm.txt1 Tegra124 SOCTHERM thermal management system
3 The SOCTHERM IP block contains thermal sensors, support for polled
4 or interrupt-based thermal monitoring, CPU and GPU throttling based
10 - compatible : For Tegra124, must contain "nvidia,tegra124-soctherm".
11 For Tegra132, must contain "nvidia,tegra132-soctherm".
12 For Tegra210, must contain "nvidia,tegra210-soctherm".
13 - reg : Should contain at least 2 entries for each entry in reg-names:
14 - SOCTHERM register set
15 - Tegra CAR register set: Required for Tegra124 and Tegra210.
16 - CCROC register set: Required for Tegra132.
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H A Dthermal-idle.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Thermal idle cooling device
11 - Daniel Lezcano <daniel.lezcano@linaro.org>
14 The thermal idle cooling device allows the system to passively
18 This binding describes the thermal idle node.
22 const: thermal-idle
24 A thermal-idle node describes the idle cooling device properties to
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H A Damlogic,thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/amlogic,thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Thermal
10 - Guillaume La Roque <glaroque@baylibre.com>
12 description: Binding for Amlogic Thermal
14 $ref: thermal-sensor.yaml#
19 - items:
20 - enum:
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H A Dthermal-cooling-devices.yaml1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Thermal cooling device
11 - Amit Kucheria <amitk@kernel.org>
14 Thermal management is achieved in devicetree by describing the sensor hardware
15 and the software abstraction of cooling devices and thermal zones required to
16 take appropriate action to mitigate thermal overload.
18 The following node types are used to completely describe a thermal management
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H A Dst,stm32-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/st,stm32-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 digital thermal sensor (DTS)
10 - Pascal Paillet <p.paillet@foss.st.com>
12 $ref: thermal-sensor.yaml#
16 const: st,stm32-thermal
27 clock-names:
29 - const: pclk
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H A Dbrcm,bcm2835-thermal.txt1 Binding for Thermal Sensor driver for BCM2835 SoCs.
4 -------------------
6 compatible: should be one of: "brcm,bcm2835-thermal",
7 "brcm,bcm2836-thermal" or "brcm,bcm2837-thermal"
8 reg: Address range of the thermal registers.
9 clocks: Phandle of the clock used by the thermal sensor.
10 #thermal-sensor-cells: should be 0 (see Documentation/devicetree/bindings/thermal/thermal-sensor.ya…
14 thermal-zones {
15 cpu_thermal: cpu-thermal {
16 polling-delay-passive = <0>;
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H A Dbrcm,ns-thermal.txt1 * Broadcom Northstar Thermal
3 This binding describes thermal sensor that is part of Northstar's DMU (Device
7 - compatible : Must be "brcm,ns-thermal"
8 - reg : iomem address range of PVTMON registers
9 - #thermal-sensor-cells : Should be <0>
13 thermal: thermal@1800c2c0 {
14 compatible = "brcm,ns-thermal";
16 #thermal-sensor-cells = <0>;
19 thermal-zones {
20 cpu_thermal: cpu-thermal {
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H A Dbrcm,ns-thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/thermal/brcm,ns-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom Northstar Thermal
10 - Rafał Miłecki <rafal@milecki.pl>
13 Thermal sensor that is part of Northstar's DMU (Device Management Unit).
16 - $ref: thermal-sensor.yaml#
20 const: brcm,ns-thermal
26 "#thermal-sensor-cells":
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstih418.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "stih418-clock.dtsi"
7 #include "stih407-family.dtsi"
8 #include "stih410-pinctrl.dtsi"
9 #include <dt-bindings/thermal/thermal.h>
12 #address-cells = <1>;
13 #size-cells = <0>;
14 cpu2: cpu@2 {
15 device_type = "cpu";
16 compatible = "arm,cortex-a9";
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
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H A Dexynos4-cpu-thermal.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree sources for Exynos4 thermal zone
8 #include <dt-bindings/thermal/thermal.h>
11 thermal-zones {
12 cpu_thermal: cpu-thermal {
13 thermal-sensors = <&tmu>;
14 polling-delay-passive = <0>;
15 polling-delay = <0>;
17 cpu_alert0: cpu-alert-0 {
22 cpu_alert1: cpu-alert-1 {
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H A Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dipq9574.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
9 #include <dt-bindings/clock/qcom,apss-ipq.h>
10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
11 #include <dt-bindings/interconnect/qcom,ipq9574.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <2>;
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H A Dsm6375.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,sm6375-gcc.h>
8 #include <dt-bindings/clock/qcom,sm6375-gpucc.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/firmware/qcom,scm.h>
11 #include <dt-bindings/interconnect/qcom,osm-l3.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
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/freebsd/sys/arm64/nvidia/tegra210/
H A Dtegra210_coretemp.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 #include <sys/cpu.h>
39 #include <machine/cpu.h>
78 rv = TEGRA_SOCTHERM_GET_TEMPERATURE(sc->tsens_dev, sc->dev, in coretemp_get_val_sysctl()
79 sc->tsens_id, &temp); in coretemp_get_val_sysctl()
81 device_printf(sc->dev, in coretemp_get_val_sysctl()
83 (unsigned int)sc->tsens_id, rv); in coretemp_get_val_sysctl()
93 val = (sc->core_max_temp - temp) / 1000; in coretemp_get_val_sysctl()
99 val = sc->core_max_temp / 100; in coretemp_get_val_sysctl()
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/freebsd/sys/arm/nvidia/tegra124/
H A Dtegra124_coretemp.c1 /*-
30 #include <sys/cpu.h>
38 #include <machine/cpu.h>
74 rv = TEGRA_SOCTHERM_GET_TEMPERATURE(sc->tsens_dev, sc->dev, in coretemp_get_val_sysctl()
75 sc->tsens_id, &temp); in coretemp_get_val_sysctl()
77 device_printf(sc->dev, in coretemp_get_val_sysctl()
79 sc->tsens_id, rv); in coretemp_get_val_sysctl()
89 val = (sc->core_max_temp - temp) / 1000; in coretemp_get_val_sysctl()
95 val = sc->core_max_temp / 100; in coretemp_get_val_sysctl()
100 if ((temp > sc->core_max_temp) && !sc->overheat_log) { in coretemp_get_val_sysctl()
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/freebsd/sys/contrib/device-tree/Bindings/arm/marvell/
H A Dap80x-system-controller.txt6 registers giving access to numerous features: clocks, pin-muxing and
11 - compatible: must be: "syscon", "simple-mfd";
12 - reg: register area of the AP80x system controller
18 -------
24 - 0: reference clock of CPU cluster 0
25 - 1: reference clock of CPU cluster 1
26 - 2: fixed PLL at 1200 Mhz
27 - 3: MSS clock, derived from the fixed PLL
31 - compatible: must be one of:
32 * "marvell,ap806-clock"
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8qm.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/pads-imx8qm.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
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/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 #include <arm/allwinner/sunxi-h3-h5.dtsi>
6 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <0>;
13 cpu0: cpu@0 {
14 compatible = "arm,cortex-a53";
15 device_type = "cpu";
17 enable-method = "psci";
19 clock-latency-ns = <244144>; /* 8 32k periods */
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/freebsd/share/man/man4/
H A Dacpi_thermal.430 .Nd ACPI thermal management subsystem
36 driver provides the thermal management features of the ACPI module.
42 The sysctls export properties of each ACPI thermal zone object.
44 There can be multiple thermal zones in a system.
45 For example, each CPU and the enclosure could all be separate thermal
47 Thermal zones are numbered sequentially in the order they appear in
53 each thermal zone's setpoints.
55 .Bl -tag -width indent
56 .It Va hw.acpi.thermal.min_runtime
59 .It Va hw.acpi.thermal.polling_rate
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/freebsd/sys/contrib/device-tree/src/arm64/broadcom/stingray/
H A Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
45 cpu@0 {
46 device_type = "cpu";
47 compatible = "arm,cortex-a72";
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/freebsd/sys/dev/coretemp/
H A Dcoretemp.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * Device driver for Intel's On Die thermal sensor via MSR.
78 static uint64_t coretemp_get_thermal_msr(int cpu);
79 static void coretemp_clear_thermal_msr(int cpu);
106 DRIVER_MODULE(coretemp, cpu, coretemp_driver, NULL, NULL);
122 * CPUID 0x06 returns 1 if the processor has on-die thermal in coretemp_identify()
130 * We add a child for each CPU since settings must be performed in coretemp_identify()
131 * on each CPU in the SMP case. in coretemp_identify()
144 device_set_desc(dev, "CPU On-Die Thermal Sensors"); in coretemp_probe()
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