Home
last modified time | relevance | path

Searched +full:cpsw +full:- +full:switch (Results 1 – 21 of 21) sorted by relevance

/linux/Documentation/devicetree/bindings/net/
H A Dti,cpsw-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI SoC Ethernet Switch Controller (CPSW)
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
14 The 3-port switch gigabit ethernet subsystem provides ethernet packet
15 communication and can be configured as an ethernet switch. It provides the
24 - const: ti,cpsw-switch
[all …]
H A Dcpsw.txt1 TI SoC Ethernet Switch Controller Device Tree Bindings
2 ------------------------------------------------------
5 - compatible : Should be one of the below:-
6 "ti,cpsw" for backward compatible
7 "ti,am335x-cpsw" for AM335x controllers
8 "ti,am4372-cpsw" for AM437x controllers
9 "ti,dra7-cpsw" for DRA7x controllers
10 - reg : physical base address and size of the cpsw
12 - interrupts : property with a value describing the interrupt
14 - cpdma_channels : Specifies number of channels in CPDMA
[all …]
/linux/drivers/net/ethernet/ti/
H A Dcpsw_switchdev.c1 // SPDX-License-Identifier: GPL-2.0
15 #include "cpsw.h"
29 struct cpsw_common *cpsw = priv->cpsw; in cpsw_port_stp_state_set() local
33 switch (state) { in cpsw_port_stp_state_set()
48 return -EOPNOTSUPP; in cpsw_port_stp_state_set()
51 ret = cpsw_ale_control_set(cpsw->ale, priv->emac_port, in cpsw_port_stp_state_set()
53 dev_dbg(priv->dev, "ale state: %u\n", cpsw_state); in cpsw_port_stp_state_set()
62 struct cpsw_common *cpsw = priv->cpsw; in cpsw_port_attr_br_flags_set() local
70 dev_dbg(priv->dev, "BR_MCAST_FLOOD: %d port %u\n", in cpsw_port_attr_br_flags_set()
71 unreg_mcast_add, priv->emac_port); in cpsw_port_attr_br_flags_set()
[all …]
H A Dam65-cpsw-switchdev.c1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
14 #include "am65-cpsw-nuss.h"
15 #include "am65-cpsw-switchdev.h"
27 struct am65_cpsw_common *cpsw = port->common; in am65_cpsw_port_stp_state_set() local
31 switch (state) { in am65_cpsw_port_stp_state_set()
46 return -EOPNOTSUPP; in am65_cpsw_port_stp_state_set()
49 ret = cpsw_ale_control_set(cpsw->ale, port->port_id, in am65_cpsw_port_stp_state_set()
51 netdev_dbg(port->ndev, "ale state: %u\n", cpsw_state); in am65_cpsw_port_stp_state_set()
60 struct am65_cpsw_common *cpsw = port->common; in am65_cpsw_port_attr_br_flags_set() local
[all …]
H A Dcpsw-phy-sel.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments Ethernet Switch Driver
16 #include "cpsw.h"
47 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_am3352()
49 switch (phy_mode) { in cpsw_gmii_sel_am3352()
66 dev_warn(priv->dev, in cpsw_gmii_sel_am3352()
79 if (priv->rmii_clock_external) { in cpsw_gmii_sel_am3352()
96 writel(reg, priv->gmii_sel); in cpsw_gmii_sel_am3352()
106 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_dra7xx()
108 switch (phy_mode) { in cpsw_gmii_sel_dra7xx()
[all …]
H A Dam65-cpsw-nuss.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
32 #include <linux/dma/ti-cppi5.h>
33 #include <linux/dma/k3-udma-glue.h>
40 #include "am65-cpsw-nuss.h"
41 #include "am65-cpsw-switchdev.h"
42 #include "k3-cppi-desc-pool.h"
43 #include "am65-cpts.h"
132 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
[all …]
H A Dcpsw_switchdev.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Texas Instruments Ethernet Switch Driver
12 int cpsw_switchdev_register_notifiers(struct cpsw_common *cpsw);
13 void cpsw_switchdev_unregister_notifiers(struct cpsw_common *cpsw);
H A Dcpsw-common.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include "cpsw.h"
21 syscon = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); in davinci_emac_3517_get_macid()
23 if (PTR_ERR(syscon) == -ENODEV) in davinci_emac_3517_get_macid()
48 syscon = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); in cpsw_am33xx_cm_get_macid()
50 if (PTR_ERR(syscon) == -ENODEV) in cpsw_am33xx_cm_get_macid()
76 if (of_device_is_compatible(dev->of_node, "ti,am3517-emac")) in ti_cm_get_macid()
79 if (of_device_is_compatible(dev->of_node, "ti,dm816-emac")) in ti_cm_get_macid()
89 return -ENOENT; in ti_cm_get_macid()
93 MODULE_DESCRIPTION("TI CPSW Switch common module");
H A Dam65-cpsw-qos.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
6 * Enhanced Scheduler Traffic (EST - P802.1Qbv/D2.2)
7 * Interspersed Express Traffic (IET - P802.3br/D2.0)
17 #include "am65-cpsw-nuss.h"
18 #include "am65-cpsw-qos.h"
19 #include "am65-cpts.h"
47 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_CIR(prio)); in am65_cpsw_tx_pn_shaper_reset()
48 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_EIR(prio)); in am65_cpsw_tx_pn_shaper_reset()
54 struct am65_cpsw_mqprio *p_mqprio = &port->qos.mqprio; in am65_cpsw_tx_pn_shaper_apply()
[all …]
H A Dcpsw_sl.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments Ethernet Switch media-access-controller (MAC) submodule/
122 .device_id = "cpsw",
193 if (sl->regs[reg] == CPSW_SL_REG_NOTUSED) { in cpsw_sl_reg_read()
194 dev_err(sl->dev, "cpsw_sl: not sup r reg: %04X\n", in cpsw_sl_reg_read()
195 sl->regs[reg]); in cpsw_sl_reg_read()
199 val = readl(sl->sl_base + sl->regs[reg]); in cpsw_sl_reg_read()
200 dev_dbg(sl->dev, "cpsw_sl: reg: %04X r 0x%08X\n", sl->regs[reg], val); in cpsw_sl_reg_read()
206 if (sl->regs[reg] == CPSW_SL_REG_NOTUSED) { in cpsw_sl_reg_write()
207 dev_err(sl->dev, "cpsw_sl: not sup w reg: %04X\n", in cpsw_sl_reg_write()
[all …]
H A Dcpsw_ale.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine
24 #define BITMASK(bits) (BIT(bits) - 1)
42 /* ALE NetCP NU switch specific Registers */
75 * struct ale_entry_fld - The ALE tbl entry field description
94 * struct cpsw_ale_dev_id - The ALE version/SoC specific configuration
100 * @nu_switch_ale: NU Switch ALE
134 idx2 = (start + bits - 1) / 32; in cpsw_ale_get_field()
137 index = 2 - idx2; /* flip */ in cpsw_ale_get_field()
138 hi_val = ale_entry[index] << ((idx2 * 32) - start); in cpsw_ale_get_field()
[all …]
H A Dnetcp_ethss.c1 // SPDX-License-Identifier: GPL-2.0
7 * Sandeep Paulraj <s-paulraj@ti.com>
10 * Wingman Kwok <w-kwok2@ti.com>
23 #include "cpsw.h"
37 #define GBE_MODULE_NAME "netcp-gbe"
56 #define GBENU_MODULE_NAME "netcp-gbenu"
61 ((GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU) || \
62 (GBE_IDENT((d)->ss_version) == GBE_SS_ID_2U))
65 (GBE_IDENT((d)->ss_version) == GBE_SS_ID_NU)
68 (GBE_IDENT((d)->ss_version) == GBE_SS_VERSION_14)
[all …]
H A Ddavinci_cpdma.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/dma-mapping.h>
163 #define is_rx_chan(chan) ((chan)->chan_num >= CPDMA_MAX_CHANNELS)
165 #define __chan_linear(chan_num) ((chan_num) & (CPDMA_MAX_CHANNELS - 1))
166 #define chan_linear(chan) __chan_linear((chan)->chan_num)
173 #define dma_reg_read(ctlr, ofs) readl((ctlr)->dmaregs + (ofs))
174 #define chan_read(chan, fld) readl((chan)->fld)
175 #define desc_read(desc, fld) readl(&(desc)->fld)
176 #define dma_reg_write(ctlr, ofs, v) writel(v, (ctlr)->dmaregs + (ofs))
177 #define chan_write(chan, fld, v) writel(v, (chan)->fld)
[all …]
/linux/Documentation/networking/devlink/
H A Dti-cpsw-switch.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ti-cpsw-switch devlink support
7 This document describes the devlink features implemented by the ``ti-cpsw-switch``
13 The ``ti-cpsw-switch`` driver implements the following driver-specific
16 .. list-table:: Driver-specific parameters implemented
19 * - Name
20 - Type
21 - Mode
22 - Description
23 * - ``ale_bypass``
[all …]
H A Dam65-nuss-cpsw-switch.rst1 .. SPDX-License-Identifier: GPL-2.0
4 am65-cpsw-nuss devlink support
7 This document describes the devlink features implemented by the ``am65-cpsw-nuss``
13 The ``am65-cpsw-nuss`` driver implements the following driver-specific
16 .. list-table:: Driver-specific parameters implemented
19 * - Name
20 - Type
21 - Mode
22 - Description
23 * - ``switch_mode``
[all …]
/linux/drivers/phy/ti/
H A Dphy-gmii-sel.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments CPSW Port's PHY Interface Mode selection Driver
5 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
7 * Based on cpsw-phy-sel.c driver created by Mugunthan V N <mugunthanvnm@ti.com>
31 #define PHY_GMII_PORT(n) BIT((n) - 1)
74 const struct phy_gmii_sel_soc_data *soc_data = if_phy->priv->soc_data; in phy_gmii_sel_mode()
75 struct device *dev = if_phy->priv->dev; in phy_gmii_sel_mode()
81 return -EINVAL; in phy_gmii_sel_mode()
83 switch (submode) { in phy_gmii_sel_mode()
105 if (!(soc_data->extra_modes & BIT(PHY_INTERFACE_MODE_QSGMII))) in phy_gmii_sel_mode()
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "ti,am335x-evm", "ti,am33xx";
16 cpu0-supply = <&vdd1_reg>;
26 stdout-path = &uart0;
30 compatible = "regulator-fixed";
31 regulator-name = "vbat";
32 regulator-min-microvolt = <5000000>;
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j721e-common-proc-board.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2019-2024 Texas Instruments Incorporated - https://www.ti.com/
8 /dts-v1/;
10 #include "k3-j721e-som-p0.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/net/ti-dp83867.h>
14 #include <dt-bindings/phy/phy-cadence.h>
17 compatible = "ti,j721e-evm", "ti,j721e";
33 stdout-path = "serial2:115200n8";
[all …]
/linux/drivers/bus/
H A Dti-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ti-sysc.c - Texas Instruments sysc interconnect target driver
8 * Copyright (C) 2017-2024 Texas Instruments Incorporated - https://www.ti.com/
13 * Copyright (C) 2009-2011 Nokia Corporation
14 * Copyright (C) 2011-2021 Texas Instruments Incorporated - https://www.ti.com/
35 #include <linux/platform_data/ti-sysc.h>
37 #include <dt-bindings/bus/ti-sysc.h>
107 * struct sysc - TI sysc interconnect target module registers and capabilities
113 * @mdata: ti-sysc to hwmod translation data for a module
130 * @pre_reset_quirk: module specific pre-reset quirk
[all …]
/linux/arch/arm/mach-omap2/
H A Domap_hwmod.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
15 * ------------
21 * TI's documentation, on-chip devices are referred to as "OMAP
26 * Most of the address and data flow between modules is via OCP-based
32 * OMAP hwmod provides a consistent way to describe the on-chip
42 * -----------
54 * +-------------------------------+
57 * +-------------------------------+
[all …]
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]