Searched +full:coresight +full:- +full:remote +full:- +full:etm (Results 1 – 16 of 16) sorted by relevance
| /linux/arch/arm64/boot/dts/hisilicon/ |
| H A D | hi3660-coresight.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 4 * dtsi for Hisilicon Hi3660 Coresight 6 * Copyright (C) 2016-2018 HiSilicon Ltd. 14 etm@ecc40000 { 15 compatible = "arm,coresight-etm4x", "arm,primecell"; 18 clock-names = "apb_pclk"; 20 arm,coresight-loses-context-with-cpu; 22 out-ports { 25 remote-endpoint = 32 etm@ecd40000 { [all …]
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| H A D | hi6220-coresight.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * dtsi file for Hisilicon Hi6220 coresight 14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell"; 17 clock-names = "apb_pclk"; 19 out-ports { 22 remote-endpoint = 28 in-ports { 31 remote-endpoint = 39 compatible = "arm,coresight-tmc", "arm,primecell"; 42 clock-names = "apb_pclk"; [all …]
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| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | sc9860.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 15 #address-cells = <2>; 16 #size-cells = <0>; 18 cpu-map { 52 compatible = "arm,cortex-a53"; 54 enable-method = "psci"; 55 cpu-idle-states = <&CORE_PD &CLUSTER_PD>; [all …]
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| H A D | sc9836.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #address-cells = <2>; 16 #size-cells = <0>; 20 compatible = "arm,cortex-a53"; 22 enable-method = "psci"; 27 compatible = "arm,cortex-a53"; 29 enable-method = "psci"; 34 compatible = "arm,cortex-a53"; 36 enable-method = "psci"; [all …]
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| H A D | ums512.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/sprd,ums512-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <2>; 18 #size-cells = <0>; 20 cpu-map { 51 compatible = "arm,cortex-a55"; [all …]
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 #address-cells = <1>; 14 #size-cells = <1>; 18 frame-number = <1>; 30 #mbox-cells = <1>; 32 clock-names = "apb_pclk"; 36 compatible = "arm,mmu-400", "arm,smmu-v1"; [all …]
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| /linux/arch/arm/boot/dts/arm/ |
| H A D | vexpress-v2p-ca15_a7.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 * Cortex-A15_A7 MPCore (V2P-CA15_A7) 8 * HBI-0249A 11 /dts-v1/; 12 #include "vexpress-v2m-rs1.dtsi" 15 model = "V2P-CA15_CA7"; 18 compatible = "arm,vexpress,v2p-ca15_a7", "arm,vexpress"; 19 interrupt-parent = <&gic>; 20 #address-cells = <2>; 21 #size-cells = <2>; [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,rpm-icc.h> [all …]
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-msm8974.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interconnect/qcom,msm8974.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-msm8974.h> 8 #include <dt-bindings/clock/qcom,mmcc-msm8974.h> 9 #include <dt-bindings/clock/qcom,rpmcc.h> 10 #include <dt-bindings/reset/qcom,gcc-msm8974.h> 11 #include <dt-bindings/gpio/gpio.h> [all …]
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| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap3-beagle-xm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap3-beagle-xm", "ti,omap3630", "ti,omap3"; 15 cpu0-supply = <&vcc>; 32 #clock-cells = <0>; 33 compatible = "fixed-clock"; 34 clock-frequency = <26000000>; 37 led-controller-1 { 38 compatible = "gpio-leds"; [all …]
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| H A D | omap3-beagle.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 11 compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3"; 15 cpu0-supply = <&vcc>; 30 compatible = "gpio-leds"; 31 led-pmu-stat { 36 led-heartbeat { 38 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */ 39 linux,default-trigger = "heartbeat"; [all …]
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx7d.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 7 #include <dt-bindings/reset/imx7-reset.h> 18 clock-frequency = <996000000>; 19 operating-points-v2 = <&cpu0_opp_table>; 20 #cooling-cells = <2>; 21 nvmem-cells = <&fuse_grade>; 22 nvmem-cell-names = "speed_grade"; 26 compatible = "arm,cortex-a7"; 29 clock-frequency = <996000000>; 30 operating-points-v2 = <&cpu0_opp_table>; [all …]
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| H A D | imx7s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/imx7d-clock.h> 7 #include <dt-bindings/power/imx7-power.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/imx7-reset.h> 12 #include "imx7d-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx95.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 6 #include <dt-bindings/clock/nxp,imx95-clock.h> 7 #include <dt-bindings/dma/fsl-edma.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 13 #include "imx95-clock.h" 14 #include "imx95-pinfunc.h" 15 #include "imx95-power.h" [all …]
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| /linux/arch/arm/boot/dts/microchip/ |
| H A D | sama5d2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC 9 #include <dt-bindings/dma/at91.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 13 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 20 interrupt-parent = <&aic>; [all …]
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| /linux/ |
| H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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