| /freebsd/sys/contrib/device-tree/Bindings/opp/ |
| H A D | opp-v2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/opp/opp-v2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Viresh Kumar <viresh.kumar@linaro.org> 13 - $ref: opp-v2-base.yaml# 17 const: operating-points-v2 22 - | 24 * Example 1: Single cluster Dual-core ARM cortex A9, switch DVFS states 28 #address-cells = <1>; [all …]
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| H A D | opp.txt | 2 ---------------------------------------------------- 4 Devices work at voltage-current-frequency combinations and some implementations 13 Binding 1: operating-points 16 This binding only supports voltage-frequency pairs. 19 - operating-points: An array of 2-tuples items, and each item consists 20 of frequency and voltage like <freq-kHz vol-uV>. 27 compatible = "arm,cortex-a9"; 29 next-level-cache = <&L2>; 30 operating-points = < 39 Binding 2: operating-points-v2 [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/arm/ |
| H A D | vexpress-v2p-ca9.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * ARM Ltd. Versatile Express 6 * Cortex-A9 MPCore (V2P-CA9) 8 * HBI-0191B 11 /dts-v1/; 12 #include "vexpress-v2m.dtsi" 15 model = "V2P-CA9"; 16 arm,hbi = <0x191>; 17 arm,vexpress,site = <0xf>; 18 compatible = "arm,vexpress,v2p-ca9", "arm,vexpress"; [all …]
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| H A D | vexpress-v2m.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * ARM Ltd. Versatile Express 6 * V2M-P1 8 * HBI-0190D 14 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong 18 * CHANGES TO vexpress-v2m-rs1.dtsi! 20 #include <dt-bindings/interrupt-controller/arm-gic.h> 24 compatible = "simple-bus"; 25 #address-cells = <1>; 26 #size-cells = <1>; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | mmci.txt | 1 * ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1 3 The ARM PrimeCell MMCI PL180 and PL181 provides an interface for 11 - compatible : contains "arm,pl18x", "arm,primecell". 12 - vmmc-supply : phandle to the regulator device tree node, mentioned 13 as the VCC/VDD supply in the eMMC/SD specs. 16 - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides 18 - resets : phandle to internal reset line. 20 - vqmmc-supply : phandle to the regulator device tree node, mentioned 21 as the VCCQ/VDD_IO supply in the eMMC/SD specs. 23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0]. [all …]
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| H A D | arm,pl18x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/arm,pl18x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM PrimeCell MultiMedia Card Interface (MMCI) PL180 and PL181 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Ulf Hansson <ulf.hansson@linaro.org> 14 The ARM PrimeCells MMCI PL180 and PL181 provides an interface for 16 vendors have use the VHDL code from ARM to create derivative MMC/SD/SDIO 20 - $ref: /schemas/arm/primecell.yaml# [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/arm/cpus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM CPUs 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 21 with updates for 32-bit and 64-bit ARM systems provided in this document. 30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in 37 The ARM architecture, in accordance with the Devicetree Specification, 45 Usage and definition depend on ARM architecture version and configuration: [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx6q.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6q-pinfunc.h" 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "arm,cortex-a9"; 23 next-level-cache = <&L2>; 24 operating-points = < 32 fsl,soc-operating-points = < 33 /* ARM kHz SOC-PU uV */ [all …]
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| H A D | imx6dl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6dl-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a9"; 22 next-level-cache = <&L2>; 23 operating-points = < 29 fsl,soc-operating-points = < 30 /* ARM kHz SOC-PU uV */ [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
| H A D | cpufreq-mediatek.txt | 5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names. 6 - clock-names: Should contain the following: 7 "cpu" - The multiplexer for clock input of CPU cluster. 8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock 11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for 13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml 15 - proc-supply: Regulator for Vproc of CPU cluster. 18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver 23 - mediatek,cci: 30 - #cooling-cells: [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/gpu/ |
| H A D | arm,mali-valhall-csf.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Mali Valhall GPU 10 - Liviu Dudau <liviu.dudau@arm.com> 11 - Boris Brezillon <boris.brezillon@collabora.com> 15 pattern: '^gpu@[a-f0-9]+$' 19 - items: 20 - enum: [all …]
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| H A D | arm,mali-bifrost.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Mali Bifrost GPU 10 - Rob Herring <robh@kernel.org> 14 pattern: '^gpu@[a-f0-9]+$' 18 - items: 19 - enum: 20 - allwinner,sun50i-h616-mali [all …]
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| H A D | arm,mali-midgard.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM Mali Midgard GPU 10 - Rob Herring <robh@kernel.org> 14 pattern: '^gpu@[a-f0-9]+$' 17 - items: 18 - enum: 19 - samsung,exynos5250-mali [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sdm845-cheza.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 25 stdout-path = "serial0:115200n8"; 29 compatible = "pwm-backlight"; 31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; 32 power-supply = <&ppvar_sys>; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&ap_edp_bklten>; 37 /* FIXED REGULATORS - parents above children */ [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/arm/ |
| H A D | corstone1000-fvp.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright (c) 2022, Arm Limited. All rights reserved. 8 /dts-v1/; 13 model = "ARM Corstone1000 FVP (Fixed Virtual Platform)"; 14 compatible = "arm,corstone1000-fvp"; 19 phy-mode = "mii"; 21 reg-io-width = <2>; 24 vmmc_v3_3d: regulator-vmmc { 25 compatible = "regulator-fixed"; 26 regulator-name = "vmmc_supply"; [all …]
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| H A D | juno-motherboard.dtsi | 2 * ARM Juno Platform motherboard peripherals 4 * Copyright (c) 2013-2014 ARM Ltd 11 mb_clk24mhz: clock-24000000 { 12 compatible = "fixed-clock"; 13 #clock-cells = <0>; 14 clock-frequency = <24000000>; 15 clock-output-names = "juno_mb:clk24mhz"; 18 mb_clk25mhz: clock-25000000 { 19 compatible = "fixed-clock"; 20 #clock-cells = <0>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | stm32mp151c-plyaqm.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2 /dts-v1/; 4 #include <arm/st/stm32mp151.dtsi> 5 #include <arm/st/stm32mp15xc.dtsi> 6 #include <arm/st/stm32mp15-pinctrl.dtsi> 7 #include <arm/st/stm32mp15xxad-pinctrl.dtsi> 8 #include <arm/st/stm32mp15-scmi.dtsi> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/leds/common.h> 27 remote-endpoint = <&i2s1_endpoint>; [all …]
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| H A D | stm32mp157f-dk2-scmi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved 7 #include "stm32mp15-scmi.dtsi" 10 reserved-memory { 13 no-map; 18 compatible = "arm,smc-wdt"; 19 arm,smc-id = <0xbc000000>; 26 vdd-supply = <&scmi_vdd>; 27 vdda-supply = <&scmi_vdd>; 44 VL-supply = <&scmi_v3v3>; [all …]
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| H A D | ste-dbx5x0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm [all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/allwinner/ |
| H A D | sun50i-h618-transpeed-8k618-t.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (C) 2023 Arm Ltd. 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 9 #include "sun50i-h616-cpu-opp.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 model = "Transpeed 8K618-T"; 16 compatible = "transpeed,8k618-t", "allwinner,sun50i-h618"; 24 stdout-path = "serial0:115200n8"; [all …]
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| H A D | sun50i-h313-tanix-tx1.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (C) 2024 Arm Ltd. 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 9 #include "sun50i-h616-cpu-opp.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/input/linux-event-codes.h> 14 #include <dt-bindings/leds/common.h> 18 compatible = "oranth,tanix-tx1", "allwinner,sun50i-h616"; [all …]
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| H A D | sun50i-h616-x96-mate.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (C) 2021 Arm Ltd. 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 9 #include "sun50i-h616-cpu-opp.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 compatible = "hechuang,x96-mate", "allwinner,sun50i-h616"; 23 stdout-path = "serial0:115200n8"; 27 /* board wide 5V supply directly from the DC input */ [all …]
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| H A D | sun50i-h618-orangepi-zero2w.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (C) 2023 Arm Ltd. 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 9 #include "sun50i-h616-cpu-opp.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/leds/common.h> 17 compatible = "xunlong,orangepi-zero2w", "allwinner,sun50i-h618"; 24 stdout-path = "serial0:115200n8"; [all …]
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| H A D | sun50i-h618-yuzukihd-chameleon.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (C) 2024 Arm Ltd. 6 /dts-v1/; 8 #include "sun50i-h616.dtsi" 9 #include "sun50i-h616-cpu-opp.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 compatible = "yuzukihd,chameleon", "allwinner,sun50i-h618"; 24 stdout-path = "serial0:115200n8"; 28 /* board wide 5V supply directly from the USB-C socket */ [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
| H A D | hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Rob Clark <robdclark@gmail.com> 16 - qcom,hdmi-tx-8084 17 - qcom,hdmi-tx-8660 18 - qcom,hdmi-tx-8960 19 - qcom,hdmi-tx-8974 20 - qcom,hdmi-tx-8994 21 - qcom,hdmi-tx-8996 [all …]
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