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/linux/drivers/mmc/core/
H A Dsdio_io.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Pierre Ossman
12 #include <linux/mmc/sdio.h>
21 * sdio_claim_host - exclusively claim a bus for a certain SDIO function
22 * @func: SDIO function that will be accessed
24 * Claim a bus for a set of operations. The SDIO function given
32 mmc_claim_host(func->card->host); in sdio_claim_host()
37 * sdio_release_host - release a bus for a certain SDIO function
38 * @func: SDIO function that was accessed
48 mmc_release_host(func->card->host); in sdio_release_host()
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H A Dsd_uhs2.c1 // SPDX-License-Identifier: GPL-2.0-only
21 * Support for SD UHS-II cards
51 if (host->ios.power_mode == MMC_POWER_ON) in sd_uhs2_power_up()
54 host->ios.vdd = fls(host->ocr_avail) - 1; in sd_uhs2_power_up()
55 host->ios.clock = host->f_init; in sd_uhs2_power_up()
56 host->ios.timing = MMC_TIMING_UHS2_SPEED_A; in sd_uhs2_power_up()
57 host->ios.power_mode = MMC_POWER_ON; in sd_uhs2_power_up()
59 return host->ops->uhs2_control(host, UHS2_SET_IOS); in sd_uhs2_power_up()
66 if (host->ios.power_mode == MMC_POWER_OFF) in sd_uhs2_power_off()
69 host->ios.vdd = 0; in sd_uhs2_power_off()
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/linux/drivers/ssb/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 It will be auto-selected if needed in other
28 # Support for Block-I/O. SELECT this from the driver that needs it.
39 bool "Support for SSB on PCI-bus host"
60 bool "Support for SSB on PCMCIA-bus host"
75 bool "Support for SSB on SDIO-bus host"
79 of a SDIO device.
107 Driver for the Sonics Silicon Backplane attached
124 Driver for the Sonics Silicon Backplane attached
145 Driver for the Sonics Silicon Backplane attached
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H A Dmain.c20 #include <linux/dma-mapping.h>
33 /* Temporary list of yet-to-be-attached buses */
64 if (bus->bustype == SSB_BUSTYPE_PCI && in ssb_pci_dev_to_bus()
65 bus->host_pci == pdev) in ssb_pci_dev_to_bus()
83 if (bus->bustype == SSB_BUSTYPE_PCMCIA && in ssb_pcmcia_dev_to_bus()
84 bus->host_pcmcia == pdev) in ssb_pcmcia_dev_to_bus()
111 return -ENODEV; in ssb_for_each_bus_call()
117 get_device(dev->dev); in ssb_device_get()
124 put_device(dev->dev); in ssb_device_put()
133 if (dev->driver) { in ssb_device_resume()
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/linux/Documentation/devicetree/bindings/net/bluetooth/
H A Dmediatek,mt7921s-bluetooth.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/mediatek,mt7921s-bluetooth.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
13 MT7921S is an SDIO-attached dual-radio WiFi+Bluetooth Combo chip; each
14 function is its own SDIO function on a shared SDIO interface. The chip
16 This binding only covers the Bluetooth SDIO function, with one device
17 node describing only this SDIO function.
20 - $ref: bluetooth-controller.yaml#
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/linux/drivers/bluetooth/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
94 tristate "HCI SDIO driver"
97 Bluetooth HCI SDIO driver.
99 SDIO interface.
101 Say Y here to compile support for Bluetooth SDIO devices into the
188 bool "Three-wire UART (H5) protocol support"
192 The HCI Three-wire UART Transport Layer makes it possible to
194 Three-wire UART Transport Layer assumes that the UART
198 Say Y here to compile support for Three-wire UART protocol.
235 The Realtek protocol support enables Bluetooth HCI over 3-Wire
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/linux/include/linux/mmc/
H A Dcard.h1 /* SPDX-License-Identifier: GPL-2.0-only */
121 u8 raw_sectors[4]; /* 212 - 4 bytes */
185 #define SD_SET_CURRENT_NO_CHANGE (-1)
307 #define MMC_TYPE_SDIO 2 /* SDIO card */
312 #define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
313 #define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
315 #define MMC_QUIRK_NONSTD_SDIO (1<<2) /* non-standard SDIO card attached */
317 #define MMC_QUIRK_NONSTD_FUNC_IF (1<<4) /* SDIO card has nonstd function interfaces */
335 bool reenable_cmdq; /* Re-enable Command Queue */
340 unsigned int eg_boundary; /* don't cross erase-group boundaries */
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/linux/drivers/comedi/drivers/
H A Dadv_pci_dio.c1 // SPDX-License-Identifier: GPL-2.0
13 * Devices: [Advantech] PCI-1730 (adv_pci_dio), PCI-1733,
14 * PCI-1734, PCI-1735U, PCI-1736UP, PCI-1739U, PCI-1750,
15 * PCI-1751, PCI-1752, PCI-1753, PCI-1753+PCI-1753E,
16 * PCI-1754, PCI-1756, PCI-1761, PCI-1762
34 /* PCI-1730, PCI-1733, PCI-1736 interrupt control registers */
45 /* PCI-1739U, PCI-1750, PCI1751 interrupt control registers */
48 /* PCI-1753, PCI-1753E interrupt control registers */
52 /* PCI-1754, PCI-1756 interrupt control registers */
55 /* PCI-1752, PCI-1756 special registers */
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-quartz64-a.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/soc/rockchip,vop2.h>
12 compatible = "pine64,quartz64-a", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
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/linux/include/linux/ssb/
H A Dssb.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/dma-mapping.h>
70 u8 itssi_a; /* Idle TSSI Target for A-PHY */
71 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
77 u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
78 u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
79 u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
99 u16 boardflags_lo; /* Board flags (bits 0-15) */
100 u16 boardflags_hi; /* Board flags (bits 16-31) */
101 u16 boardflags2_lo; /* Board flags (bits 32-47) */
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-venice-gw73xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
16 compatible = "gpio-usb-b-connector", "usb-b-connector";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_usbcon1>;
21 vbus-supply = <&reg_usb1_vbus>;
22 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
26 remote-endpoint = <&usb3_dwc>;
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H A Dimx8mp-tqma8mpql-mba8mp-ras314.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (c) 2023-2024 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
9 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 #include <dt-bindings/pwm/pwm.h>
15 #include "imx8mp-tqma8mpql.dtsi"
18 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MP-RAS314";
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H A Dimx8mp-tqma8mpql-mba8mpxl.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "imx8mp-tqma8mpql.dtsi"
16 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
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H A Dimx8mp-venice-gw74xx.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include <dt-bindings/net/ti-dp83867.h>
18 compatible = "gateworks,imx8mp-gw74xx", "fsl,imx8mp";
33 stdout-path = &uart2;
42 pinctrl-names = "default";
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7-mba7.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Device Tree Include file for TQ-Systems MBa7 carrier board.
5 * Copyright (C) 2016 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/net/ti-dp83867.h>
20 /delete-property/ mmc2;
26 compatible = "gpio-beeper";
31 stdout-path = &uart6;
34 gpio_buttons: gpio-keys {
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/linux/Documentation/driver-api/
H A Dpin-control.rst9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain,
17 Top-level interface
22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that
26 - PINS are equal to pads, fingers, balls or whatever packaging input or
30 be sparse - i.e. there may be gaps in the space with numbers where no
60 .. code-block:: c
97 See ``arch/arm/mach-ux500/Kconfig`` for an example.
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/linux/arch/arm/mach-omap2/
H A Domap_hwmod_3xxx_data.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
5 * Copyright (C) 2009-2011 Nokia Corporation
12 * XXX these should be marked initdata for multi-OMAP kernels
15 #include <linux/platform_data/i2c-omap.h>
17 #include <linux/platform_data/hsmmc-omap.h>
25 #include "prm-regbits-34xx.h"
26 #include "cm-regbits-34xx.h"
36 * is driver-specific or driver-kernel integration-specific belongs
286 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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