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Searched full:rzg2l_port_pinmux (Results 1 – 9 of 9) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Drzg2l-smarc-pinfunction.dtsi16 pinmux = <RZG2L_PORT_PINMUX(10, 1, 2)>, /* TX */
17 <RZG2L_PORT_PINMUX(11, 0, 2)>; /* RX */
29 pinmux = <RZG2L_PORT_PINMUX(12, 1, 2)>, /* TX */
30 <RZG2L_PORT_PINMUX(13, 0, 2)>; /* RX */
52 pinmux = <RZG2L_PORT_PINMUX(18, 0, 3)>, /* SDA */
53 <RZG2L_PORT_PINMUX(18, 1, 3)>; /* SCL */
58 pinmux = <RZG2L_PORT_PINMUX(48, 0, 4)>, /* MTCLKA */
59 <RZG2L_PORT_PINMUX(48, 1, 4)>; /* MTCLKB */
63 pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */
64 <RZG2L_PORT_PINMUX(4
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H A Drzg2lc-smarc-pinfunction.dtsi18 pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */
19 <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */
33 pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */
34 <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */
49 pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */
50 <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
55 pinmux = <RZG2L_PORT_PINMUX(44, 0, 4)>, /* MTIOC3A */
56 <RZG2L_PORT_PINMUX(44, 1, 4)>, /* MTIOC3B */
57 <RZG2L_PORT_PINMUX(44, 2, 4)>, /* MTIOC3C */
58 <RZG2L_PORT_PINMUX(4
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H A Drzg2ul-smarc-som.dtsi141 pinmux = <RZG2L_PORT_PINMUX(6, 2, 1)>; /* ADC_TRG */
145 pinmux = <RZG2L_PORT_PINMUX(4, 5, 1)>, /* ET0_LINKSTA */
146 <RZG2L_PORT_PINMUX(4, 3, 1)>, /* ET0_MDC */
147 <RZG2L_PORT_PINMUX(4, 4, 1)>, /* ET0_MDIO */
148 <RZG2L_PORT_PINMUX(1, 0, 1)>, /* ET0_TXC */
149 <RZG2L_PORT_PINMUX(1, 1, 1)>, /* ET0_TX_CTL */
150 <RZG2L_PORT_PINMUX(1, 2, 1)>, /* ET0_TXD0 */
151 <RZG2L_PORT_PINMUX(1, 3, 1)>, /* ET0_TXD1 */
152 <RZG2L_PORT_PINMUX(1, 4, 1)>, /* ET0_TXD2 */
153 <RZG2L_PORT_PINMUX(
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H A Drzg2ul-smarc-pinfunction.dtsi16 pinmux = <RZG2L_PORT_PINMUX(1, 1, 3)>, /* TX */
17 <RZG2L_PORT_PINMUX(1, 2, 3)>; /* RX */
30 pinmux = <RZG2L_PORT_PINMUX(2, 0, 3)>, /* TX */
31 <RZG2L_PORT_PINMUX(2, 1, 3)>; /* RX */
55 pinmux = <RZG2L_PORT_PINMUX(4, 0, 4)>; /* MTIOC2A */
60 pinmux = <RZG2L_PORT_PINMUX(6, 4, 6)>, /* TxD */
61 <RZG2L_PORT_PINMUX(6, 3, 6)>; /* RxD */
83 pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
99 pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
109 pinmux = <RZG2L_PORT_PINMUX(
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H A Drzg2l-smarc-som.dtsi179 pinmux = <RZG2L_PORT_PINMUX(9, 0, 2)>; /* ADC_TRG */
183 pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */
184 <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
185 <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
186 <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
187 <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */
188 <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
189 <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
190 <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
191 <RZG2L_PORT_PINMUX(2
[all...]
H A Drzg2lc-smarc-som.dtsi131 pinmux = <RZG2L_PORT_PINMUX(28, 1, 1)>, /* ET0_LINKSTA */
132 <RZG2L_PORT_PINMUX(27, 1, 1)>, /* ET0_MDC */
133 <RZG2L_PORT_PINMUX(28, 0, 1)>, /* ET0_MDIO */
134 <RZG2L_PORT_PINMUX(20, 0, 1)>, /* ET0_TXC */
135 <RZG2L_PORT_PINMUX(20, 1, 1)>, /* ET0_TX_CTL */
136 <RZG2L_PORT_PINMUX(20, 2, 1)>, /* ET0_TXD0 */
137 <RZG2L_PORT_PINMUX(21, 0, 1)>, /* ET0_TXD1 */
138 <RZG2L_PORT_PINMUX(21, 1, 1)>, /* ET0_TXD2 */
139 <RZG2L_PORT_PINMUX(22, 0, 1)>, /* ET0_TXD3 */
140 <RZG2L_PORT_PINMUX(2
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H A Dr9a07g043-smarc-pmod.dtso36 pinmux = <RZG2L_PORT_PINMUX(2, 2, 5)>, /* TxD */
37 <RZG2L_PORT_PINMUX(2, 3, 5)>; /* RxD */
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Drenesas,rzg2l-pinctrl.yaml106 alternate function configuration number using the RZG2L_PORT_PINMUX()
168 pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* Tx */
169 <RZG2L_PORT_PINMUX(38, 1, 1)>; /* Rx */
186 pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>, /* CD */
187 <RZG2L_PORT_PINMUX(19, 1, 1)>; /* WP */
/freebsd/sys/contrib/device-tree/include/dt-bindings/pinctrl/
H A Drzg2l-pinctrl.h18 #define RZG2L_PORT_PINMUX(b, p, f) ((b) * RZG2L_PINS_PER_PORT + (p) | ((f) << 16)) macro