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/linux/arch/riscv/kernel/pi/
H A Dfdt_early.c1 // SPDX-License-Identifier: GPL-2.0-only
20 prop = fdt_getprop_w((void *)dtb_pa, node, "kaslr-seed", &len); in get_kaslr_seed()
30 * fdt_device_is_available - check if a device is available for use
79 * isa_string_contains - check if isa string contains an extension
98 /* Search for single chars between rv32/64 and multi-letter extensions */ in isa_string_contains()
106 /* Skip to start of multi-letter extensions */ in isa_string_contains()
115 /* Multi-letter extensions must be split from other multi-letter in isa_string_contains()
116 * extensions with an "_", the end of a multi-letter extension will in isa_string_contains()
118 * multi-letter extension. in isa_string_contains()
129 * early_cpu_isa_ext_available - check if cpu node has an extension
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/linux/sound/soc/generic/
H A Daudio-graph-card2.c1 // SPDX-License-Identifier: GPL-2.0
8 // based on ${LINUX}/sound/soc/generic/audio-graph-card.c
25 bitclock-master;
27 frame-master;
39 sample0: left_j, bitclock-master, frame-master
40 sample1: i2s, bitclock-master
47 "format" property is no longer needed on DT if both CPU/Codec drivers are
56 linux/sound/soc/soc-utils.c
57 linux/sound/soc/generic/test-component.c
60 Normal Audio-Graph
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 It also support DPCM of multi CPU single Codec ststem.
20 with OF-graph DT bindings.
21 It also support DPCM of multi CPU single Codec ststem.
29 with OF-graph DT bindings.
/linux/Documentation/core-api/
H A Dcpu_hotplug.rst2 CPU hotplug in the Kernel
19 insertion and removal require support for CPU hotplug.
22 provisioning reasons, or for RAS purposes to keep an offending CPU off
23 system execution path. Hence the need for CPU hotplug support in the
26 A more novel use of CPU-hotplug support is its use today in suspend resume
27 support for SMP. Dual-core and HT support makes even a laptop run SMP kernels
53 CPU maps
66 after a CPU is available for kernel scheduling and ready to receive
67 interrupts from devices. Its cleared when a CPU is brought down using
69 migrated to another target CPU.
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/linux/include/linux/
H A Dcpuhotplug.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * CPU-up CPU-down
15 * BRINGUP_CPU->AP_OFFLINE BRINGUP_CPU <- AP_IDLE_DEAD (idle thread/play_dead)
17 * v (IRQ-off) ,---------------^
19 * | TEARDOWN_CPU <- AP_ONLINE_IDLE
26 * CPU hotplug states. The state machine invokes the installed state
28 * during a CPU online operation. During a CPU offline operation the
30 * CPUHP_ONLINE - 1 down to CPUHP_OFFLINE.
34 * PREPARE: The callbacks are invoked on a control CPU before the
35 * hotplugged CPU is started up or after the hotplugged CPU has died.
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/linux/Documentation/networking/
H A Dscaling.rst1 .. SPDX-License-Identifier: GPL-2.0
13 multi-processor systems.
17 - RSS: Receive Side Scaling
18 - RPS: Receive Packet Steering
19 - RFS: Receive Flow Steering
20 - Accelerated Receive Flow Steering
21 - XPS: Transmit Packet Steering
28 (multi-queue). On reception, a NIC can send different packets to different
33 generally known as “Receive-side Scaling” (RSS). The goal of RSS and
35 Multi-queue distribution can also be used for traffic prioritization, but
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/linux/tools/perf/bench/
H A Dfutex-lock-pi.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <subcmd/parse-options.h>
44 .nbuckets = -1,
52 OPT_BOOLEAN( 'M', "multi", &params.multi, "Use multiple futexes"),
60 "perf bench futex lock-pi <options>",
69 printf("%sAveraged %ld operations/sec (+- %.2f%%), total secs = %d\n", in print_summary()
88 unsigned long ops = w->ops; in workerfn()
91 threads_starting--; in workerfn()
100 ret = futex_lock_pi(w->futex, NULL, futex_flag); in workerfn()
104 warn("thread %d: Could not lock pi-lock for %p (%d)", in workerfn()
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/linux/arch/riscv/kernel/
H A Dcpufeature.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/cpu.h>
24 #include <asm/text-patching.h>
32 #define NUM_ALPHA_EXTS ('z' - 'a' + 1)
43 /* Per-cpu ISA extensions. */
49 * riscv_isa_extension_base() - Get base extension word
63 * __riscv_isa_extension_available() - Check whether given extension
89 return -EPROBE_DEFER; in riscv_ext_f_depends()
96 pr_err("Zicbom detected in ISA string, disabling as no cbom-block-size found\n"); in riscv_ext_zicbom_validate()
97 return -EINVAL; in riscv_ext_zicbom_validate()
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/linux/Documentation/block/
H A Dnull_blk.rst1 .. SPDX-License-Identifier: GPL-2.0
11 block-layer implementations. It emulates a block device of X gigabytes in size.
15 Multi-queue block-layer
17 - Request-based.
18 - Configurable submission queues per device.
20 No block-layer (Known as bio-based)
22 - Bio-based. IO requests are submitted directly to the device driver.
23 - Directly accepts bio data structure and returns them.
30 queue_mode=[0-2]: Default: 2-Multi-queue
31 Selects which block-layer the module should instantiate with.
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H A Dblk-mq.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Multi-Queue Block IO Queueing Mechanism (blk-mq)
7 The Multi-Queue Block IO Queueing Mechanism is an API to enable fast storage
16 ----------
26 However, with the development of Solid State Drives and Non-Volatile Memories
30 in those devices' design, the multi-queue mechanism was introduced.
36 to different CPUs) wanted to perform block IO. Instead of this, the blk-mq API
37 spawns multiple queues with individual entry points local to the CPU, removing
42 ---------
45 for instance), blk-mq takes action: it will store and manage IO requests to
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/linux/drivers/eisa/
H A Deisa.ids6 # Marc Zyngier <maz@wild-wind.fr.eu.org>
10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
25 ACE7010 "ACME Multi-Function Board"
28 ACR1341 "M1 486SX/20 CPU Board"
29 ACR1351 "M1 486SX/20 CPU Board"
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/linux/tools/testing/selftests/bpf/progs/
H A Dtrigger_bench.c1 // SPDX-License-Identifier: GPL-2.0
23 int cpu = bpf_get_smp_processor_id(); in inc_counter() local
25 __sync_add_and_fetch(&hits[cpu & CPU_MASK].value, 1); in inc_counter()
35 SEC("?uprobe.multi")
95 SEC("?kprobe.multi/bpf_get_numa_node_id") in bench_trigger_kprobe_multi()
102 SEC("?kprobe.multi/bpf_get_numa_node_id") in bench_trigger_kretprobe_multi()
108 SEC("?kretprobe.multi/bpf_get_numa_node_id") in bench_trigger_fentry()
115 SEC("?kretprobe.multi/bpf_get_numa_node_i
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/linux/arch/powerpc/boot/dts/
H A Dturris1x.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
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/linux/fs/netfs/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 helpers for high-level buffered I/O, abstracting out read
21 multi-CPU system these may be on cachelines that keep bouncing
26 bool "Enable dynamic debugging netfslib and FS-Cache"
56 multi-CPU system these may be on cachelines that keep bouncing
/linux/arch/sh/mm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
12 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
15 On other systems (such as the SH-3 and 4) where an MMU exists,
26 On MMU-less systems, any of these page sizes can be selected
89 bool "Support 32-bit physical addressing through PMB"
95 32-bits through the SH-4A PMB. If this is not set, legacy
96 29-bit physical addressing will be used.
116 bool "Non-Uniform Memory Access (NUMA) Support"
186 bool "Multi-core scheduler support"
190 Multi-core scheduler support improves the CPU scheduler's decision
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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
18 built-into a SoC.
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/linux/tools/testing/selftests/wireguard/qemu/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
13 CBUILD := $(shell gcc -dumpmachine)
14 HOST_ARCH := $(firstword $(subst -, ,$(CBUILD)))
19 MIRROR := https://download.wireguard.com/qemu-test/distfiles/
21 KERNEL_BUILD_PATH := $(BUILD_PATH)/kernel$(if $(findstring yes,$(DEBUG_KERNEL)),-debug)
28 $(1)_NAME := $(2)-$$($(1)_VERSION)
36 mkdir -
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/linux/drivers/irqchip/
H A Dirq-ompic.c2 * Open Multi-Processor Interrupt Controller driver
11 * The ompic device handles IPI communication between cores in multi-core
16 * For each CPU the ompic has 2 registers. The control register for sending
21 * +---------+---------+----------+---------+
23 * ----------+---------+----------+----------
25 * +---------+---------+----------+---------+
28 * +----------+-------------+----------+---------+
30 * -----------+-------------+----------+---------+
32 * +----------+-------------+----------+---------+
36 * - The ompic generates a level interrupt to the CPU PIC when a message is
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H A Dirq-mips-cpu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * This file define the irq handler for MIPS CPU interrupts.
15 * level triggered (i.e., cannot be cleared from CPU; must be cleared from
19 * may be used for IPIs in multi-threaded single-core systems.
21 * The last one is usually the CPU timer interrupt if the counter register
42 set_c0_status(IE_SW0 << d->hwirq); in unmask_mips_irq()
48 clear_c0_status(IE_SW0 << d->hwirq); in mask_mips_irq()
71 clear_c0_cause(C_SW0 << d->hwirq); in mips_mt_cpu_irq_startup()
84 clear_c0_cause(C_SW0 << d->hwirq); in mips_mt_cpu_irq_ack()
91 static void mips_mt_send_ipi(struct irq_data *d, unsigned int cpu) in mips_mt_send_ipi() argument
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/linux/arch/sh/kernel/
H A Dtopology.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/cpu.h>
16 static DEFINE_PER_CPU(struct cpu, cpu_devices);
21 static cpumask_t cpu_coregroup_map(int cpu) in cpu_coregroup_map() argument
24 * Presently all SH-X3 SMP cores are multi-cores, so just keep it in cpu_coregroup_map()
30 const struct cpumask *cpu_coregroup_mask(int cpu) in cpu_coregroup_mask() argument
32 return &cpu_core_map[cpu]; in cpu_coregroup_mask()
37 unsigned int cpu; in arch_update_cpu_topology() local
39 for_each_possible_cpu(cpu) in arch_update_cpu_topology()
40 cpu_core_map[cpu] = cpu_coregroup_map(cpu); in arch_update_cpu_topology()
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/linux/Documentation/devicetree/bindings/timer/
H A Dcsky,mptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: C-SKY Multi-processors Timer
10 - Flavio Suligoi <f.suligoi@asem.it>
11 - Guo Ren <guoren@kernel.org>
14 C-SKY multi-processors timer is designed for C-SKY SMP system and the regs are
15 accessed by cpu co-processor 4 registers with mtcr/mfcr.
17 - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
18 - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Daudio-graph-card2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-graph-card2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 - audio-graph-card2
17 $ref: /schemas/types.yaml#/definitions/phandle-array
21 $ref: audio-graph.yaml#/properties/routing
22 aux-devs:
26 $ref: /schemas/types.yaml#/definitions/phandle-array
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/linux/Documentation/admin-guide/cgroup-v1/
H A Dcpuacct.rst2 CPU Accounting Controller
5 The CPU accounting controller is used to group tasks using cgroups and
6 account the CPU usage of these groups of tasks.
8 The CPU accounting controller supports multi-hierarchy groups. An accounting
9 group accumulates the CPU usage of all of its child groups and the tasks
14 # mount -t cgroup -ocpuacct none /sys/fs/cgroup
19 /sys/fs/cgroup/cpuacct.usage gives the CPU time (in nanoseconds) obtained
20 by this group which is essentially the CPU time obtained by all the tasks
30 process (bash) into it. CPU time consumed by this bash and its children
35 CPU time obtained by the cgroup into user and system times. Currently
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/linux/arch/mips/kernel/
H A Dsmp-cps.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #include <linux/cpu.h>
19 #include <asm/mips-cps.h>
22 #include <asm/pm-cps.h>
26 #include <asm/smp-cps.h>
78 timeout--; in power_up_other_cluster()
159 0x0, CSEGX_SIZE - 1); in allocate_cps_vecs()
172 end = SZ_4G - 1; in allocate_cps_vecs()
186 return -ENOMEM; in allocate_cps_vecs()
241 for (v = 0; v < min_t(int, core_vpes, NR_CPUS - nvpes); v++) { in cps_smp_setup()
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/linux/arch/arm/mach-mvebu/
H A Dplatsmp-a9.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Symmetric Multi Processing (SMP) support for Marvell EBU Cortex-A9
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
24 static int mvebu_cortex_a9_boot_secondary(unsigned int cpu, in mvebu_cortex_a9_boot_secondary() argument
29 pr_info("Booting CPU %d\n", cpu); in mvebu_cortex_a9_boot_secondary()
32 * Write the address of secondary startup into the system-wide in mvebu_cortex_a9_boot_secondary()
34 * soft interrupt, and then the secondary CPU branches to this in mvebu_cortex_a9_boot_secondary()
37 hw_cpu = cpu_logical_map(cpu); in mvebu_cortex_a9_boot_secondary()
46 * in the offline state after using CPU hotplug. in mvebu_cortex_a9_boot_secondary()
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