/freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
H A D | sii902x.txt | 4 - compatible: "sil,sii9022" 5 - reg: i2c address of the bridge 8 - interrupts: describe the interrupt line used to inform the host 10 - reset-gpios: OF device-tree gpio specification for RST_N pin. 11 - iovcc-supply: I/O Supply Voltage (1.8V or 3.3V) 12 - cvcc12-supply: Digital Core Supply Voltage (1.2V) 15 - #sound-dai-cells: <0> or <1>. <0> if only i2s or spdif pin 18 - sil,i2s-data-lanes: Array of up to 4 integers with values of 0-3 19 Each integer indicates which i2s pin is connected to which 20 audio fifo. The first integer selects i2s audio pin for the [all …]
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H A D | sil,sii9022.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Boris Brezillon <bbrezillon@kernel.org> 15 - items: 16 - enum: 17 - sil,sii9022-cpi # CEC Programming Interface 18 - sil,sii9022-tpi # Transmitter Programming Interface 19 - const: sil,sii9022 20 - const: sil,sii9022 [all …]
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/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | img,i2s-in.txt | 1 Imagination Technologies I2S Input Controller 5 - compatible : Compatible list, must contain "img,i2s-in" 7 - #sound-dai-cells : Must be equal to 0 9 - reg : Offset and length of the register set for the device 11 - clocks : Contains an entry for each entry in clock-names 13 - clock-names : Must include the following entry: 16 - dmas: Contains an entry for each entry in dma-names. 18 - dma-names: Must include the following entry: 19 "rx" Single DMA channel used by all active I2S channels 21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block [all …]
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H A D | nvidia,tegra210-i2s.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Tegra210 I2S Controller 10 The Inter-IC Sound (I2S) controller implements full-duplex, 11 bi-directional and single direction point-to-point serial 12 interfaces. It can interface with I2S compatible devices. 13 I2S controller can operate both in master and slave mode. 16 - Jon Hunter <jonathanh@nvidia.com> [all …]
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H A D | rockchip,i2s-tdm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip I2S/TDM Controller 10 The Rockchip I2S/TDM Controller is a Time Division Multiplexed 15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com> 18 - $ref: dai-common.yaml# 23 - rockchip,px30-i2s-tdm 24 - rockchip,rk1808-i2s-tdm [all …]
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H A D | cs35l34.txt | 5 - compatible : "cirrus,cs35l34" 7 - reg : the I2C address of the device for I2C. 9 - VA-supply, VP-supply : power supplies for the device, 13 - cirrus,boost-vtge-millivolt : Boost Voltage Value. Configures the boost 17 - cirrus,boost-nanohenry: Inductor value for boost converter. The value is 22 - reset-gpios: GPIO used to reset the amplifier. 24 - interrupts : IRQ line info CS35L34. 25 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt 28 - cirrus,boost-peak-milliamp : Boost converter peak current limit in mA. The 32 - cirrus,i2s-sdinloc : ADSP SDIN I2S channel location. Indicates whether the [all …]
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H A D | mchp,i2s-mcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mchp,i2s-mcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip I2S Multi-Channel Controller 10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> 13 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and 15 multi-channel audio codecs. It consists of a receiver, a transmitter and a 18 On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S 19 multi-channel is supported by using multiple data pins, output and [all …]
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H A D | cirrus,madera.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - patches@opensource.cirrus.com 21 include/dt-bindings/sound/madera.h 26 - $ref: dai-common.yaml# 29 '#sound-dai-cells': 36 A list of input mode settings for each input. A maximum 37 of 24 cells, with four cells per input in the order INnAL, 38 INnAR INnBL INnBR. For non-muxed inputs the first two cells [all …]
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H A D | microchip,sama7g5-i2smcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/microchip,sama7g5-i2smcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip I2S Multi-Channel Controller 10 - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> 13 The I2SMCC complies with the Inter-IC Sound (I2S) bus specification and 15 multi-channel audio codecs. It consists of a receiver, a transmitter and a 18 On later I2SMCC versions (starting with Microchip's SAMA7G5) I2S 19 multi-channel is supported by using multiple data pins, output and [all …]
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H A D | adi,adau7118.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Analog Devices ADAU7118 8 Channel PDM to I2S/TDM Converter 11 - Nuno Sá <nuno.sa@analog.com> 14 Analog Devices ADAU7118 8 Channel PDM to I2S/TDM Converter over I2C or HW 16 https://www.analog.com/media/en/technical-documentation/data-sheets/ADAU7118.pdf 19 - $ref: dai-common.yaml# 24 - adi,adau7118 29 "#sound-dai-cells": [all …]
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H A D | apple,mca.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Apple MCA I2S transceiver 10 MCA is an I2S transceiver peripheral found on M1 and other Apple chips. It is 15 - Martin Povišer <povik+lin@cutebit.org> 18 - $ref: dai-common.yaml# 23 - enum: 24 - apple,t6000-mca 25 - apple,t8103-mca [all …]
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H A D | mediatek,mt8188-mt6359.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-mt635 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | clk-exynos-audss.txt | 9 - compatible: should be one of the following: 10 - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs. 11 - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250 13 - "samsung,exynos5410-audss-clock" - controller compatible with Exynos5410 15 - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420 17 - reg: physical base address and length of the controller's register set. 19 - #clock-cells: should be 1. 21 - clocks: 22 - pll_ref: Fixed rate PLL reference clock, parent of mout_audss. "fin_pll" 24 - pll_in: Input PLL to the AudioSS block, parent of mout_audss. "fout_epll" [all …]
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H A D | axs10x-i2s-pll-clock.txt | 1 Binding for the AXS10X I2S PLL clock 5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 8 - compatible: shall be "snps,axs10x-i2s-pll-clock" 9 - reg : address and length of the I2S PLL register set. 10 - clocks: shall be the input parent clock phandle for the PLL. 11 - #clock-cells: from common clock binding; Should always be set to 0. 15 compatible = "fixed-clock"; 16 clock-frequency = <27000000>; 17 #clock-cells = <0>; 21 compatible = "snps,axs10x-i2s-pll-clock"; [all …]
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H A D | clk-s5pv210-audss.txt | 8 - compatible: should be "samsung,s5pv210-audss-clock". 9 - reg: physical base address and length of the controller's register set. 11 - #clock-cells: should be 1. 13 - clocks: 14 - hclk: AHB bus clock of the Audio Subsystem. 15 - xxti: Optional fixed rate PLL reference clock, parent of mout_audss. If 18 - fout_epll: Input PLL to the AudioSS block, parent of mout_audss. 19 - iiscdclk0: Optional external i2s clock, parent of mout_i2s. If not 21 - sclk_audio0: Audio bus clock, parent of mout_i2s. 23 - clock-names: Aliases for the above clocks. They should be "hclk", [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | pinctrl-mt7622.txt | 4 - compatible: Should be one of the following 5 "mediatek,mt7622-pinctrl" for MT7622 SoC 6 "mediatek,mt7629-pinctrl" for MT7629 SoC 7 - reg: offset and length of the pinctrl space 9 - gpio-controller: Marks the device node as a GPIO controller. 10 - #gpio-cells: Should be two. The first cell is the pin number and the 14 - interrupt-controller : Marks the device node as an interrupt controller 16 If the property interrupt-controller is defined, following property is required 17 - reg-names: A string describing the "reg" entries. Must contain "eint". 18 - interrupts : The interrupt output from the controller. [all …]
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H A D | mediatek,mt7986-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctr [all...] |
/freebsd/sys/contrib/device-tree/src/arc/ |
H A D | axs10x_mb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 14 compatible = "simple-bus"; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 interrupt-parent = <&mb_intc>; 20 creg_rst: reset-controller@11220 { 21 compatible = "snps,axs10x-reset"; 22 #reset-cells = <1>; 27 compatible = "snps,axs10x-i2s-pll-clock"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
H A D | rda,rda5807.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Paul Cercueil <paul@crapouillou.net> 15 - rda,rda5807 21 power-supply: true 24 description: Use LNAN input port. 28 description: Use LNAP input port. 31 rda,analog-out: 35 rda,i2s-out: [all …]
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/freebsd/sys/dev/sound/pci/ |
H A D | envy24.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 29 /* -------------------------------------------------------------------- */ 40 #define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */ 48 #define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */ 60 #define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */ 68 #define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */ 71 #define PCIM_SCFG_ADC 0x0c /* 1-4 stereo ADC connected */ 72 #define PCIM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */ 74 #define PCIR_ACL 0x61 /* AC-Link Configuration Register */ [all …]
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H A D | envy24ht.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 30 /* -------------------------------------------------------------------- */ 37 #define ENVY24HT_PCIR_MT 0x14 /* Multi-Track I/O Base Address */ 45 #define ENVY24HT_CCS_IMASK_PMT 0x10 /* Professional Multi-track */ 65 #define ENVY24HT_CCSM_SCFG_MPU 0x20 /* 0(not implemented)/1(1) MPU-401 UART */ 66 #define ENVY24HT_CCSM_SCFG_ADC 0x0c /* 1-2 stereo ADC connected, S/PDIF receiver connected */ 67 #define ENVY24HT_CCSM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */ 69 #define ENVY24HT_CCS_ACL 0x05 /* AC-Link Configuration Register */ 70 #define ENVY24HT_CCSM_ACL_MTC 0x80 /* Multi-track converter type: 0:AC'97 1:I2S */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
H A D | rk3288-rock2-square.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "rk3288-rock2-som.dtsi" 9 compatible = "radxa,rock2-square", "rockchip,rk3288"; 12 stdout-path = "serial2:115200n8"; 15 adc-keys { 16 compatible = "adc-keys"; 17 io-channels = <&saradc 1>; 18 io-channel-names = "buttons"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
H A D | rk3308.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/rk3308-cru.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-binding [all...] |
H A D | px30-ringneck-haikou.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include "px30-ringneck.dtsi" 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 12 model = "Theobroma Systems PX30-uQ [all...] |
/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | samsung,exynos5433-lpass.txt | 5 - compatible : "samsung,exynos5433-lpass" 6 - reg : should contain the LPASS top SFR region location 8 - clock-names : should contain following required clocks: "sfr0_ctrl" 9 - clocks : should contain clock specifiers of all clocks, which 10 input names have been specified in clock-names 12 - #address-cells : should be 1 13 - #size-cells : should be 1 14 - ranges : must be present 17 an optional sub-node. For "samsung,exynos5433-lpass" compatible this includes: 18 UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices. [all …]
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