| /freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-host1x.yaml | 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
7 title: NVIDIA Tegra host1x controller
13 description: The host1x top-level node defines a number of children, each
14 representing one of the host1x client modules defined in this binding.
20 - nvidia,tegra20-host1x
21 - nvidia,tegra30-host1x
22 - nvidia,tegra114-host1x
23 - nvidia,tegra124-host1x
24 - nvidia,tegra210-host1x
25 - nvidia,tegra186-host1x
[all …]
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| H A D | nvidia,tegra20-host1x.txt | 1 NVIDIA Tegra host1x
4 - compatible: "nvidia,tegra<chip>-host1x"
12 in the host1x address space. Should be 1.
14 range in the host1x address space. Should be 1.
15 - ranges: The mapping of the host1x address space to the CPU address space.
21 - host1x
28 For each opp entry in 'operating-points-v2' table of host1x and its modules:
36 Each host1x client module having to perform DMA through the Memory Controller
40 The host1x top-level node defines a number of children, each representing one
41 of the following host1x client modules:
[all …]
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| H A D | nvidia,tegra114-mipi.txt | 29 host1x@50000000 {
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| /freebsd/sys/contrib/device-tree/Bindings/gpu/host1x/ |
| H A D | nvidia,tegra210-nvdec.yaml | 4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#
11 and newer chips. It is located on the Host1x bus and typically
12 programmed through Host1x channels.
65 nvidia,host1x-class:
67 Host1x class of the engine, used to specify the targeted engine
68 when programming the engine through Host1x channels or when
69 configuring engine-specific behavior in Host1x.
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| H A D | nvidia,tegra210-nvenc.yaml | 4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
11 and newer chips. It is located on the Host1x bus and typically
12 programmed through Host1x channels.
61 nvidia,host1x-class:
63 Host1x class of the engine, used to specify the targeted engine
64 when programming the engine through Host1x channels or when
65 configuring engine-specific behavior in Host1x.
|
| H A D | nvidia,tegra210-nvjpg.yaml | 4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#
11 and newer chips. It is located on the Host1x bus and typically programmed
12 through Host1x channels.
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| H A D | nvidia,tegra234-nvdec.yaml | 4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
11 and newer chips. It is located on the Host1x bus and typically
12 programmed through Host1x channels.
|
| /freebsd/sys/arm/nvidia/drm2/ |
| H A D | tegra_drm_if.m | 36 * Register client to host1x
39 device_t host1x;
44 * Deregister client to host1x
47 device_t host1x;
56 device_t host1x;
65 device_t host1x;
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| H A D | tegra_host1x.c | 62 #define SLEEP(_sc, timeout) sx_sleep(sc, &sc->lock, 0, "host1x", timeout);
63 #define LOCK_INIT(_sc) sx_init(&_sc->lock, "host1x")
69 {"nvidia,tegra124-host1x", 1},
478 rv = hwreset_get_by_ofw_name(sc->dev, 0, "host1x", &sc->reset); in host1x_new_pass()
638 DEFINE_CLASS_1(host1x, host1x_driver, host1x_methods,
640 EARLY_DRIVER_MODULE(host1x, simplebus, host1x_driver, 0, 0, BUS_PASS_BUS);
644 DRIVER_MODULE(fbd, host1x, fbd_driver, 0, 0);
|
| /freebsd/sys/contrib/device-tree/include/dt-bindings/memory/ |
| H A D | tegra186-mc.h | 8 /* host1x clients */
62 /* camera RTCPU on host1x address space */
81 /* host1x virtualization channels */
91 /* host1x command buffers */
|
| H A D | tegra194-mc.h | 8 /* host1x clients */
62 /* camera RTCPU on host1x address space */
85 /* host1x virtualization channels */
95 /* host1x command buffers */
|
| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra124-nyan-big-fhd.dts | 8 host1x@50000000 {
|
| H A D | tegra30-asus-lvds-display.dtsi | 8 host1x@50000000 {
|
| H A D | tegra114.dtsi | 33 host1x@50000000 {
34 compatible = "nvidia,tegra114-host1x";
38 interrupt-names = "syncpt", "host1x";
40 clock-names = "host1x";
42 reset-names = "host1x", "mc";
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| H A D | tegra20-plutux.dts | 10 host1x@50000000 {
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| H A D | tegra20-tec.dts | 10 host1x@50000000 {
|
| H A D | tegra20.dtsi | 35 host1x@50000000 {
36 compatible = "nvidia,tegra20-host1x";
40 interrupt-names = "syncpt", "host1x";
42 clock-names = "host1x";
44 reset-names = "host1x", "mc";
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| H A D | tegra20-medcom-wide.dts | 18 host1x@50000000 {
|
| H A D | tegra124.dtsi | 89 host1x@50000000 {
90 compatible = "nvidia,tegra124-host1x";
94 interrupt-names = "syncpt", "host1x";
96 clock-names = "host1x";
98 reset-names = "host1x", "mc";
|
| H A D | tegra30.dtsi | 118 host1x@50000000 {
119 compatible = "nvidia,tegra30-host1x";
123 interrupt-names = "syncpt", "host1x";
125 clock-names = "host1x";
127 reset-names = "host1x", "mc";
|
| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | nvidia,tegra124-dpaux-padctl.txt | 11 the binding document ../display/tegra/nvidia,tegra20-host1x.txt for more
|
| /freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
| H A D | tegra132.dtsi | 84 host1x@50000000 {
85 compatible = "nvidia,tegra132-host1x",
86 "nvidia,tegra124-host1x";
90 interrupt-names = "syncpt", "host1x";
92 clock-names = "host1x";
94 reset-names = "host1x";
|
| H A D | tegra234-p3740-0002+p3701-0008.dts | 75 host1x@13e00000 {
|
| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | nvidia,tegra20-i2c.txt | 38 nvidia,tegra210-i2c-vi: Tegra210 has one I2C controller that is on host1x bus
|
| H A D | nvidia,tegra20-i2c.yaml | 63 Tegra210 has one I2C controller that is on host1x bus and is part of
|