| /linux/Documentation/devicetree/bindings/x86/ |
| H A D | ce4100.txt | 2 ---------------------------
5 format: <vendor>,<chip>-<device>.
10 The CPU nodes
11 -------------
14 #address-cells = <1>;
15 #size-cells = <0>;
17 cpu@0 {
18 device_type = "cpu";
23 cpu@2 {
24 device_type = "cpu";
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| /linux/arch/mips/loongson2ef/common/ |
| H A D | pci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <linux/pci.h>
8 #include <pci.h>
12 .name = "pci memory space",
19 .name = "pci io space",
36 * local to PCI mapping for CPU accessing PCI space in setup_pcimap()
37 * CPU address space [256M,448M] is window for accessing pci space in setup_pcimap()
38 * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M] in setup_pcimap()
49 * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M] in setup_pcimap()
51 LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */ in setup_pcimap()
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| /linux/drivers/net/ethernet/mellanox/mlxsw/ |
| H A D | pci_hw.h | 1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
74 MLXSW_ITEM32(pci, wqe, c, 0x00, 31, 1);
79 * For Ethernet EMAD (Direct Route and non Direct Route) -
81 * For InfiniBand CTL - must be set if packet destination is local device
86 MLXSW_ITEM32(pci, wqe, lp, 0x00, 30, 1);
91 MLXSW_ITEM32(pci, wqe, type, 0x00, 23, 4);
96 MLXSW_ITEM32(pci, wqe, ipcs, 0x00, 14, 1);
99 * Size of i-th scatter/gather entry, 0 if entry is unused.
101 MLXSW_ITEM16_INDEXED(pci, wqe, byte_count, 0x02, 0, 14, 0x02, 0x00, false);
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| /linux/arch/x86/hyperv/ |
| H A D | irqdomain.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * Irqdomain for Linux to run as the root partition on Microsoft Hypervisor.
11 #include <linux/pci.h>
14 #include <linux/irqchip/irq-msi-lib.h>
18 int cpu, int vector, struct hv_interrupt_entry *entry) in hv_map_interrupt() argument
32 intr_desc = &input->interrupt_descriptor; in hv_map_interrupt()
34 input->partition_id = hv_current_partition_id; in hv_map_interrupt()
35 input->device_id = device_id.as_uint64; in hv_map_interrupt()
36 intr_desc->interrupt_type = HV_X64_INTERRUPT_TYPE_FIXED; in hv_map_interrupt()
37 intr_desc->vector_count = 1; in hv_map_interrupt()
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| /linux/Documentation/driver-api/ |
| H A D | edac.rst | 5 ----------------------------------------
7 There are several things to be aware of that aren't at all obvious, like
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
21 typically 72 bits, in order to provide 64 bits + 8 bits of ECC data.
37 A memory controller channel, responsible to communicate with a group of
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
47 some performance penalty. Also, it is generally not possible to point to
49 is calculated using two DIMMs instead of one. Due to that, it is capable
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
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| /linux/Documentation/PCI/ |
| H A D | pci.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 How To Write Linux PCI Drivers
7 :Authors: - Martin Mares <mj@ucw.cz>
8 - Grant Grundler <grundler@parisc-linux.org>
10 The world of PCI is vast and full of (mostly unpleasant) surprises.
11 Since each CPU architecture implements different chip-sets and PCI devices
12 have different requirements (erm, "features"), the result is the PCI support
14 tries to introduce all potential driver authors to Linux APIs for
15 PCI device drivers.
18 by Jonathan Corbet, Alessandro Rubini, and Greg Kroah-Hartman.
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| /linux/arch/mips/include/asm/mach-loongson2ef/ |
| H A D | pci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
18 * we use address window2 to map cpu address space to pci space
19 * window2: cpu [1G, 2G] -> pci [1G, 2G]
20 * why not use window 0 & 1? because they are used by cpu when booting.
21 * window0: cpu [0, 256M] -> ddr [0, 256M]
22 * window1: cpu [256M, 512M] -> pci [256M, 512M]
30 #define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */
32 #define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \
37 /* this pci memory space is mapped by pcimap in pci.c */
|
| /linux/arch/mips/txx9/rbtx4927/ |
| H A D | setup.c | 7 * Copyright 2001-2002 MontaVista Software Inc.
9 * Copyright (C) 1996, 97, 2001, 04 Ralf Baechle (ralf@linux-mips.org)
20 * Copyright (C) 2000-2001 Toshiba Corporation
31 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
35 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
42 * with this program; if not, write to the Free Software Foundation, Inc.,
57 #include <asm/txx9/pci.h>
64 int extarb = !(__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCIARB); in tx4927_pci_setup()
69 if (__raw_readq(&tx4927_ccfgptr->ccfg) & TX4927_CCFG_PCI66) in tx4927_pci_setup()
74 /* Reset PCI Bus */ in tx4927_pci_setup()
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| /linux/arch/x86/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
4 bool "64-bit kernel" if "$(ARCH)" = "x86"
7 Say yes to build a 64-bit kernel - formerly known as x86_64
8 Say no to build a 32-bit kernel - formerly known as i386
13 # Options that are inherently 32-bit kernel only:
26 # Options that are inherently 64-bit kernel only:
48 in order to test the non static function tracing in the
50 only need to keep it around for x86_64. No need to keep it
56 # ported to 32-bit as well. )
158 # Word-size accesses may read uninitialized data past the trailing \0
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| /linux/drivers/media/common/saa7146/ |
| H A D | saa7146_core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 saa7146.o - driver for generic saa7146-based hardware
5 Copyright (C) 1998-2003 Michael Hunold <michael@mihu.de>
11 #include <media/drv-intf/saa7146.h>
56 /* wait for registers to be programmed */ in saa7146_wait_for_debi_done_sleep()
64 dev->name, __func__); in saa7146_wait_for_debi_done_sleep()
65 return -ETIMEDOUT; in saa7146_wait_for_debi_done_sleep()
70 /* wait for transfer to complete */ in saa7146_wait_for_debi_done_sleep()
79 dev->name, __func__); in saa7146_wait_for_debi_done_sleep()
80 return -ETIMEDOUT; in saa7146_wait_for_debi_done_sleep()
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| /linux/arch/sparc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "64-bit kernel" if "$(ARCH)" = "sparc"
10 Say yes to build a 64-bit kernel - formerly known as sparc64
11 Say no to build a 32-bit kernel - formerly known as sparc
18 select ARCH_MIGHT_HAVE_PC_PARPORT if SPARC64 && PCI
43 select PCI_SYSCALL if PCI
107 select PCI_DOMAINS if PCI
156 bool "Symmetric multi-processing support"
158 This enables support for systems with more than one CPU. If you have
159 a system with only one CPU, say N. If you have a system with more
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| /linux/drivers/perf/ |
| H A D | fujitsu_uncore_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * See Documentation/admin-guide/perf/fujitsu_uncore_pmu.rst for more details.
61 int cpu; member
72 struct uncore_pmu *uncorepmu = to_uncore_pmu(event->pmu); in fujitsu_uncore_counter_start()
73 int idx = event->hw.idx; in fujitsu_uncore_counter_start()
76 local64_set(&event->hw.prev_count, 0); in fujitsu_uncore_counter_start()
77 writeq_relaxed(0, uncorepmu->regs + PM_EVCNTR(idx)); in fujitsu_uncore_counter_start()
80 writeq_relaxed(PM_EVTYPE_EVSEL(event->attr.config), uncorepmu->regs + PM_EVTYPE(idx)); in fujitsu_uncore_counter_start()
83 writeq_relaxed(PM_INTENSET_IDX(idx), uncorepmu->regs + PM_INTENSET); in fujitsu_uncore_counter_start()
86 writeq_relaxed(PM_CNTCTL_RESET, uncorepmu->regs + PM_CNTCTL(idx)); in fujitsu_uncore_counter_start()
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| /linux/Documentation/virt/hyperv/ |
| H A D | vpci.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 PCI pass-thru devices
5 In a Hyper-V guest VM, PCI pass-thru devices (also called
6 virtual PCI devices, or vPCI devices) are physical PCI devices
10 provides higher bandwidth access to the device with lower
12 hypervisor. The device should appear to the guest just as it
14 to the Linux device drivers for the device.
16 Hyper-V terminology for vPCI devices is "Discrete Device
17 Assignment" (DDA). Public documentation for Hyper-V DDA is
20 …tps://learn.microsoft.com/en-us/windows-server/virtualization/hyper-v/plan/plan-for-deploying-devi…
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| /linux/drivers/virt/nitro_enclaves/ |
| H A D | ne_misc_dev.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #include <linux/pci.h>
20 * struct ne_mem_region - Entry in the enclave user space memory regions list.
36 * struct ne_enclave - Per-enclave data used for enclave lifetime management.
39 * @eventq: Wait queue used for out-of-band event notifications
40 * triggered from the PCI device event handler to
42 * @has_event: Variable used to determine if the out-of-band event
51 * total number of CPU cores available on the
53 * @nr_threads_per_core: The number of threads that a full CPU core has.
56 * @slot_uid: Slot unique id mapped to the enclave.
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| /linux/Documentation/virt/ |
| H A D | ne_overview.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 that allows customers to carve out isolated compute environments within EC2
24 carved out of the primary VM. Each enclave is mapped to a process running in the
29 1. An enclave abstraction process - a user space process running in the primary
30 VM guest that uses the provided ioctl interface of the NE driver to spawn an
33 There is a NE emulated PCI device exposed to the primary VM. The driver for this
34 new PCI device is included in the NE driver.
36 The ioctl logic is mapped to PCI device commands e.g. the NE_START_ENCLAVE ioctl
37 maps to an enclave start PCI command. The PCI device commands are then
42 2. The enclave itself - a VM running on the same host as the primary VM that
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| /linux/Documentation/arch/arm/ |
| H A D | ixp4xx.rst | 6 -------------------------------------------------------------------------
12 in industrial control and other areas due to low cost and power
17 integration such as an on-chip I2C controller.
19 For more information on the various versions of the CPU, see:
23 Intel also made the IXCP1100 CPU for sometime which is an IXP4xx
30 - Dual serial ports
31 - PCI interface
32 - Flash access (MTD/JFFS)
33 - I2C through GPIO on IXP42x
34 - GPIO for input/output/interrupts
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| /linux/drivers/edac/ |
| H A D | edac_pci.h | 10 * http://www.anime.net/~goemon/linux-ecc/
15 * Refactored for multi-source files:
18 * Please look at Documentation/driver-api/edac.rst for more info about
29 #include <linux/pci.h>
55 /* pointer to edac polling checking routine:
56 * If NOT NULL: points to polling check routine
62 struct device *dev; /* pointer to device structure */
66 const char *dev_name; /* pci/platform/etc... name */
68 void *pvt_info; /* pointer to 'private driver' info */
74 * cpu/cpu0/...
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| /linux/drivers/pci/endpoint/ |
| H A D | pci-epc-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * PCI Endpoint *Controller* (EPC) library
13 #include <linux/pci-epc.h>
14 #include <linux/pci-epf.h>
15 #include <linux/pci-ep-cfs.h>
29 * pci_epc_put() - release the PCI endpoint controller
39 module_put(epc->ops->owner); in pci_epc_put()
40 put_device(&epc->dev); in pci_epc_put()
45 * pci_epc_get() - get the PCI endpoint controller
48 * Invoke to get struct pci_epc * corresponding to the device name of the
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| /linux/Documentation/networking/device_drivers/ethernet/chelsio/ |
| H A D | cxgb.rst | 1 .. SPDX-License-Identifier: GPL-2.0
35 Adaptive Interrupts (adaptive-rx)
36 ---------------------------------
39 coalescing parameters, allowing the driver to dynamically adapt the latency
40 settings to achieve the highest performance during various types of network
43 The interface used to control this feature is ethtool. Please see the
46 By default, adaptive-rx is disabled.
47 To enable adaptive-rx::
49 ethtool -C <interface> adaptive-rx on
51 To disable adaptive-rx, use ethtool::
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| /linux/Documentation/arch/x86/i386/ |
| H A D | IO-APIC.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 IO-APIC
9 Most (all) Intel-MP compliant SMP boards have the so-called 'IO-APIC',
10 which is an enhanced interrupt controller. It enables us to route
11 hardware interrupts to multiple CPUs, or to CPU groups. Without an
12 IO-APIC, interrupts from hardware will be delivered only to the
13 CPU which boots the operating system (usually CPU#0).
16 multiple IO-APICs. Multiple IO-APICs are used in high-end servers to
20 usually worked around by the kernel. If your MP-compliant SMP board does
21 not boot Linux, then consult the linux-smp mailing list archives first.
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| /linux/drivers/scsi/lpfc/ |
| H A D | lpfc_init.c | 4 * Copyright (C) 2017-2025 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
26 #include <linux/dma-mapping.h>
31 #include <linux/pci.h>
42 #include <linux/cpu.h>
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| /linux/arch/mips/pci/ |
| H A D | pci-rc32434.c | 3 * PCI initialization for IDT EB434 board
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
24 * with this program; if not, write to the Free Software Foundation, Inc.,
29 #include <linux/pci.h>
33 #include <asm/mach-rc32434/rc32434.h>
34 #include <asm/mach-rc32434/pci.h>
39 /* define an unsigned array for the PCI registers */
52 .name = "PCI MEM1",
61 .name = "PCI Mem2",
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| /linux/arch/mips/sgi-ip32/ |
| H A D | ip32-irq.c | 2 * Code to handle IP32 IRQs
4 * This file is subject to the terms and conditions of the GNU General Public
31 #include "ip32-common.h"
33 /* issue a PIO read to make sure no PIO writes are pending */
36 crime->control; in flush_crime_bus()
41 mace->perif.ctrl.misc; in flush_mace_bus()
47 * IP0 -> software (ignored)
48 * IP1 -> software (ignored)
49 * IP2 -> (irq0) C crime 1.1 all interrupts; crime 1.5 ???
50 * IP3 -> (irq1) X unknown
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| /linux/arch/s390/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
55 GCC versions before 16.0.0 generate library calls to ffs()
91 select ARCH_HAS_DMA_OPS if PCI
176 select GENERIC_IOREMAP if PCI
217 select HAVE_IOREMAP_PROT if PCI
252 select IOMMU_HELPER if PCI
253 select IOMMU_SUPPORT if PCI
260 select NEED_DMA_MAP_STATE if PCI
263 select NEED_SG_DMA_LENGTH if PCI
266 select PCI_DOMAINS if PCI
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| /linux/arch/csky/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
41 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
108 select PCI_DOMAINS_GENERIC if PCI
109 select PCI_SYSCALL if PCI
110 select PCI_MSI if PCI
134 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
149 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
184 # VA_BITS - PAGE_SHIFT - 3
191 prompt "CPU MODEL"
195 bool "CSKY CPU ck610"
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