| /freebsd/share/man/man4/ |
| H A D | snd_emu10kx.4 | 78 PCM support is limited to 48kHz/16 bit stereo (192kHz/24 bit part
83 to 48kHz/16 bit stereo (192kHz/24 bit part of this chipset is not supported).
138 you will get one more DSP device that is rate-locked to 48kHz/16bit/mono.
139 This is actually 48kHz/16bit/32 channels on SB Live! cards and
140 48kHz/16bit/64channels on Audigy cards, but the current implementation of
144 Within a multichannel stream, the first half (0-15 or 0-31) is a copy of all DSP
146 On Live! cards the last substream (31) is used as a sync stream and is always
170 PCM streams 0..31
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| /freebsd/sys/dev/ath/ath_hal/ar5312/ |
| H A D | ar5312_misc.c | 92 * If 32KHz clock exists, use it to lower power consumption during sleep
94 * Note: If clock is set to 32 KHz, delays on accessing certain
95 * baseband registers (27-31, 124-127) are required.
115 OS_REG_WRITE(ah, AR_TSF_PARM, 61); /* 32 KHz TSF incr */ in ar5312SetupClock()
120 IS_RAD5112_ANY(ah) ? 39 : 31); in ar5312SetupClock()
139 * If 32KHz clock exists, turn it off and turn back on the 32Mhz
148 IS_RAD5112_ANY(ah) ? 39 : 31); in ar5312RestoreClock()
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | audio | 129 # Oct 31, 1995
303 >22 byte =0 replay 5.485 KHz
304 >22 byte =1 replay 8.084 KHz
305 >22 byte =2 replay 10.971 KHz
306 >22 byte =3 replay 16.168 KHz
307 >22 byte =4 replay 21.942 KHz
308 >22 byte =5 replay 32.336 KHz
309 >22 byte =6 replay 43.885 KHz
310 >22 byte =7 replay 47.261 KHz
388 >23 byte 1 33kHz
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx6q.dtsi | 25 /* kHz uV */
33 /* ARM kHz SOC-PU uV */
62 /* kHz uV */
70 /* ARM kHz SOC-PU uV */
97 /* kHz uV */
105 /* ARM kHz SOC-PU uV */
132 /* kHz uV */
140 /* ARM kHz SOC-PU uV */
321 <&iomuxc 31 44 1>;
340 <&iomuxc 31 86 1>;
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| H A D | imx6dl.dtsi | 24 /* kHz uV */
30 /* ARM kHz SOC-PU uV */
57 /* kHz uV */
63 /* ARM kHz SOC-PU uV */
136 <&iomuxc 30 129 1>, <&iomuxc 31 122 1>;
157 <&iomuxc 23 56 1>, <&iomuxc 24 61 7>, <&iomuxc 31 46 1>;
173 <&iomuxc 27 172 3>, <&iomuxc 30 176 1>, <&iomuxc 31 78 1>;
|
| H A D | imx6q-cm-fx6.dts | 63 gpios = <&gpio2 31 0>;
185 /* kHz uV */
192 /* ARM kHz SOC-PU uV */
207 /* kHz uV */
214 /* ARM kHz SOC-PU uV */
229 /* kHz uV */
236 /* ARM kHz SOC-PU uV */
251 /* kHz uV */
258 /* ARM kHz SOC-PU uV */
|
| H A D | imx6q-prtwd2.dts | 45 scl-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
46 i2c-gpio,delay-us = <20>; /* ~10 kHz */
|
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | stericsson,u8500-clks.yaml | 17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
54 wants, possible values are 0 thru 31.
68 values are 0 thru 31.
82 it wants to control, possible values are 0 thru 31.
92 description: A subnode with zero clock cells for the 32kHz RTC clock.
|
| H A D | ux500.txt | 21 possible values are 0 thru 31.
27 possible values are 0 thru 31.
28 - rtc32k-clock: a subnode with zero clock cells for the 32kHz
|
| H A D | st,stm32mp25-rcc.yaml | 39 - description: CK_SCMI_LSE Low Speed External oscillator (32 KHz)
40 - description: CK_SCMI_LSI Low Speed Internal oscillator (~ 32 KHz)
74 - description: CK_SCMI_FLEXGEN_31 flexgen clock 31
|
| H A D | st,nomadik.txt | 15 i.e. the driver output for the slow 32kHz chrystal, if the
75 31: HCLKRNG
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| H A D | st,stm32-rcc.txt | 46 Where bit_offset is the bit offset within the register (LSB is 0, MSB is 31).
77 3 CLK_LSE (generated from a 32.768 kHz low-speed external
107 31 CLK_PLL_SRC
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | fsl,xcvr.yaml | 54 - description: PLL clock source for 8kHz series
55 - description: PLL clock source for 11kHz series
157 dmas = <&sdma2 30 2 0>, <&sdma2 31 2 0>;
|
| /freebsd/sys/contrib/device-tree/src/mips/ingenic/ |
| H A D | rs90.dts | 71 gpios = <&gpb 31 GPIO_ACTIVE_LOW>;
83 gpios = <&gpc 31 GPIO_ACTIVE_LOW>;
297 /* Use 32kHz oscillator as the parent of the RTC clock */
304 * 750 kHz for the system timer and clocksource, and use RTC as the
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| /freebsd/sys/contrib/xen/arch-x86/ |
| H A D | cpuid.h | 58 * EAX[31:16]: Xen major version.
83 * ECX: guest tsc frequency in kHz
89 * Sub-leaf 2: EAX: host tsc frequency in kHz
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/mxs/ |
| H A D | imx23-sansa.dts | 180 i2c-gpio,delay-us = <2>; /* ~100 kHz */
187 sda-gpios = <&gpio0 31 0>;
189 i2c-gpio,delay-us = <2>; /* ~100 kHz */
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| /freebsd/sys/contrib/device-tree/Bindings/hwmon/ |
| H A D | gmt,g762.yaml | 16 If not defined, internal-clock will be used. (31KHz is the clock of
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | st,stm32-i2c.yaml | 111 the default 100 kHz frequency will be used.
151 interrupts = <31>,
166 interrupts = <31>,
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| /freebsd/sys/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212_misc.c | 657 * Return whether an external 32KHz crystal should be used
675 * If 32KHz clock exists, use it to lower power consumption during sleep
677 * Note: If clock is set to 32 KHz, delays on accessing certain
678 * baseband registers (27-31, 124-127) are required.
693 OS_REG_WRITE(ah, AR_TSF_PARM, 61); /* 32 KHz TSF incr */ in ar5212SetupClock()
701 /* # Set sleep clock rate to 32 KHz. */ in ar5212SetupClock()
730 IS_RAD5112_ANY(ah) || IS_5413(ah) ? 39 : 31); in ar5212SetupClock()
735 * If 32KHz clock exists, turn it off and turn back on the 32Mhz
747 IS_RAD5112_ANY(ah) || IS_5413(ah) ? 39 : 31); in ar5212RestoreClock()
1264 #define AR5413_DFS_RELSTEP 31
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| /freebsd/sys/contrib/device-tree/src/arm/synaptics/ |
| H A D | berlin2q.dtsi | 35 /* kHz uV */
53 /* kHz uV */
71 /* kHz uV */
89 /* kHz uV */
102 <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
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| /freebsd/contrib/ntp/ntpd/ |
| H A D | refclock_chu.c | 36 * Ottawa, Ontario. Transmissions are made continuously on 3330 kHz,
37 * 7850 kHz and 14670 kHz in upper sideband, compatible AM mode. An
44 * kHz and mu-law companding. This is the same standard as used by the
63 * seconds 31 and 39 of each minute. Each character consists of eight
82 * Format B bursts are sent at second 31 of the minute in hex digits
146 * - UTC 31 seconds.
169 * ident identifier (CHU0 3330 kHz, CHU1 7850 kHz, CHU2 14670 kHz)
437 * Note the tuned frequencies are 1 kHz higher than the carrier. CHU
1540 * The radio can be tuned to three channels: 0 (3330 kHz), 1 in chu_newchan()
1541 * (7850 kHz) and 2 (14670 kHz). There are five one-minute in chu_newchan()
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| /freebsd/sys/contrib/device-tree/src/arm/microchip/ |
| H A D | at91sam9x5.dtsi | 103 atmel,external-irqs = <31>;
422 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
446 … AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
937 &pioA 31 GPIO_ACTIVE_HIGH /* scl */
941 i2c-gpio,delay-us = <2>; /* ~100 kHz */
956 i2c-gpio,delay-us = <2>; /* ~100 kHz */
971 i2c-gpio,delay-us = <2>; /* ~100 kHz */
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| H A D | at91-tse850-3.dts | 239 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_GPIO
274 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
283 atmel,vbus-gpio = <&pioC 31 GPIO_ACTIVE_HIGH>;
343 /* 4 */ "", "456KHZ", "VCTRL", "SYNCSEL",
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| /freebsd/sys/arm/allwinner/ |
| H A D | a10_codec.c | 189 #define A10_DACAREN (1U << 31)
197 #define A10_ADCREN (1U << 31)
909 /* 96 KHz / 192 KHz mode only supported for playback */ in a10codec_chan_setspeed()
1121 * exception of 44.1kHz, 22.05kHz, and 11.025kHz. Unfortunately, in a10codec_attach()
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| /freebsd/contrib/ntp/html/drivers/ |
| H A D | driver7.html | 31 …he data. If compiled for the audio codec, it requires a sampling rate of 8 kHz and μ-law compan…
37 <p>The driver processes 8-kHz μ-law companded codec samples using maximum-likelihood techniques …
44 …lock representing ten 4-bit BCD digits. The format B blocks sent in second 31 contain the year and…
54 …>/dev/icom</tt> and, if successful will tune the radio to 3.331 MHz. The 1-kHz offset is useful wi…
58 … with <tt>chuB</tt> is produced for each format B burst received in second 31, while eight message…
|