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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dqoriq-sec5.3-0.dtsi36 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <4>;
38 #address-cells = <1>;
39 #size-cells = <1>;
45 compatible = "fsl,sec-v5.3-job-ring",
46 "fsl,sec-v5.0-job-ring",
47 "fsl,sec-v4.0-job-ring";
53 compatible = "fsl,sec-v5.3-job-ring",
54 "fsl,sec-v5.0-job-ring",
55 "fsl,sec-v4.0-job-ring";
[all …]
/freebsd/sys/dev/qat/include/common/
H A Dadf_gen4_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
25 /* Ring reset */
29 #define ADF_WQM_CSR_RPRESETCTL(bank) (0x6000 + ((bank) << 3))
35 #define ADF_WQM_CSR_RPRESETCTL_MASK (BIT(3) - 1)
36 #define ADF_WQM_CSR_RPRESETCTL(bank) (0x6000 + ((bank) << 3))
43 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
46 ADF_RING_CSR_RING_HEAD + ((ring) << 2))
47 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
50 ADF_RING_CSR_RING_TAIL + ((ring) << 2))
55 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
[all …]
H A Dadf_transport_access_macros.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
33 /* Valid internal ring size values */
51 /* Size to bytes conversion macros for ring and msg size values */
54 #define ADF_SIZE_TO_RING_SIZE_IN_BYTES(SIZE) ((1 << (SIZE - 1)) << 7)
55 #define ADF_RING_SIZE_IN_BYTES_TO_SIZE(SIZE) ((1 << (SIZE - 1)) >> 7)
60 /* Minimum ring bufer size for memory allocation */
70 ((((1 << (RING_SIZE - 1)) << 3) >> ADF_SIZE_TO_POW(MSG_SIZE)) - 1)
79 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
82 (ring << 2))
[all …]
H A Dadf_gen2_hw_data.h1 /* SPDX-License-Identifier: BSD-3-Clause */
32 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
35 ((ring) << 2))
36 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
39 ((ring) << 2))
43 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument
46 ADF_RING_CSR_RING_CONFIG + ((ring) << 2), \
50 read_base(struct resource *csr_base_addr, u32 bank, u32 ring) in read_base() argument
57 ADF_RING_CSR_RING_LBASE + (ring << 2)); in read_base()
60 ADF_RING_CSR_RING_UBASE + (ring << 2)); in read_base()
[all …]
/freebsd/sys/contrib/dev/athk/ath12k/
H A Dhal.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
21 #define HAL_MAX_AVAIL_BLK_RES 3
28 #define HAL_WBM_IDLE_SCATTER_BUF_SIZE (HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX - \
57 /* SW2TCL(x) R0 ring configuration address */
62 #define HAL_TCL1_RING_ID(ab) ((ab)->hw_params->regs->hal_tcl1_ring_id)
64 ((ab)->hw_params->regs->hal_tcl1_ring_misc)
66 ((ab)->hw_params->regs->hal_tcl1_ring_tp_addr_lsb)
68 ((ab)->hw_params->regs->hal_tcl1_ring_tp_addr_msb)
[all …]
H A Dhal_desc.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
56 * Sw_buffer_cookie[19:17] = 3'b000: 20 MHz TX only
57 * Sw_buffer_cookie[19:17] = 3'b001: 40 MHz TX only
58 * Sw_buffer_cookie[19:17] = 3'b010: 80 MHz TX only
59 * Sw_buffer_cookie[19:17] = 3'b011: 160 MHz TX only
60 * Sw_buffer_cookie[19:17] = 3'b101: 240 MHz TX only
61 * Sw_buffer_cookie[19:17] = 3'b100: 320 MHz TX only
68 * Sw_buffer_cookie[19:16] = 4'b0011: pattern 3 only
[all …]
H A Dhw.c1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
42 if (ring_num < 3 || ring_num == 4) in ath12k_dp_srng_is_comp_ring_qcn9274()
119 /* CE0: host->target HTC control and raw streams */
129 /* CE1: target->host HTT + HTC control */
139 /* CE2: target->host WMI */
149 /* CE3: host->target WMI (mac0) */
151 .pipenum = __cpu_to_le32(3),
159 /* CE4: host->target HTT */
[all …]
/freebsd/sys/dev/oce/
H A Doce_util.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
17 * 3. Neither the name of the Emulex Corporation nor the names of its
34 * freebsd-drivers@emulex.com
64 rc = bus_dma_tag_create(bus_get_dma_tag(sc->dev), in oce_dma_alloc()
69 size, 1, size, 0, NULL, NULL, &dma->tag); in oce_dma_alloc()
72 rc = bus_dmamem_alloc(dma->tag, in oce_dma_alloc()
73 &dma->ptr, in oce_dma_alloc()
76 &dma->map); in oce_dma_alloc()
79 dma->paddr = 0; in oce_dma_alloc()
[all …]
/freebsd/share/man/man4/
H A Dnetmap.41 .\" Copyright (c) 2011-2014 Matteo Landi, Luigi Rizzo, Universita` di Pisa
45 .Bl -tag -width XXXX
51 implementing a very fast and modular in-kernel software switch/dataplane;
72 35-40 Mpps on 40 Gbit/s NICs (limited by the hardware);
79 which uses unmodified device drivers and is 3-5 times faster than
98 supports both non-blocking I/O through
138 There is one ring for each transmit/receive queue of a
140 An additional ring pair connects to the host stack.
145 the rings, and possibly implement zero-copy forwarding
186 .Bl -tag -width XXXX
[all …]
/freebsd/sys/contrib/xen/
H A Dargo.h2 * Argo : Hypervisor-Mediated data eXchange
7 * Copyright (c) 2018-2019, BAE Systems
36 /* The maximum size of an Argo ring is defined to be: 16MB (0x1000000 bytes). */
39 /* Fixed-width type for "argo port" number. Nothing to do with evtchns. */
42 /* gfn type: 64-bit fixed-width on all architectures */
81 * Header space reserved for later use. Align the start of the ring to a
85 uint8_t ring[XEN_FLEX_ARRAY_DIM]; member
103 /* Messages on the ring are padded to a multiple of this size. */
109 /* Ring exists */
111 /* Ring is shared, not unicast */
[all …]
/freebsd/sys/contrib/dev/athk/ath11k/
H A Dhal.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
21 #define HAL_MAX_AVAIL_BLK_RES 3
28 #define HAL_WBM_IDLE_SCATTER_BUF_SIZE (HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX - \
35 #define HAL_SHADOW_BASE_ADDR(ab) ab->hw_params.regs->hal_shadow_base_addr
47 (ab->hw_params.regs->hal_seq_wcss_umac_ce0_src_reg)
49 (ab->hw_params.regs->hal_seq_wcss_umac_ce0_dst_reg)
51 (ab->hw_params.regs->hal_seq_wcss_umac_ce1_src_reg)
53 (ab->hw_params.regs->hal_seq_wcss_umac_ce1_dst_reg)
59 /* SW2TCL(x) R0 ring configuration address */
[all …]
H A Dhal_desc.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
54 HAL_PHYRX_ABORT_REQUEST = 3 /* 0x3 */,
522 * fragment MPDU to the REO destination ring without any reorder
530 * Indicates the MPDU was received as part of an A-MPDU.
576 #define RX_MSDU_DESC_INFO0_MSDU_LENGTH GENMASK(16, 3)
616 * field is still valid for MPDU frames without A-MSDU. It still
622 * The id of the reo exit ring where the msdu frame shall push
628 * any other ring.
718 * on from REO entrance ring to the REO destination ring.
[all …]
/freebsd/sys/contrib/xen/io/
H A Dblkif.h4 * Unified block-device I/O interface for Xen guest OSes.
24 * Copyright (c) 2003-2004, Keir Fraser
31 #include "ring.h"
35 * Front->back notifications: When enqueuing a new request, sending a
37 * hold-off mechanism provided by the ring macros). Backends must set
40 * Back->front notifications: When enqueuing a new response, sending a
42 * hold-off mechanism provided by the ring macros). Frontends must set
80 *------------------ Backend Device Identification (PRIVATE) ------------------
95 * physical-device
102 * physical-device-path
[all …]
/freebsd/sys/dev/ral/
H A Drt2661.c2 /*-
20 /*-
70 if (sc->sc_debug > 0) \
74 if (sc->sc_debug >= (n)) \
204 struct ieee80211com *ic = &sc->sc_ic; in rt2661_attach()
208 sc->sc_id = id; in rt2661_attach()
209 sc->sc_dev = dev; in rt2661_attach()
211 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, in rt2661_attach()
214 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); in rt2661_attach()
215 mbufq_init(&sc->sc_snd, ifqmaxlen); in rt2661_attach()
[all …]
H A Drt2860.c1 /*-
2 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
21 /*-
70 #define DPRINTF(x) do { if (sc->sc_debug > 0) printf x; } while (0)
71 #define DPRINTFN(n, x) do { if (sc->sc_debug >= (n)) printf x; } while (0)
238 struct ieee80211com *ic = &sc->sc_ic; in rt2860_attach()
242 sc->sc_dev = dev; in rt2860_attach()
243 sc->sc_debug = 0; in rt2860_attach()
245 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, in rt2860_attach()
248 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0); in rt2860_attach()
[all …]
/freebsd/sys/dev/qat/qat_common/
H A Dadf_freebsd_transport_debug.c1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
20 struct adf_etr_ring_data *ring = arg1; in adf_ring_show() local
21 struct adf_etr_bank_data *bank = ring->bank; in adf_ring_show()
22 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); in adf_ring_show()
23 struct resource *csr = ring->bank->csr_addr; in adf_ring_show()
32 head = csr_ops->read_csr_ring_head(csr, in adf_ring_show()
33 bank->bank_number, in adf_ring_show()
34 ring->ring_number); in adf_ring_show()
35 tail = csr_ops->read_csr_ring_tail(csr, in adf_ring_show()
[all …]
H A Dadf_gen2_hw_data.c1 /* SPDX-License-Identifier: BSD-3-Clause */
13 read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_head() argument
15 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring); in read_csr_ring_head()
21 u32 ring, in write_csr_ring_head() argument
24 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value); in write_csr_ring_head()
28 read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_tail() argument
30 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring); in read_csr_ring_tail()
36 u32 ring, in write_csr_ring_tail() argument
39 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value); in write_csr_ring_tail()
51 u32 ring, in write_csr_ring_config() argument
[all …]
H A Dadf_gen4vf_hw_csr_data.c1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
13 read_csr_ring_head(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_head() argument
15 return READ_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring); in read_csr_ring_head()
21 u32 ring, in write_csr_ring_head() argument
24 WRITE_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring, value); in write_csr_ring_head()
28 read_csr_ring_tail(struct resource *csr_base_addr, u32 bank, u32 ring) in read_csr_ring_tail() argument
30 return READ_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring); in read_csr_ring_tail()
36 u32 ring, in write_csr_ring_tail() argument
39 WRITE_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring, value); in write_csr_ring_tail()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dk3-ringacc.txt1 * Texas Instruments K3 NavigatorSS Ring Accelerator
3 The Ring Accelerator (RA) is a machine which converts read/write accesses
6 controller which needs to access ring elements from having to know the current
7 state of the ring (base address, current offset). The DMA controller
10 with a new address which corresponds to the head or tail element of the ring
13 The Ring Accelerator is a hardware module that is responsible for accelerating
17 - compatible : Must be "ti,am654-navss-ringacc";
18 - reg : Should contain register location and length of the following
20 - reg-names : should be
21 "rt" - The RA Ring Real-time Control/Status Registers
[all …]
/freebsd/sys/dev/hifn/
H A Dhifn7751reg.h3 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
9 * Copyright (c) 2000-2001 Network Security Technologies, Inc.
12 * Please send any comments, feedback, bug-fixes, or feature requests to
24 * 3. The name of the author may not be used to endorse or promote products
41 * Materiel Command, USAF, under agreement number F30602-01-2-0537.
77 * The values below should multiple of 4 -- and be large enough to handle
81 * mac-key + rc4-key
200 #define HIFN_PUSTAT_REV_3 0x0030 /* 7751 PT6/3 */
212 #define HIFN_1_DMA_CRAR 0x0c /* DMA Command Ring Address */
[all …]
/freebsd/contrib/one-true-awk/testdir/
H A Dchem.awk20 RING = "R"; MOL = "M"; BOND = "B"; OTHER = "O" # manifests
30 cr = scale * 0.08 # rad of invis circles at ring vertices
31 crh = scale * 0.16 # ht of invis ellipse at ring vertices
34 dew = scale * 0.02 # east-west shift for left of/right of
48 $1 == "pic" { shiftfields(1); print; next } # pic pass-thru
60 $1 ~ /^[A-Z].*:$/ { # label; falls thru after shifting left
61 lastname = substr($1, 1, length($1)-1)
73 $1 ~ /ring|benz/ { ring($1); next }
77 $1 ~ /^[A-Z]/ { molecule(); next }
81 $1 == "right" { bracket(); stack--; next }
[all …]
/freebsd/sys/contrib/dev/iwlwifi/
H A Diwl-context-info-gen3.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2018, 2020-2024 Intel Corporation
8 #include "iwl-context-info.h"
24 * enum iwl_prph_scratch_mtr_format - tf
[all...]
/freebsd/sys/contrib/dev/rtw88/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
54 return skb->priority; in rtw_pci_get_tx_qsel()
60 struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; in rtw_pci_read8()
63 return readb(rtwpci->mma in rtw_pci_read8()
718 rtw_pci_release_rsvd_page(struct rtw_pci * rtwpci,struct rtw_pci_tx_ring * ring) rtw_pci_release_rsvd_page() argument
765 struct rtw_pci_tx_ring *ring = &rtwpci->tx_rings[pci_q]; __pci_flush_queue() local
825 struct rtw_pci_tx_ring *ring; rtw_pci_tx_kick_off_queue() local
855 struct rtw_pci_tx_ring *ring; rtw_pci_tx_write_data() local
977 struct rtw_pci_tx_ring *ring; rtw_pci_tx_write() local
1000 struct rtw_pci_tx_ring *ring; rtw_pci_tx_isr() local
1081 struct rtw_pci_rx_ring *ring; rtw_pci_get_hw_rx_ring_nr() local
1101 struct rtw_pci_rx_ring *ring = &rtwpci->rx_rings[RTW_RX_QUEUE_MPDU]; rtw_pci_rx_napi() local
[all...]
/freebsd/crypto/heimdal/appl/telnet/telnet/
H A Dring.c13 * 3. All advertising materials mentioning features or use of this software
39 * This defines a structure for a ring buffer.
51 #define ring_subtract(d,a,b) (((a)-(b) >= 0)? \
52 (a)-(b): (((a)-(b))+(d)->size))
54 #define ring_increment(d,a,c) (((a)+(c) < (d)->top)? \
55 (a)+(c) : (((a)+(c))-(d)->size))
57 #define ring_decrement(d,a,c) (((a)-(c) >= (d)->bottom)? \
58 (a)-(c) : (((a)-(c))-(d)->size))
64 * There is some trickiness here. Since the ring buffers are initialized
71 #define ring_empty(d) (((d)->consume == (d)->supply) && \
[all …]
/freebsd/contrib/telnet/telnet/
H A Dring.c13 * 3. Neither the name of the University nor the names of its contributors
32 static const char sccsid[] = "@(#)ring.c 8.2 (Berkeley) 5/30/95";
37 * This defines a structure for a ring buffer.
61 #include "ring.h"
70 #define ring_subtract(d,a,b) (((a)-(b) >= 0)? \
71 (a)-(b): (((a)-(b))+(d)->size))
73 #define ring_increment(d,a,c) (((a)+(c) < (d)->top)? \
74 (a)+(c) : (((a)+(c))-(d)->size))
76 #define ring_decrement(d,a,c) (((a)-(c) >= (d)->bottom)? \
77 (a)-(c) : (((a)-(c))-(d)->size))
[all …]

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