Searched +full:0 +full:xfead0000 (Results 1 – 11 of 11) sorted by relevance
33 - ports: See dw_hdmi.txt. The DWC HDMI shall have one port numbered 048 reg = <0 0xfead0000 0 0x10000>;49 interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;56 #size-cells = <0>;57 port@0 {58 reg = <0>;
48 port@0:61 - port@087 reg = <0xfead0000 0x10000>;88 interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;96 #size-cells = <0>;97 port@0 {98 reg = <0>;
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;31 #clock-cells = <0>;32 clock-frequency = <0>;37 #clock-cells = <0>;38 clock-frequency = <0>;44 #clock-cells = <0>;45 clock-frequency = <0>;48 cluster0_opp: opp-table-0 {[all …]
18 * The external audio clocks are configured as 0 Hz fixed frequency24 #clock-cells = <0>;25 clock-frequency = <0>;30 #clock-cells = <0>;31 clock-frequency = <0>;36 #clock-cells = <0>;37 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;47 cluster0_opp: opp-table-0 {[all …]
23 * The external audio clocks are configured as 0 Hz fixed frequency29 #clock-cells = <0>;30 clock-frequency = <0>;35 #clock-cells = <0>;36 clock-frequency = <0>;41 #clock-cells = <0>;42 clock-frequency = <0>;48 #clock-cells = <0>;49 clock-frequency = <0>;52 cluster0_opp: opp-table-0 {[all …]
56 #size-cells = <0>;91 cpu_l0: cpu@0 {94 reg = <0x0>;115 reg = <0x100>;134 reg = <0x200>;153 reg = <0x300>;172 reg = <0x400>;193 reg = <0x500>;212 reg = <0x600>;233 reg = <0x700>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]