Searched +full:0 +full:xc8000 (Results 1 – 5 of 5) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | marvell,armada-380-neta-bm.yaml | 31 "^pool[0-3],capacity$": 33 size of external buffer pointers' ring maintained in DRAM for pool 0-3 38 "^pool[0-3],pkt-size$": 40 maximum packet size for a short buffer pool entry (pool 0-3) 55 reg = <0xc8000 0xac>;
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| H A D | marvell-neta-bm.txt | 12 - pool<0 : 3>,capacity: size of external buffer pointers' ring maintained 13 in DRAM. Can be set for each pool (id 0 : 3) separately. The value has 17 - pool<0 : 3>,pkt-size: maximum size of a packet accepted by a given buffer 18 pointers' pool (id 0 : 3). It will be taken into consideration only when pool 31 reg = <0xc8000 0xac>; 42 reg = <MBUS_ID(0x0c, 0x04) 0 0x100000>; 43 ranges = <0 MBUS_ID(0x0c, 0x04) 0 0x100000>;
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | armada-38x.dtsi | 42 pcie-mem-aperture = <0xe0000000 0x8000000>; 43 pcie-io-aperture = <0xe8000000 0x100000>; 47 reg = <MBUS_ID(0x01, 0x1d) 0 0x200000>; 52 reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>; 53 ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>; 56 clocks = <&coreclk 0>; 62 reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>; 63 ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>; 66 clocks = <&coreclk 0>; 72 reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | am33xx-l4.dtsi | 1 &l4_wkup { /* 0x44c00000 */ 4 clocks = <&l4_wkup_clkctrl AM3_L4_WKUP_L4_WKUP_CLKCTRL 0>; 6 reg = <0x44c00000 0x800>, 7 <0x44c00800 0x800>, 8 <0x44c01000 0x400>, 9 <0x44c01400 0x40 [all...] |
| H A D | am437x-l4.dtsi | 1 &l4_wkup { /* 0x44c00000 */ 4 clocks = <&l4_wkup_clkctrl AM4_L4_WKUP_L4_WKUP_CLKCTRL 0>; 6 reg = <0x44c00000 0x800>, 7 <0x44c00800 0x800>, 8 <0x44c01000 0x400>, 9 <0x44c01400 0x400>; 13 ranges = <0x00000000 0x44c00000 0x100000>, /* segment 0 */ 14 <0x00100000 0x44d00000 0x100000>, /* segment 1 */ 15 <0x00200000 0x44e00000 0x100000>; /* segment 2 */ 17 segment@0 { /* 0x44c00000 */ [all …]
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