Searched +full:0 +full:x100300 (Results 1 – 7 of 7) sorted by relevance
2 * QorIQ DMA device tree stub [ controller @ offset 0x100000 ]39 reg = <0x100300 0x4>;40 ranges = <0x0 0x100100 0x200>;41 cell-index = <0>;42 dma-channel@0 {44 reg = <0x0 0x80>;45 cell-index = <0>;46 interrupts = <28 2 0 0>;50 reg = <0x80 0x80>;52 interrupts = <29 2 0 0>;[all …]
2 * QorIQ Elo3 DMA device tree stub [ controller @ offset 0x100000 ]39 reg = <0x100300 0x4>,40 <0x100600 0x4>;41 ranges = <0x0 0x100100 0x500>;42 dma-channel@0 {44 reg = <0x0 0x80>;45 interrupts = <28 2 0 0>;49 reg = <0x80 0x80>;50 interrupts = <29 2 0 0>;54 reg = <0x100 0x80>;[all …]
40 "^dma-channel@[0-9a-f]+$":70 reg = <0x100300 0x4>,71 <0x100600 0x4>;74 ranges = <0x0 0x100100 0x500>;76 dma-channel@0 {78 reg = <0x0 0x80>;79 interrupts = <28 IRQ_TYPE_EDGE_FALLING 0 0>;84 reg = <0x80 0x80>;85 interrupts = <29 IRQ_TYPE_EDGE_FALLING 0 0>;90 reg = <0x100 0x80>;[all …]
14 - cell-index : controller index. 0 for controller @ 0x810021 - cell-index : DMA channel index starts at 0.33 reg = <0x82a8 4>;34 ranges = <0 0x8100 0x1a4>;37 cell-index = <0>;38 dma-channel@0 {40 cell-index = <0>;41 reg = <0 0x80>;48 reg = <0x80 0x80>;55 reg = <0x100 0x80>;[all …]
103 #size-cells = <0>;105 cpu0: PowerPC,e500mc@0 {107 reg = <0>;145 dcsr-epu@0 {147 interrupts = <52 2 0 0148 84 2 0 0149 85 2 0 0>;151 reg = <0x0 0x1000>;155 reg = <0x1000 0x1000 0x1000000 0x8000>;159 reg = <0x2000 0x1000>;[all …]
102 #size-cells = <0>;104 cpu0: PowerPC,e500mc@0 {106 reg = <0>;144 dcsr-epu@0 {146 interrupts = <52 2 0 0147 84 2 0 0148 85 2 0 0>;150 reg = <0x0 0x1000>;154 reg = <0x1000 0x1000 0x1000000 0x8000>;158 reg = <0x2000 0x1000>;[all …]
109 #size-cells = <0>;111 cpu0: PowerPC,e5500@0 {113 reg = <0>;135 dcsr-epu@0 {137 interrupts = <52 2 0 0138 84 2 0 0139 85 2 0 0>;141 reg = <0x0 0x1000>;145 reg = <0x1000 0x1000 0x1000000 0x8000>;149 reg = <0x2000 0x1000>;[all …]