Searched +full:0 +full:x02040000 (Results 1 – 4 of 4) sorted by relevance
19 dcr-parent = <&{/cpus/cpu@0}>;29 #size-cells = <0>;31 cpu@0 {34 reg = <0x0>;35 clock-frequency = <0>; /* Filled in by cuboot */36 timebase-frequency = <0>; /* Filled in by cuboot */48 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by55 #clock-cells = <0>;62 #address-cells = <0>;63 #size-cells = <0>;[all …]
28 #define regSDMA0_DEC_START_DEFAULT 0x0000000029 #define regSDMA0_F32_MISC_CNTL_DEFAULT 0x0000000030 #define regSDMA0_GLOBAL_TIMESTAMP_LO_DEFAULT 0x0000000031 #define regSDMA0_GLOBAL_TIMESTAMP_HI_DEFAULT 0x0000000032 #define regSDMA0_POWER_CNTL_DEFAULT 0x0000000033 #define regSDMA0_CNTL_DEFAULT 0x0000244034 #define regSDMA0_CHICKEN_BITS_DEFAULT 0x0107d18635 #define regSDMA0_GB_ADDR_CONFIG_DEFAULT 0x0000054536 #define regSDMA0_GB_ADDR_CONFIG_READ_DEFAULT 0x0000054537 #define regSDMA0_RB_RPTR_FETCH_DEFAULT 0x00000000[all …]
26 #define mmSDMA0_DEC_START_DEFAULT 0x0000000027 #define mmSDMA0_PG_CNTL_DEFAULT 0x0000000028 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x0000000029 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x0000000030 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x0000000031 #define mmSDMA0_POWER_CNTL_DEFAULT 0x4000005032 #define mmSDMA0_CLK_CTRL_DEFAULT 0x0000010033 #define mmSDMA0_CNTL_DEFAULT 0x000000c234 #define mmSDMA0_CHICKEN_BITS_DEFAULT 0x01af010735 #define mmSDMA0_GB_ADDR_CONFIG_DEFAULT 0x00000044[all …]
27 #define mmSDMA0_DEC_START_DEFAULT 0x0000000028 #define mmSDMA0_GLOBAL_TIMESTAMP_LO_DEFAULT 0x0000000029 #define mmSDMA0_GLOBAL_TIMESTAMP_HI_DEFAULT 0x0000000030 #define mmSDMA0_PG_CNTL_DEFAULT 0x0000000031 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x0000000032 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x0000000033 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x0000000034 #define mmSDMA0_POWER_CNTL_DEFAULT 0x4000005035 #define mmSDMA0_CLK_CTRL_DEFAULT 0x0000010036 #define mmSDMA0_CNTL_DEFAULT 0x000000c2[all …]