Searched +full:0 +full:x01c0a000 (Results 1 – 7 of 7) sorted by relevance
45 reg = <0x01c0a000 0x1000>;47 resets = <&tcon_ch0_clk 0>;
56 #size-cells = <0>;58 cpu0: cpu@0 {61 reg = <0x0>;97 #clock-cells = <0>;104 #clock-cells = <0>;119 size = <0x6000000>;120 alloc-ranges = <0x40000000 0x10000000>;135 reg = <0x01c00000 0x30>;140 sram_a: sram@0 {142 reg = <0x00000000 0xc000>;[all …]
24 #clock-cells = <0>;30 #clock-cells = <0>;38 #size-cells = <0>;40 CPU0: cpu@0 {43 reg = <0x0 0x0>;57 reg = <0x0 0x1>;66 reg = <0x0 0x[all...]
30 #clock-cells = <0>;36 #clock-cells = <0>;42 #size-cells = <0>;44 CPU0: cpu@0 {47 reg = <0x0 0x0>;48 clocks = <&cpufreq_hw 0>;53 qcom,freq-domain = <&cpufreq_hw 0>;66 reg = <0x0 0x[all...]
27 #clock-cells = <0>;33 #clock-cells = <0>;39 #size-cells = <0>;41 CPU0: cpu@0 {44 reg = <0x0 0x0>;45 clocks = <&cpufreq_hw 0>;48 qcom,freq-domain = <&cpufreq_hw 0>;70 reg = <0x0 0x10[all...]
29 #clock-cells = <0>;34 #clock-cells = <0>;40 #size-cells = <0>;42 CPU0: cpu@0 {45 reg = <0x0 0x0>;46 clocks = <&cpufreq_hw 0>;51 qcom,freq-domain = <&cpufreq_hw 0>;64 reg = <0x0 0x[all...]
77 #clock-cells = <0>;84 #clock-cells = <0>;91 #size-cells = <0>;93 CPU0: cpu@0 {96 reg = <0x0 0x0>;97 clocks = <&cpufreq_hw 0>;101 qcom,freq-domain = <&cpufreq_hw 0>;125 reg = <0x0 0x10[all...]