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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 cluster0_opp_table: opp-table-cluster0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-1008000000 {
9 opp-hz = /bits/ 64 <1008000000>;
10 opp-microvolt = <675000 675000 950000>;
11 clock-latency-ns = <40000>;
13 opp-1200000000 {
14 opp-hz = /bits/ 64 <1200000000>;
[all …]
H A Drk3588j.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "rk3588-extra.dtsi"
10 cluster0_opp_table: opp-table-cluster0 {
11 compatible = "operating-points-v2";
12 opp-shared;
14 opp-1200000000 {
15 opp-hz = /bits/ 64 <1200000000>;
16 opp-microvolt = <750000 750000 950000>;
17 clock-latency-ns = <40000>;
18 opp-suspend;
[all …]
H A Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk356x-base.dtsi"
11 cpu0_opp_table: opp-table-0 {
12 compatible = "operating-points-v2";
13 opp-shared;
15 opp-408000000 {
16 opp-hz = /bits/ 64 <408000000>;
17 opp-microvolt = <850000 850000 1150000>;
18 clock-latency-ns = <40000>;
21 opp-600000000 {
[all …]
H A Drk3399-t.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
7 #include "rk3399-base.dtsi"
10 cluster0_opp: opp-table-0 {
11 compatible = "operating-points-v2";
12 opp-shared;
15 opp-hz = /bits/ 64 <408000000>;
16 opp-microvolt = <875000 875000 1250000>;
17 clock-latency-ns = <40000>;
20 opp-hz = /bits/ 64 <600000000>;
[all …]
H A Drk3399.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
6 #include "rk3399-base.dtsi"
9 cluster0_opp: opp-table-0 {
10 compatible = "operating-points-v2";
11 opp-shared;
14 opp-hz = /bits/ 64 <408000000>;
15 opp-microvolt = <825000 825000 1250000>;
16 clock-latency-ns = <40000>;
19 opp-hz = /bits/ 64 <600000000>;
[all …]
H A Drk3399-op1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
6 #include "rk3399-base.dtsi"
9 cluster0_opp: opp-table-0 {
10 compatible = "operating-points-v2";
11 opp-shared;
14 opp-hz = /bits/ 64 <408000000>;
15 opp-microvolt = <800000 800000 1150000>;
16 clock-latency-ns = <40000>;
19 opp-hz = /bits/ 64 <600000000>;
[all …]
H A Drk3576.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rk3576-power.h>
12 #include <dt-bindings/reset/rockchip,rk3576-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Drk3562.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3562-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/rockchip,rk3562-power.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/reset/rockchip,rk3562-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
/linux/drivers/thermal/ti-soc-thermal/
H A Domap3-thermal-data.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Texas Instruments Inc.
21 #include "ti-thermal.h"
22 #include "ti-bandgap.h"
50 -40000, -40000, -40000, -40000, -40000, -39000, -38000, -36000,
51 -34000, -32000, -31000, -29000, -28000, -26000, -25000, -24000,
52 -22000, -21000, -19000, -18000, -17000, -15000, -14000, -12000,
53 -11000, -9000, -8000, -7000, -5000, -4000, -2000, -1000, 0000,
118 -40000, -40000, -40000, -40000, -40000, -40000, -40000, -40000,
119 -40000, -40000, -40000, -40000, -40000, -38000, -35000, -34000,
[all …]
H A Domap4-thermal-data.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Texas Instruments Inc.
10 #include "ti-thermal.h"
11 #include "ti-bandgap.h"
12 #include "omap4xxx-bandgap.h"
44 omap4430_adc_to_temp[OMAP4430_ADC_END_VALUE - OMAP4430_ADC_START_VALUE + 1] = {
45 -40000, -38000, -35000, -34000, -32000, -30000, -28000, -26000, -24000,
46 -22000, -20000, -18500, -17000, -15000, -13500, -12000, -10000, -8000,
47 -6500, -5000, -3500, -1500, 0, 2000, 3500, 5000, 6500, 8500, 10000,
49 30000, 32000, 33500, 35000, 37000, 38500, 40000, 42000, 43500, 45000,
[all …]
H A Domap5-thermal-data.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Texas Instruments Inc.
10 #include "ti-thermal.h"
11 #include "ti-bandgap.h"
12 #include "omap5xxx-bandgap.h"
20 * OMAP5430 MPU thermal sensor register offset and bit-fields
56 * OMAP5430 GPU thermal sensor register offset and bit-fields
93 * OMAP5430 CORE thermal sensor register offset and bit-fields
165 OMAP5430_ADC_END_VALUE - OMAP5430_ADC_START_VALUE + 1] = {
166 /* Index 540 - 549 */
[all …]
H A Ddra752-thermal-data.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Tero Kristo <t-kristo@ti.com>
13 #include "ti-thermal.h"
14 #include "ti-bandgap.h"
15 #include "dra752-bandgap.h"
24 * DRA752 CORE thermal sensor register offsets and bit-fields
49 * DRA752 IVA thermal sensor register offsets and bit-fields
74 * DRA752 MPU thermal sensor register offsets and bit-fields
99 * DRA752 DSPEVE thermal sensor register offsets and bit-fields
124 * DRA752 GPU thermal sensor register offsets and bit-fields
[all …]
/linux/tools/testing/selftests/net/
H A Dip_local_port_range.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
6 * Tests assume that net.ipv4.ip_local_port_range is [40000, 49999].
42 return -1; in get_so_domain()
71 return -1; in bind_to_loopback_any_port()
91 return -1; in get_sock_port()
100 return -1; in get_sock_port()
113 return -1; in get_ip_local_port_range()
190 fd = socket(variant->so_domain, variant->so_type, variant->so_protocol); in TEST_F()
194 val16 = 40000; in TEST_F()
229 * the netns range. That is [40000, 40000] or [49999, in TEST_F()
[all …]
/linux/drivers/regulator/
H A Dhi6421-regulator.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (c) <2011-2014> HiSilicon Technologies Co., Ltd.
7 // Copyright (c) <2013-2014> Linaro Ltd.
22 #include <linux/mfd/hi6421-pmic.h>
25 * struct hi6421_regulator_pdata - Hi6421 regulator data of platform device
33 * struct hi6421_regulator_info - hi6421 regulator information
118 * _id - LDO id name string
119 * _match - of match name string
120 * v_table - voltage table
121 * vreg - voltage select register
[all …]
H A Dhi6421v530-regulator.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/mfd/hi6421-pmic.h>
21 * struct hi6421v530_regulator_info - hi6421v530 regulator information
61 * _id - LDO id name string
62 * v_table - voltage table
63 * vreg - voltage select register
64 * vmask - voltage select mask
65 * ereg - enable register
66 * emask - enable mask
67 * odelay - off/on delay time in uS
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_ethtool.h1 /* SPDX-License-Identifier: GPL-2.0-only */
101 [30] = ICE_PHY_TYPE(40GB, 40000baseCR4_Full),
102 [31] = ICE_PHY_TYPE(40GB, 40000baseSR4_Full),
103 [32] = ICE_PHY_TYPE(40GB, 40000baseLR4_Full),
104 [33] = ICE_PHY_TYPE(40GB, 40000baseKR4_Full),
105 [34] = ICE_PHY_TYPE(40GB, 40000baseSR4_Full),
106 [35] = ICE_PHY_TYPE(40GB, 40000baseCR4_Full),
/linux/drivers/phy/
H A Dphy-core-mipi-dphy.c1 /* SPDX-License-Identifier: GPL-2.0 */
13 #include <linux/phy/phy-mipi-dphy.h>
16 * Minimum D-PHY timings based on MIPI D-PHY specification. Derived
18 * of the D-PHY specification (v1.2).
29 return -EINVAL; in phy_mipi_dphy_calc_config()
39 cfg->clk_miss = 0; in phy_mipi_dphy_calc_config()
40 cfg->clk_post = 60000 + 52 * ui; in phy_mipi_dphy_calc_config()
41 cfg->clk_pre = 8; in phy_mipi_dphy_calc_config()
42 cfg->clk_prepare = 38000; in phy_mipi_dphy_calc_config()
43 cfg->clk_settle = 95000; in phy_mipi_dphy_calc_config()
[all …]
/linux/drivers/hwmon/
H A Dmc33xs2410_hwmon.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2025 Liebherr-Electronics and Drives GmbH
21 #define MC33XS2410_OUT_STA(chan) (0x02 + (chan) - 1)
28 #define MC33XS2410_TS_TEMP(chan) (0x2f + (chan) - 1)
78 *val = FIELD_GET(MC33XS2410_TS_TEMP_MASK, reg_val) * 250 - 40000; in mc33xs2410_hwmon_read()
94 *val = FIELD_GET(MC33XS2410_TEMP_WT_MASK, reg_val) * 1000 - 40000; in mc33xs2410_hwmon_read()
97 return -EOPNOTSUPP; in mc33xs2410_hwmon_read()
109 val = clamp_val(val, -40000, 215000); in mc33xs2410_hwmon_write()
116 return -EOPNOTSUPP; in mc33xs2410_hwmon_write()
152 struct device *dev = &adev->dev; in mc33xs2410_hwmon_probe()
[all …]
/linux/tools/testing/selftests/bpf/progs/
H A Dverifier_gotol.c1 // SPDX-License-Identifier: GPL-2.0
34 __success __failure_unpriv __retval(40000) in gotol_small_imm()
41 .rept 40000; \ in gotol_large_imm()
/linux/Documentation/devicetree/bindings/hwmon/
H A Daspeed,g6-pwm-tach.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/hwmon/aspeed,g6-pwm-tach.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Billy Tsai <billy_tsai@aspeedtech.com>
22 - aspeed,ast2600-pwm-tach
33 "#pwm-cells":
37 "^fan-[0-9]+$":
38 $ref: fan-common.yaml#
41 - tach-ch
[all …]
/linux/arch/powerpc/boot/dts/
H A Dtaishan.dts13 /dts-v1/;
16 #address-cells = <2>;
17 #size-cells = <1>;
20 dcr-parent = <&{/cpus/cpu@0}>;
30 #address-cells = <1>;
31 #size-cells = <0>;
37 clock-frequency = <800000000>; // 800MHz
38 timebase-frequency = <0>; // Filled in by zImage
39 i-cache-line-size = <50>;
40 d-cache-line-size = <50>;
[all …]
/linux/drivers/iio/adc/
H A Dqcom-vadc-common.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/fixp-arith.h>
6 #include <linux/iio/adc/qcom-vadc-common.h>
14 * struct vadc_map_pt - Map the graph representation for ADC channel
26 {1758, -40000 },
27 {1742, -35000 },
28 {1719, -30000 },
29 {1691, -25000 },
30 {1654, -20000 },
31 {1608, -15000 },
[all …]
/linux/tools/testing/selftests/net/packetdrill/
H A Dtcp_slow_start_slow-start-fq-ack-per-2pkt.pkt1 // SPDX-License-Identifier: GPL-2.0
2 // Test of slow start when not application-limited, so that
11 sysctl -q net/ipv4/tcp_pacing_ss_ratio=200
12 sysctl -e -q net.ipv4.tcp_min_tso_segs=2`
25 +0 write(4, ..., 40000) = 40000
/linux/Documentation/devicetree/bindings/power/supply/
H A Dbq256xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Andrew Davis <afd@ti.com>
14 The bq256xx devices are a family of highly-integrated battery charge
15 management and system power management ICs for single cell Li-ion and Li-
19 - https://www.ti.com/lit/ds/symlink/bq25600.pdf
20 - https://www.ti.com/lit/ds/symlink/bq25601.pdf
21 - https://www.ti.com/lit/ds/symlink/bq25600d.pdf
22 - https://www.ti.com/lit/ds/symlink/bq25601d.pdf
[all …]
/linux/drivers/iio/pressure/
H A Dabp060mg.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 - Marcin Malagowski <mrc@bourne.st>
18 #define ABP060MG_NUM_COUNTS (ABP060MG_MAX_COUNTS - ABP060MG_MIN_COUNTS)
44 [ABP040KG] = { .min = 0, .max = 40000 },
52 [ABP006KD] = { .min = -6000, .max = 6000 },
53 [ABP010KD] = { .min = -10000, .max = 10000 },
54 [ABP016KD] = { .min = -16000, .max = 16000 },
55 [ABP025KD] = { .min = -25000, .max = 25000 },
56 [ABP040KD] = { .min = -40000, .max = 40000 },
57 [ABP060KD] = { .min = -60000, .max = 60000 },
[all …]

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