1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2013 Rui Paulo <rpaulo@FreeBSD.org>
5 * Copyright (c) 2017 Manuel Stuehn
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
21 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29 #include <sys/cdefs.h>
30 #include <sys/poll.h>
31 #include <sys/time.h>
32 #include <sys/uio.h>
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/fcntl.h>
36 #include <sys/bus.h>
37 #include <sys/conf.h>
38 #include <sys/kernel.h>
39 #include <sys/lock.h>
40 #include <sys/module.h>
41 #include <sys/malloc.h>
42 #include <sys/mutex.h>
43 #include <sys/rman.h>
44 #include <sys/types.h>
45 #include <sys/sysctl.h>
46 #include <sys/event.h>
47 #include <sys/selinfo.h>
48 #include <machine/bus.h>
49 #include <machine/cpu.h>
50 #include <machine/frame.h>
51 #include <machine/intr.h>
52 #include <machine/atomic.h>
53
54 #include <dev/ofw/openfirm.h>
55 #include <dev/ofw/ofw_bus.h>
56 #include <dev/ofw/ofw_bus_subr.h>
57
58 #include <dev/clk/clk.h>
59
60 #include <arm/ti/ti_sysc.h>
61 #include <arm/ti/ti_pruss.h>
62 #include <arm/ti/ti_prm.h>
63
64 #ifdef DEBUG
65 #define DPRINTF(fmt, ...) do { \
66 printf("%s: ", __func__); \
67 printf(fmt, __VA_ARGS__); \
68 } while (0)
69 #else
70 #define DPRINTF(fmt, ...)
71 #endif
72
73 static d_open_t ti_pruss_irq_open;
74 static d_read_t ti_pruss_irq_read;
75 static d_poll_t ti_pruss_irq_poll;
76
77 static device_probe_t ti_pruss_probe;
78 static device_attach_t ti_pruss_attach;
79 static device_detach_t ti_pruss_detach;
80 static void ti_pruss_intr(void *);
81 static d_open_t ti_pruss_open;
82 static d_mmap_t ti_pruss_mmap;
83 static void ti_pruss_irq_kqread_detach(struct knote *);
84 static int ti_pruss_irq_kqevent(struct knote *, long);
85 static d_kqfilter_t ti_pruss_irq_kqfilter;
86 static void ti_pruss_privdtor(void *data);
87
88 #define TI_PRUSS_PRU_IRQS 2
89 #define TI_PRUSS_HOST_IRQS 8
90 #define TI_PRUSS_IRQS (TI_PRUSS_HOST_IRQS+TI_PRUSS_PRU_IRQS)
91 #define TI_PRUSS_EVENTS 64
92 #define NOT_SET_STR "NONE"
93 #define TI_TS_ARRAY 16
94
95 struct ctl
96 {
97 size_t cnt;
98 size_t idx;
99 };
100
101 struct ts_ring_buf
102 {
103 struct ctl ctl;
104 uint64_t ts[TI_TS_ARRAY];
105 };
106
107 struct ti_pruss_irqsc
108 {
109 struct mtx sc_mtx;
110 struct cdev *sc_pdev;
111 struct selinfo sc_selinfo;
112 int8_t channel;
113 int8_t last;
114 int8_t event;
115 bool enable;
116 struct ts_ring_buf tstamps;
117 };
118
119 static struct cdevsw ti_pruss_cdevirq = {
120 .d_version = D_VERSION,
121 .d_name = "ti_pruss_irq",
122 .d_open = ti_pruss_irq_open,
123 .d_read = ti_pruss_irq_read,
124 .d_poll = ti_pruss_irq_poll,
125 .d_kqfilter = ti_pruss_irq_kqfilter,
126 };
127
128 struct ti_pruss_softc {
129 struct mtx sc_mtx;
130 struct resource *sc_mem_res;
131 struct resource *sc_irq_res[TI_PRUSS_HOST_IRQS];
132 void *sc_intr[TI_PRUSS_HOST_IRQS];
133 struct ti_pruss_irqsc sc_irq_devs[TI_PRUSS_IRQS];
134 bus_space_tag_t sc_bt;
135 bus_space_handle_t sc_bh;
136 struct cdev *sc_pdev;
137 struct selinfo sc_selinfo;
138 bool sc_glob_irqen;
139 };
140
141 static struct cdevsw ti_pruss_cdevsw = {
142 .d_version = D_VERSION,
143 .d_name = "ti_pruss",
144 .d_open = ti_pruss_open,
145 .d_mmap = ti_pruss_mmap,
146 };
147
148 static device_method_t ti_pruss_methods[] = {
149 DEVMETHOD(device_probe, ti_pruss_probe),
150 DEVMETHOD(device_attach, ti_pruss_attach),
151 DEVMETHOD(device_detach, ti_pruss_detach),
152
153 DEVMETHOD_END
154 };
155
156 static driver_t ti_pruss_driver = {
157 "ti_pruss",
158 ti_pruss_methods,
159 sizeof(struct ti_pruss_softc)
160 };
161
162 DRIVER_MODULE(ti_pruss, simplebus, ti_pruss_driver, 0, 0);
163 MODULE_DEPEND(ti_pruss, ti_sysc, 1, 1, 1);
164 MODULE_DEPEND(ti_pruss, ti_prm, 1, 1, 1);
165
166 static struct resource_spec ti_pruss_irq_spec[] = {
167 { SYS_RES_IRQ, 0, RF_ACTIVE },
168 { SYS_RES_IRQ, 1, RF_ACTIVE },
169 { SYS_RES_IRQ, 2, RF_ACTIVE },
170 { SYS_RES_IRQ, 3, RF_ACTIVE },
171 { SYS_RES_IRQ, 4, RF_ACTIVE },
172 { SYS_RES_IRQ, 5, RF_ACTIVE },
173 { SYS_RES_IRQ, 6, RF_ACTIVE },
174 { SYS_RES_IRQ, 7, RF_ACTIVE },
175 { -1, 0, 0 }
176 };
177 CTASSERT(TI_PRUSS_HOST_IRQS == nitems(ti_pruss_irq_spec) - 1);
178
179 static int
ti_pruss_irq_open(struct cdev * dev,int oflags,int devtype,struct thread * td)180 ti_pruss_irq_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
181 {
182 struct ctl* irqs;
183 struct ti_pruss_irqsc *sc;
184 sc = dev->si_drv1;
185
186 irqs = malloc(sizeof(struct ctl), M_DEVBUF, M_WAITOK);
187 irqs->cnt = sc->tstamps.ctl.cnt;
188 irqs->idx = sc->tstamps.ctl.idx;
189
190 return devfs_set_cdevpriv(irqs, ti_pruss_privdtor);
191 }
192
193 static void
ti_pruss_privdtor(void * data)194 ti_pruss_privdtor(void *data)
195 {
196 free(data, M_DEVBUF);
197 }
198
199 static int
ti_pruss_irq_poll(struct cdev * dev,int events,struct thread * td)200 ti_pruss_irq_poll(struct cdev *dev, int events, struct thread *td)
201 {
202 struct ctl* irqs;
203 struct ti_pruss_irqsc *sc;
204 sc = dev->si_drv1;
205
206 devfs_get_cdevpriv((void**)&irqs);
207
208 if (events & (POLLIN | POLLRDNORM)) {
209 if (sc->tstamps.ctl.cnt != irqs->cnt)
210 return events & (POLLIN | POLLRDNORM);
211 else
212 selrecord(td, &sc->sc_selinfo);
213 }
214 return 0;
215 }
216
217 static int
ti_pruss_irq_read(struct cdev * cdev,struct uio * uio,int ioflag)218 ti_pruss_irq_read(struct cdev *cdev, struct uio *uio, int ioflag)
219 {
220 const size_t ts_len = sizeof(uint64_t);
221 struct ti_pruss_irqsc* irq;
222 struct ctl* priv;
223 int error = 0;
224 size_t idx;
225 ssize_t level;
226
227 irq = cdev->si_drv1;
228
229 if (uio->uio_resid < ts_len)
230 return (EINVAL);
231
232 error = devfs_get_cdevpriv((void**)&priv);
233 if (error)
234 return (error);
235
236 mtx_lock(&irq->sc_mtx);
237
238 if (irq->tstamps.ctl.cnt - priv->cnt > TI_TS_ARRAY)
239 {
240 priv->cnt = irq->tstamps.ctl.cnt;
241 priv->idx = irq->tstamps.ctl.idx;
242 mtx_unlock(&irq->sc_mtx);
243 return (ENXIO);
244 }
245
246 do {
247 idx = priv->idx;
248 level = irq->tstamps.ctl.idx - idx;
249 if (level < 0)
250 level += TI_TS_ARRAY;
251
252 if (level == 0) {
253 if (ioflag & O_NONBLOCK) {
254 mtx_unlock(&irq->sc_mtx);
255 return (EWOULDBLOCK);
256 }
257
258 error = msleep(irq, &irq->sc_mtx, PCATCH | PDROP,
259 "pruirq", 0);
260 if (error)
261 return error;
262
263 mtx_lock(&irq->sc_mtx);
264 }
265 }while(level == 0);
266
267 mtx_unlock(&irq->sc_mtx);
268
269 error = uiomove(&irq->tstamps.ts[idx], ts_len, uio);
270
271 if (++idx == TI_TS_ARRAY)
272 idx = 0;
273 priv->idx = idx;
274
275 atomic_add_32(&priv->cnt, 1);
276
277 return (error);
278 }
279
280 static struct ti_pruss_irq_arg {
281 int irq;
282 struct ti_pruss_softc *sc;
283 } ti_pruss_irq_args[TI_PRUSS_IRQS];
284
285 static __inline uint32_t
ti_pruss_reg_read(struct ti_pruss_softc * sc,uint32_t reg)286 ti_pruss_reg_read(struct ti_pruss_softc *sc, uint32_t reg)
287 {
288 return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg));
289 }
290
291 static __inline void
ti_pruss_reg_write(struct ti_pruss_softc * sc,uint32_t reg,uint32_t val)292 ti_pruss_reg_write(struct ti_pruss_softc *sc, uint32_t reg, uint32_t val)
293 {
294 bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
295 }
296
297 static __inline void
ti_pruss_interrupts_clear(struct ti_pruss_softc * sc)298 ti_pruss_interrupts_clear(struct ti_pruss_softc *sc)
299 {
300 /* disable global interrupt */
301 ti_pruss_reg_write(sc, PRUSS_INTC_GER, 0 );
302
303 /* clear all events */
304 ti_pruss_reg_write(sc, PRUSS_INTC_SECR0, 0xFFFFFFFF);
305 ti_pruss_reg_write(sc, PRUSS_INTC_SECR1, 0xFFFFFFFF);
306
307 /* disable all host interrupts */
308 ti_pruss_reg_write(sc, PRUSS_INTC_HIER, 0);
309 }
310
311 static __inline int
ti_pruss_interrupts_enable(struct ti_pruss_softc * sc,int8_t irq,bool enable)312 ti_pruss_interrupts_enable(struct ti_pruss_softc *sc, int8_t irq, bool enable)
313 {
314 if (enable && ((sc->sc_irq_devs[irq].channel == -1) ||
315 (sc->sc_irq_devs[irq].event== -1)))
316 {
317 device_printf( sc->sc_pdev->si_drv1,
318 "Interrupt chain not fully configured, not possible to enable\n" );
319 return (EINVAL);
320 }
321
322 sc->sc_irq_devs[irq].enable = enable;
323
324 if (sc->sc_irq_devs[irq].sc_pdev) {
325 destroy_dev(sc->sc_irq_devs[irq].sc_pdev);
326 sc->sc_irq_devs[irq].sc_pdev = NULL;
327 }
328
329 if (enable) {
330 sc->sc_irq_devs[irq].sc_pdev = make_dev(&ti_pruss_cdevirq, 0, UID_ROOT, GID_WHEEL,
331 0600, "pruss%d.irq%d", device_get_unit(sc->sc_pdev->si_drv1), irq);
332 sc->sc_irq_devs[irq].sc_pdev->si_drv1 = &sc->sc_irq_devs[irq];
333
334 sc->sc_irq_devs[irq].tstamps.ctl.idx = 0;
335 }
336
337 uint32_t reg = enable ? PRUSS_INTC_HIEISR : PRUSS_INTC_HIDISR;
338 ti_pruss_reg_write(sc, reg, sc->sc_irq_devs[irq].channel);
339
340 reg = enable ? PRUSS_INTC_EISR : PRUSS_INTC_EICR;
341 ti_pruss_reg_write(sc, reg, sc->sc_irq_devs[irq].event );
342
343 return (0);
344 }
345
346 static __inline void
ti_pruss_map_write(struct ti_pruss_softc * sc,uint32_t basereg,uint8_t index,uint8_t content)347 ti_pruss_map_write(struct ti_pruss_softc *sc, uint32_t basereg, uint8_t index, uint8_t content)
348 {
349 const size_t regadr = basereg + index & ~0x03;
350 const size_t bitpos = (index & 0x03) * 8;
351 uint32_t rmw = ti_pruss_reg_read(sc, regadr);
352 rmw = (rmw & ~( 0xF << bitpos)) | ( (content & 0xF) << bitpos);
353 ti_pruss_reg_write(sc, regadr, rmw);
354 }
355
356 static int
ti_pruss_event_map(SYSCTL_HANDLER_ARGS)357 ti_pruss_event_map( SYSCTL_HANDLER_ARGS )
358 {
359 struct ti_pruss_softc *sc;
360 const int8_t irq = arg2;
361 int err;
362 char event[sizeof(NOT_SET_STR)];
363
364 sc = arg1;
365
366 if(sc->sc_irq_devs[irq].event == -1)
367 bcopy(NOT_SET_STR, event, sizeof(event));
368 else
369 snprintf(event, sizeof(event), "%d", sc->sc_irq_devs[irq].event);
370
371 err = sysctl_handle_string(oidp, event, sizeof(event), req);
372 if(err != 0)
373 return (err);
374
375 if (req->newptr) { // write event
376 if (strcmp(NOT_SET_STR, event) == 0) {
377 ti_pruss_interrupts_enable(sc, irq, false);
378 sc->sc_irq_devs[irq].event = -1;
379 } else {
380 if (sc->sc_irq_devs[irq].channel == -1) {
381 device_printf( sc->sc_pdev->si_drv1,
382 "corresponding channel not configured\n");
383 return (ENXIO);
384 }
385
386 const int8_t channelnr = sc->sc_irq_devs[irq].channel;
387 const int8_t eventnr = strtol( event, NULL, 10 ); // TODO: check if strol is valid
388 if (eventnr > TI_PRUSS_EVENTS || eventnr < 0) {
389 device_printf( sc->sc_pdev->si_drv1,
390 "Event number %d not valid (0 - %d)",
391 channelnr, TI_PRUSS_EVENTS -1);
392 return (EINVAL);
393 }
394
395 sc->sc_irq_devs[irq].channel = channelnr;
396 sc->sc_irq_devs[irq].event = eventnr;
397
398 // event[nr] <= channel
399 ti_pruss_map_write(sc, PRUSS_INTC_CMR_BASE,
400 eventnr, channelnr);
401 }
402 }
403 return (err);
404 }
405
406 static int
ti_pruss_channel_map(SYSCTL_HANDLER_ARGS)407 ti_pruss_channel_map(SYSCTL_HANDLER_ARGS)
408 {
409 struct ti_pruss_softc *sc;
410 int err;
411 char channel[sizeof(NOT_SET_STR)];
412 const int8_t irq = arg2;
413
414 sc = arg1;
415
416 if (sc->sc_irq_devs[irq].channel == -1)
417 bcopy(NOT_SET_STR, channel, sizeof(channel));
418 else
419 snprintf(channel, sizeof(channel), "%d", sc->sc_irq_devs[irq].channel);
420
421 err = sysctl_handle_string(oidp, channel, sizeof(channel), req);
422 if (err != 0)
423 return (err);
424
425 if (req->newptr) { // write event
426 if (strcmp(NOT_SET_STR, channel) == 0) {
427 ti_pruss_interrupts_enable(sc, irq, false);
428 ti_pruss_reg_write(sc, PRUSS_INTC_HIDISR,
429 sc->sc_irq_devs[irq].channel);
430 sc->sc_irq_devs[irq].channel = -1;
431 } else {
432 const int8_t channelnr = strtol(channel, NULL, 10); // TODO: check if strol is valid
433 if (channelnr > TI_PRUSS_IRQS || channelnr < 0)
434 {
435 device_printf(sc->sc_pdev->si_drv1,
436 "Channel number %d not valid (0 - %d)",
437 channelnr, TI_PRUSS_IRQS-1);
438 return (EINVAL);
439 }
440
441 sc->sc_irq_devs[irq].channel = channelnr;
442 sc->sc_irq_devs[irq].last = -1;
443
444 // channel[nr] <= irqnr
445 ti_pruss_map_write(sc, PRUSS_INTC_HMR_BASE,
446 irq, channelnr);
447 }
448 }
449
450 return (err);
451 }
452
453 static int
ti_pruss_interrupt_enable(SYSCTL_HANDLER_ARGS)454 ti_pruss_interrupt_enable(SYSCTL_HANDLER_ARGS)
455 {
456 struct ti_pruss_softc *sc;
457 int err;
458 bool irqenable;
459 const int8_t irq = arg2;
460
461 sc = arg1;
462 irqenable = sc->sc_irq_devs[arg2].enable;
463
464 err = sysctl_handle_bool(oidp, &irqenable, arg2, req);
465 if (err != 0)
466 return (err);
467
468 if (req->newptr) // write enable
469 return ti_pruss_interrupts_enable(sc, irq, irqenable);
470
471 return (err);
472 }
473
474 static int
ti_pruss_global_interrupt_enable(SYSCTL_HANDLER_ARGS)475 ti_pruss_global_interrupt_enable(SYSCTL_HANDLER_ARGS)
476 {
477 struct ti_pruss_softc *sc;
478 int err;
479 bool glob_irqen;
480
481 sc = arg1;
482 glob_irqen = sc->sc_glob_irqen;
483
484 err = sysctl_handle_bool(oidp, &glob_irqen, arg2, req);
485 if (err != 0)
486 return (err);
487
488 if (req->newptr) {
489 sc->sc_glob_irqen = glob_irqen;
490 ti_pruss_reg_write(sc, PRUSS_INTC_GER, glob_irqen);
491 }
492
493 return (err);
494 }
495 static int
ti_pruss_probe(device_t dev)496 ti_pruss_probe(device_t dev)
497 {
498
499 if (!ofw_bus_status_okay(dev))
500 return (ENXIO);
501
502 if (ofw_bus_is_compatible(dev, "ti,pruss-v1") ||
503 ofw_bus_is_compatible(dev, "ti,pruss-v2")) {
504 device_set_desc(dev, "TI Programmable Realtime Unit Subsystem");
505 return (BUS_PROBE_DEFAULT);
506 }
507
508 return (ENXIO);
509 }
510
511 static int
ti_pruss_attach(device_t dev)512 ti_pruss_attach(device_t dev)
513 {
514 struct ti_pruss_softc *sc;
515 int rid, i, err, ncells;
516 phandle_t node;
517 clk_t l3_gclk, pruss_ocp_gclk;
518 phandle_t ti_prm_ref, *cells;
519 device_t ti_prm_dev;
520
521 rid = 0;
522 sc = device_get_softc(dev);
523 node = ofw_bus_get_node(device_get_parent(dev));
524 if (node <= 0) {
525 device_printf(dev, "Cant get ofw node\n");
526 return (ENXIO);
527 }
528
529 /*
530 * Follow activate pattern from sys/arm/ti/am335x/am335x_prcm.c
531 * by Damjan Marion
532 */
533
534 /* Set MODULEMODE to ENABLE(2) */
535 /* Wait for MODULEMODE to become ENABLE(2) */
536 if (ti_sysc_clock_enable(device_get_parent(dev)) != 0) {
537 device_printf(dev, "Could not enable PRUSS clock\n");
538 return (ENXIO);
539 }
540
541 /* Set CLKTRCTRL to SW_WKUP(2) */
542 /* Wait for the 200 MHz OCP clock to become active */
543 /* Wait for the 200 MHz IEP clock to become active */
544 /* Wait for the 192 MHz UART clock to become active */
545 /*
546 * At the moment there is no reference to CM_PER_PRU_ICSS_CLKSTCTRL@140
547 * in the devicetree. The register reset state are SW_WKUP(2) as default
548 * so at the moment ignore setting this register.
549 */
550
551 /* Select L3F as OCP clock */
552 /* Get the clock and set the parent */
553 err = clk_get_by_name(dev, "l3_gclk", &l3_gclk);
554 if (err) {
555 device_printf(dev, "Cant get l3_gclk err %d\n", err);
556 return (ENXIO);
557 }
558
559 err = clk_get_by_name(dev, "pruss_ocp_gclk@530", &pruss_ocp_gclk);
560 if (err) {
561 device_printf(dev, "Cant get pruss_ocp_gclk@530 err %d\n", err);
562 return (ENXIO);
563 }
564
565 err = clk_set_parent_by_clk(pruss_ocp_gclk, l3_gclk);
566 if (err) {
567 device_printf(dev,
568 "Cant set pruss_ocp_gclk parent to l3_gclk err %d\n", err);
569 return (ENXIO);
570 }
571
572 /* Clear the RESET bit */
573 /* Find the ti_prm */
574 /* #reset-cells should not been used in this way but... */
575 err = ofw_bus_parse_xref_list_alloc(node, "resets", "#reset-cells", 0,
576 &ti_prm_ref, &ncells, &cells);
577 OF_prop_free(cells);
578 if (err) {
579 device_printf(dev,
580 "Cant fetch \"resets\" reference %x\n", err);
581 return (ENXIO);
582 }
583
584 ti_prm_dev = OF_device_from_xref(ti_prm_ref);
585 if (ti_prm_dev == NULL) {
586 device_printf(dev, "Cant get device from \"resets\"\n");
587 return (ENXIO);
588 }
589
590 err = ti_prm_reset(ti_prm_dev);
591 if (err) {
592 device_printf(dev, "ti_prm_reset failed %d\n", err);
593 return (ENXIO);
594 }
595 /* End of clock activation */
596
597 mtx_init(&sc->sc_mtx, "TI PRUSS", NULL, MTX_DEF);
598 sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
599 RF_ACTIVE);
600 if (sc->sc_mem_res == NULL) {
601 device_printf(dev, "could not allocate memory resource\n");
602 return (ENXIO);
603 }
604
605 struct sysctl_ctx_list *clist = device_get_sysctl_ctx(dev);
606 if (!clist)
607 return (EINVAL);
608
609 struct sysctl_oid *poid;
610 poid = device_get_sysctl_tree( dev );
611 if (!poid)
612 return (EINVAL);
613
614 sc->sc_glob_irqen = false;
615 struct sysctl_oid *irq_root = SYSCTL_ADD_NODE(clist, SYSCTL_CHILDREN(poid),
616 OID_AUTO, "irq", CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
617 "PRUSS Host Interrupts");
618 SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(poid), OID_AUTO,
619 "global_interrupt_enable",
620 CTLFLAG_RW | CTLTYPE_U8 | CTLFLAG_NEEDGIANT,
621 sc, 0, ti_pruss_global_interrupt_enable,
622 "CU", "Global interrupt enable");
623
624 sc->sc_bt = rman_get_bustag(sc->sc_mem_res);
625 sc->sc_bh = rman_get_bushandle(sc->sc_mem_res);
626 if (bus_alloc_resources(dev, ti_pruss_irq_spec, sc->sc_irq_res) != 0) {
627 device_printf(dev, "could not allocate interrupt resource\n");
628 ti_pruss_detach(dev);
629 return (ENXIO);
630 }
631
632 ti_pruss_interrupts_clear(sc);
633
634 for (i = 0; i < TI_PRUSS_IRQS; i++) {
635 char name[8];
636 snprintf(name, sizeof(name), "%d", i);
637
638 struct sysctl_oid *irq_nodes = SYSCTL_ADD_NODE(clist, SYSCTL_CHILDREN(irq_root),
639 OID_AUTO, name, CTLFLAG_RD | CTLFLAG_MPSAFE, 0,
640 "PRUSS Interrupts");
641 SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
642 "channel", CTLFLAG_RW | CTLTYPE_STRING | CTLFLAG_NEEDGIANT,
643 sc, i, ti_pruss_channel_map,
644 "A", "Channel attached to this irq");
645 SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
646 "event", CTLFLAG_RW | CTLTYPE_STRING | CTLFLAG_NEEDGIANT,
647 sc, i, ti_pruss_event_map,
648 "A", "Event attached to this irq");
649 SYSCTL_ADD_PROC(clist, SYSCTL_CHILDREN(irq_nodes), OID_AUTO,
650 "enable", CTLFLAG_RW | CTLTYPE_U8 | CTLFLAG_NEEDGIANT,
651 sc, i, ti_pruss_interrupt_enable,
652 "CU", "Enable/Disable interrupt");
653
654 sc->sc_irq_devs[i].event = -1;
655 sc->sc_irq_devs[i].channel = -1;
656 sc->sc_irq_devs[i].tstamps.ctl.idx = 0;
657
658 if (i < TI_PRUSS_HOST_IRQS) {
659 ti_pruss_irq_args[i].irq = i;
660 ti_pruss_irq_args[i].sc = sc;
661 if (bus_setup_intr(dev, sc->sc_irq_res[i],
662 INTR_MPSAFE | INTR_TYPE_MISC,
663 NULL, ti_pruss_intr, &ti_pruss_irq_args[i],
664 &sc->sc_intr[i]) != 0) {
665 device_printf(dev,
666 "unable to setup the interrupt handler\n");
667 ti_pruss_detach(dev);
668
669 return (ENXIO);
670 }
671 mtx_init(&sc->sc_irq_devs[i].sc_mtx, "TI PRUSS IRQ", NULL, MTX_DEF);
672 knlist_init_mtx(&sc->sc_irq_devs[i].sc_selinfo.si_note, &sc->sc_irq_devs[i].sc_mtx);
673 }
674 }
675
676 if (ti_pruss_reg_read(sc, PRUSS_AM33XX_INTC) == PRUSS_AM33XX_REV)
677 device_printf(dev, "AM33xx PRU-ICSS\n");
678
679 sc->sc_pdev = make_dev(&ti_pruss_cdevsw, 0, UID_ROOT, GID_WHEEL,
680 0600, "pruss%d", device_get_unit(dev));
681 sc->sc_pdev->si_drv1 = dev;
682
683 /* Acc. to datasheet always write 1 to polarity registers */
684 ti_pruss_reg_write(sc, PRUSS_INTC_SIPR0, 0xFFFFFFFF);
685 ti_pruss_reg_write(sc, PRUSS_INTC_SIPR1, 0xFFFFFFFF);
686
687 /* Acc. to datasheet always write 0 to event type registers */
688 ti_pruss_reg_write(sc, PRUSS_INTC_SITR0, 0);
689 ti_pruss_reg_write(sc, PRUSS_INTC_SITR1, 0);
690
691 return (0);
692 }
693
694 static int
ti_pruss_detach(device_t dev)695 ti_pruss_detach(device_t dev)
696 {
697 struct ti_pruss_softc *sc = device_get_softc(dev);
698
699 ti_pruss_interrupts_clear(sc);
700
701 for (int i = 0; i < TI_PRUSS_HOST_IRQS; i++) {
702 ti_pruss_interrupts_enable( sc, i, false );
703
704 if (sc->sc_intr[i])
705 bus_teardown_intr(dev, sc->sc_irq_res[i], sc->sc_intr[i]);
706 if (sc->sc_irq_res[i])
707 bus_release_resource(dev, SYS_RES_IRQ,
708 rman_get_rid(sc->sc_irq_res[i]),
709 sc->sc_irq_res[i]);
710 knlist_clear(&sc->sc_irq_devs[i].sc_selinfo.si_note, 0);
711 mtx_lock(&sc->sc_irq_devs[i].sc_mtx);
712 if (!knlist_empty(&sc->sc_irq_devs[i].sc_selinfo.si_note))
713 printf("IRQ %d KQueue not empty!\n", i );
714 mtx_unlock(&sc->sc_irq_devs[i].sc_mtx);
715 knlist_destroy(&sc->sc_irq_devs[i].sc_selinfo.si_note);
716 mtx_destroy(&sc->sc_irq_devs[i].sc_mtx);
717 }
718
719 mtx_destroy(&sc->sc_mtx);
720 if (sc->sc_mem_res)
721 bus_release_resource(dev, SYS_RES_MEMORY, rman_get_rid(sc->sc_mem_res),
722 sc->sc_mem_res);
723 if (sc->sc_pdev)
724 destroy_dev(sc->sc_pdev);
725
726 return (0);
727 }
728
729 static void
ti_pruss_intr(void * arg)730 ti_pruss_intr(void *arg)
731 {
732 int val;
733 struct ti_pruss_irq_arg *iap = arg;
734 struct ti_pruss_softc *sc = iap->sc;
735 /*
736 * Interrupts pr1_host_intr[0:7] are mapped to
737 * Host-2 to Host-9 of PRU-ICSS IRQ-controller.
738 */
739 const int pru_int = iap->irq + TI_PRUSS_PRU_IRQS;
740 const int pru_int_mask = (1 << pru_int);
741 const int pru_channel = sc->sc_irq_devs[pru_int].channel;
742 const int pru_event = sc->sc_irq_devs[pru_channel].event;
743
744 val = ti_pruss_reg_read(sc, PRUSS_INTC_HIER);
745 if (!(val & pru_int_mask))
746 return;
747
748 ti_pruss_reg_write(sc, PRUSS_INTC_HIDISR, pru_int);
749 ti_pruss_reg_write(sc, PRUSS_INTC_SICR, pru_event);
750 ti_pruss_reg_write(sc, PRUSS_INTC_HIEISR, pru_int);
751
752 struct ti_pruss_irqsc* irq = &sc->sc_irq_devs[pru_channel];
753 size_t wr = irq->tstamps.ctl.idx;
754
755 struct timespec ts;
756 nanouptime(&ts);
757 irq->tstamps.ts[wr] = ts.tv_sec * 1000000000 + ts.tv_nsec;
758
759 if (++wr == TI_TS_ARRAY)
760 wr = 0;
761 atomic_add_32(&irq->tstamps.ctl.cnt, 1);
762
763 irq->tstamps.ctl.idx = wr;
764
765 KNOTE_UNLOCKED(&irq->sc_selinfo.si_note, pru_int);
766 wakeup(irq);
767 selwakeup(&irq->sc_selinfo);
768 }
769
770 static int
ti_pruss_open(struct cdev * cdev __unused,int oflags __unused,int devtype __unused,struct thread * td __unused)771 ti_pruss_open(struct cdev *cdev __unused, int oflags __unused,
772 int devtype __unused, struct thread *td __unused)
773 {
774 return (0);
775 }
776
777 static int
ti_pruss_mmap(struct cdev * cdev,vm_ooffset_t offset,vm_paddr_t * paddr,int nprot,vm_memattr_t * memattr)778 ti_pruss_mmap(struct cdev *cdev, vm_ooffset_t offset, vm_paddr_t *paddr,
779 int nprot, vm_memattr_t *memattr)
780 {
781 device_t dev = cdev->si_drv1;
782 struct ti_pruss_softc *sc = device_get_softc(dev);
783
784 if (offset >= rman_get_size(sc->sc_mem_res))
785 return (ENOSPC);
786 *paddr = rman_get_start(sc->sc_mem_res) + offset;
787 *memattr = VM_MEMATTR_UNCACHEABLE;
788
789 return (0);
790 }
791
792 static struct filterops ti_pruss_kq_read = {
793 .f_isfd = 1,
794 .f_detach = ti_pruss_irq_kqread_detach,
795 .f_event = ti_pruss_irq_kqevent,
796 };
797
798 static void
ti_pruss_irq_kqread_detach(struct knote * kn)799 ti_pruss_irq_kqread_detach(struct knote *kn)
800 {
801 struct ti_pruss_irqsc *sc = kn->kn_hook;
802
803 knlist_remove(&sc->sc_selinfo.si_note, kn, 0);
804 }
805
806 static int
ti_pruss_irq_kqevent(struct knote * kn,long hint)807 ti_pruss_irq_kqevent(struct knote *kn, long hint)
808 {
809 struct ti_pruss_irqsc* irq_sc;
810 int notify;
811
812 irq_sc = kn->kn_hook;
813
814 if (hint > 0)
815 kn->kn_data = hint - 2;
816
817 if (hint > 0 || irq_sc->last > 0)
818 notify = 1;
819 else
820 notify = 0;
821
822 irq_sc->last = hint;
823
824 return (notify);
825 }
826
827 static int
ti_pruss_irq_kqfilter(struct cdev * cdev,struct knote * kn)828 ti_pruss_irq_kqfilter(struct cdev *cdev, struct knote *kn)
829 {
830 struct ti_pruss_irqsc *sc = cdev->si_drv1;
831
832 switch (kn->kn_filter) {
833 case EVFILT_READ:
834 kn->kn_hook = sc;
835 kn->kn_fop = &ti_pruss_kq_read;
836 knlist_add(&sc->sc_selinfo.si_note, kn, 0);
837 break;
838 default:
839 return (EINVAL);
840 }
841
842 return (0);
843 }
844