xref: /linux/drivers/staging/rts5208/ms.c (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Driver for Realtek PCI-Express card reader
4  *
5  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
6  *
7  * Author:
8  *   Wei WANG (wei_wang@realsil.com.cn)
9  *   Micky Ching (micky_ching@realsil.com.cn)
10  */
11 
12 #include <linux/blkdev.h>
13 #include <linux/kthread.h>
14 #include <linux/sched.h>
15 #include <linux/vmalloc.h>
16 
17 #include "rtsx.h"
18 #include "ms.h"
19 
ms_set_err_code(struct rtsx_chip * chip,u8 err_code)20 static inline void ms_set_err_code(struct rtsx_chip *chip, u8 err_code)
21 {
22 	struct ms_info *ms_card = &chip->ms_card;
23 
24 	ms_card->err_code = err_code;
25 }
26 
ms_check_err_code(struct rtsx_chip * chip,u8 err_code)27 static inline int ms_check_err_code(struct rtsx_chip *chip, u8 err_code)
28 {
29 	struct ms_info *ms_card = &chip->ms_card;
30 
31 	return (ms_card->err_code == err_code);
32 }
33 
ms_parse_err_code(struct rtsx_chip * chip)34 static int ms_parse_err_code(struct rtsx_chip *chip)
35 {
36 	return STATUS_FAIL;
37 }
38 
ms_transfer_tpc(struct rtsx_chip * chip,u8 trans_mode,u8 tpc,u8 cnt,u8 cfg)39 static int ms_transfer_tpc(struct rtsx_chip *chip, u8 trans_mode,
40 			   u8 tpc, u8 cnt, u8 cfg)
41 {
42 	struct ms_info *ms_card = &chip->ms_card;
43 	int retval;
44 	u8 *ptr;
45 
46 	dev_dbg(rtsx_dev(chip), "%s: tpc = 0x%x\n", __func__, tpc);
47 
48 	rtsx_init_cmd(chip);
49 
50 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
51 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
52 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
53 	rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
54 		     0x01, PINGPONG_BUFFER);
55 
56 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER,
57 		     0xFF, MS_TRANSFER_START | trans_mode);
58 	rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
59 		     MS_TRANSFER_END, MS_TRANSFER_END);
60 
61 	rtsx_add_cmd(chip, READ_REG_CMD, MS_TRANS_CFG, 0, 0);
62 
63 	retval = rtsx_send_cmd(chip, MS_CARD, 5000);
64 	if (retval < 0) {
65 		rtsx_clear_ms_error(chip);
66 		ms_set_err_code(chip, MS_TO_ERROR);
67 		return ms_parse_err_code(chip);
68 	}
69 
70 	ptr = rtsx_get_cmd_data(chip) + 1;
71 
72 	if (!(tpc & 0x08)) {		/* Read Packet */
73 		if (*ptr & MS_CRC16_ERR) {
74 			ms_set_err_code(chip, MS_CRC16_ERROR);
75 			return ms_parse_err_code(chip);
76 		}
77 	} else {			/* Write Packet */
78 		if (CHK_MSPRO(ms_card) && !(*ptr & 0x80)) {
79 			if (*ptr & (MS_INT_ERR | MS_INT_CMDNK)) {
80 				ms_set_err_code(chip, MS_CMD_NK);
81 				return ms_parse_err_code(chip);
82 			}
83 		}
84 	}
85 
86 	if (*ptr & MS_RDY_TIMEOUT) {
87 		rtsx_clear_ms_error(chip);
88 		ms_set_err_code(chip, MS_TO_ERROR);
89 		return ms_parse_err_code(chip);
90 	}
91 
92 	return STATUS_SUCCESS;
93 }
94 
ms_transfer_data(struct rtsx_chip * chip,u8 trans_mode,u8 tpc,u16 sec_cnt,u8 cfg,bool mode_2k,int use_sg,void * buf,int buf_len)95 static int ms_transfer_data(struct rtsx_chip *chip, u8 trans_mode,
96 			    u8 tpc, u16 sec_cnt, u8 cfg, bool mode_2k,
97 			    int use_sg, void *buf, int buf_len)
98 {
99 	int retval;
100 	u8 val, err_code = 0;
101 	enum dma_data_direction dir;
102 
103 	if (!buf || !buf_len)
104 		return STATUS_FAIL;
105 
106 	if (trans_mode == MS_TM_AUTO_READ) {
107 		dir = DMA_FROM_DEVICE;
108 		err_code = MS_FLASH_READ_ERROR;
109 	} else if (trans_mode == MS_TM_AUTO_WRITE) {
110 		dir = DMA_TO_DEVICE;
111 		err_code = MS_FLASH_WRITE_ERROR;
112 	} else {
113 		return STATUS_FAIL;
114 	}
115 
116 	rtsx_init_cmd(chip);
117 
118 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
119 	rtsx_add_cmd(chip, WRITE_REG_CMD,
120 		     MS_SECTOR_CNT_H, 0xFF, (u8)(sec_cnt >> 8));
121 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_SECTOR_CNT_L, 0xFF, (u8)sec_cnt);
122 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
123 
124 	if (mode_2k) {
125 		rtsx_add_cmd(chip, WRITE_REG_CMD,
126 			     MS_CFG, MS_2K_SECTOR_MODE, MS_2K_SECTOR_MODE);
127 	} else {
128 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_CFG, MS_2K_SECTOR_MODE, 0);
129 	}
130 
131 	trans_dma_enable(dir, chip, sec_cnt * 512, DMA_512);
132 
133 	rtsx_add_cmd(chip, WRITE_REG_CMD,
134 		     MS_TRANSFER, 0xFF, MS_TRANSFER_START | trans_mode);
135 	rtsx_add_cmd(chip, CHECK_REG_CMD,
136 		     MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
137 
138 	rtsx_send_cmd_no_wait(chip);
139 
140 	retval = rtsx_transfer_data(chip, MS_CARD, buf, buf_len,
141 				    use_sg, dir, chip->mspro_timeout);
142 	if (retval < 0) {
143 		ms_set_err_code(chip, err_code);
144 		if (retval == -ETIMEDOUT)
145 			retval = STATUS_TIMEDOUT;
146 		else
147 			retval = STATUS_FAIL;
148 
149 		return retval;
150 	}
151 
152 	retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
153 	if (retval)
154 		return retval;
155 
156 	if (val & (MS_INT_CMDNK | MS_INT_ERR | MS_CRC16_ERR | MS_RDY_TIMEOUT))
157 		return STATUS_FAIL;
158 
159 	return STATUS_SUCCESS;
160 }
161 
ms_write_bytes(struct rtsx_chip * chip,u8 tpc,u8 cnt,u8 cfg,u8 * data,int data_len)162 static int ms_write_bytes(struct rtsx_chip *chip,
163 			  u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
164 {
165 	struct ms_info *ms_card = &chip->ms_card;
166 	int retval, i;
167 
168 	if (!data || data_len < cnt)
169 		return STATUS_ERROR;
170 
171 	rtsx_init_cmd(chip);
172 
173 	for (i = 0; i < cnt; i++) {
174 		rtsx_add_cmd(chip, WRITE_REG_CMD,
175 			     PPBUF_BASE2 + i, 0xFF, data[i]);
176 	}
177 	if (cnt % 2)
178 		rtsx_add_cmd(chip, WRITE_REG_CMD, PPBUF_BASE2 + i, 0xFF, 0xFF);
179 
180 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
181 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
182 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
183 	rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
184 		     0x01, PINGPONG_BUFFER);
185 
186 	rtsx_add_cmd(chip, WRITE_REG_CMD,
187 		     MS_TRANSFER, 0xFF, MS_TRANSFER_START | MS_TM_WRITE_BYTES);
188 	rtsx_add_cmd(chip, CHECK_REG_CMD,
189 		     MS_TRANSFER, MS_TRANSFER_END, MS_TRANSFER_END);
190 
191 	retval = rtsx_send_cmd(chip, MS_CARD, 5000);
192 	if (retval < 0) {
193 		u8 val = 0;
194 
195 		rtsx_read_register(chip, MS_TRANS_CFG, &val);
196 		dev_dbg(rtsx_dev(chip), "MS_TRANS_CFG: 0x%02x\n", val);
197 
198 		rtsx_clear_ms_error(chip);
199 
200 		if (!(tpc & 0x08)) {
201 			if (val & MS_CRC16_ERR) {
202 				ms_set_err_code(chip, MS_CRC16_ERROR);
203 				return ms_parse_err_code(chip);
204 			}
205 		} else {
206 			if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
207 				if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
208 					ms_set_err_code(chip, MS_CMD_NK);
209 					return ms_parse_err_code(chip);
210 				}
211 			}
212 		}
213 
214 		if (val & MS_RDY_TIMEOUT) {
215 			ms_set_err_code(chip, MS_TO_ERROR);
216 			return ms_parse_err_code(chip);
217 		}
218 
219 		ms_set_err_code(chip, MS_TO_ERROR);
220 		return ms_parse_err_code(chip);
221 	}
222 
223 	return STATUS_SUCCESS;
224 }
225 
ms_read_bytes(struct rtsx_chip * chip,u8 tpc,u8 cnt,u8 cfg,u8 * data,int data_len)226 static int ms_read_bytes(struct rtsx_chip *chip,
227 			 u8 tpc, u8 cnt, u8 cfg, u8 *data, int data_len)
228 {
229 	struct ms_info *ms_card = &chip->ms_card;
230 	int retval, i;
231 	u8 *ptr;
232 
233 	if (!data)
234 		return STATUS_ERROR;
235 
236 	rtsx_init_cmd(chip);
237 
238 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, tpc);
239 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_BYTE_CNT, 0xFF, cnt);
240 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, cfg);
241 	rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
242 		     0x01, PINGPONG_BUFFER);
243 
244 	rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
245 		     MS_TRANSFER_START | MS_TM_READ_BYTES);
246 	rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
247 		     MS_TRANSFER_END, MS_TRANSFER_END);
248 
249 	for (i = 0; i < data_len - 1; i++)
250 		rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + i, 0, 0);
251 
252 	if (data_len % 2)
253 		rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len, 0, 0);
254 	else
255 		rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + data_len - 1,
256 			     0, 0);
257 
258 	retval = rtsx_send_cmd(chip, MS_CARD, 5000);
259 	if (retval < 0) {
260 		u8 val = 0;
261 
262 		rtsx_read_register(chip, MS_TRANS_CFG, &val);
263 		rtsx_clear_ms_error(chip);
264 
265 		if (!(tpc & 0x08)) {
266 			if (val & MS_CRC16_ERR) {
267 				ms_set_err_code(chip, MS_CRC16_ERROR);
268 				return ms_parse_err_code(chip);
269 			}
270 		} else {
271 			if (CHK_MSPRO(ms_card) && !(val & 0x80)) {
272 				if (val & (MS_INT_ERR | MS_INT_CMDNK)) {
273 					ms_set_err_code(chip, MS_CMD_NK);
274 					return ms_parse_err_code(chip);
275 				}
276 			}
277 		}
278 
279 		if (val & MS_RDY_TIMEOUT) {
280 			ms_set_err_code(chip, MS_TO_ERROR);
281 			return ms_parse_err_code(chip);
282 		}
283 
284 		ms_set_err_code(chip, MS_TO_ERROR);
285 		return ms_parse_err_code(chip);
286 	}
287 
288 	ptr = rtsx_get_cmd_data(chip) + 1;
289 
290 	for (i = 0; i < data_len; i++)
291 		data[i] = ptr[i];
292 
293 	if (tpc == PRO_READ_SHORT_DATA && data_len == 8) {
294 		dev_dbg(rtsx_dev(chip), "Read format progress:\n");
295 		print_hex_dump_bytes(KBUILD_MODNAME ": ", DUMP_PREFIX_NONE, ptr,
296 				     cnt);
297 	}
298 
299 	return STATUS_SUCCESS;
300 }
301 
ms_set_rw_reg_addr(struct rtsx_chip * chip,u8 read_start,u8 read_cnt,u8 write_start,u8 write_cnt)302 static int ms_set_rw_reg_addr(struct rtsx_chip *chip, u8 read_start,
303 			      u8 read_cnt, u8 write_start, u8 write_cnt)
304 {
305 	int retval, i;
306 	u8 data[4];
307 
308 	data[0] = read_start;
309 	data[1] = read_cnt;
310 	data[2] = write_start;
311 	data[3] = write_cnt;
312 
313 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
314 		retval = ms_write_bytes(chip, SET_RW_REG_ADRS, 4,
315 					NO_WAIT_INT, data, 4);
316 		if (retval == STATUS_SUCCESS)
317 			return STATUS_SUCCESS;
318 		rtsx_clear_ms_error(chip);
319 	}
320 
321 	return STATUS_FAIL;
322 }
323 
ms_send_cmd(struct rtsx_chip * chip,u8 cmd,u8 cfg)324 static int ms_send_cmd(struct rtsx_chip *chip, u8 cmd, u8 cfg)
325 {
326 	u8 data[2];
327 
328 	data[0] = cmd;
329 	data[1] = 0;
330 
331 	return ms_write_bytes(chip, PRO_SET_CMD, 1, cfg, data, 1);
332 }
333 
ms_set_init_para(struct rtsx_chip * chip)334 static int ms_set_init_para(struct rtsx_chip *chip)
335 {
336 	struct ms_info *ms_card = &chip->ms_card;
337 	int retval;
338 
339 	if (CHK_HG8BIT(ms_card)) {
340 		if (chip->asic_code)
341 			ms_card->ms_clock = chip->asic_ms_hg_clk;
342 		else
343 			ms_card->ms_clock = chip->fpga_ms_hg_clk;
344 
345 	} else if (CHK_MSPRO(ms_card) || CHK_MS4BIT(ms_card)) {
346 		if (chip->asic_code)
347 			ms_card->ms_clock = chip->asic_ms_4bit_clk;
348 		else
349 			ms_card->ms_clock = chip->fpga_ms_4bit_clk;
350 
351 	} else {
352 		if (chip->asic_code)
353 			ms_card->ms_clock = chip->asic_ms_1bit_clk;
354 		else
355 			ms_card->ms_clock = chip->fpga_ms_1bit_clk;
356 	}
357 
358 	retval = switch_clock(chip, ms_card->ms_clock);
359 	if (retval != STATUS_SUCCESS)
360 		return STATUS_FAIL;
361 
362 	retval = select_card(chip, MS_CARD);
363 	if (retval != STATUS_SUCCESS)
364 		return STATUS_FAIL;
365 
366 	return STATUS_SUCCESS;
367 }
368 
ms_switch_clock(struct rtsx_chip * chip)369 static int ms_switch_clock(struct rtsx_chip *chip)
370 {
371 	struct ms_info *ms_card = &chip->ms_card;
372 	int retval;
373 
374 	retval = select_card(chip, MS_CARD);
375 	if (retval != STATUS_SUCCESS)
376 		return STATUS_FAIL;
377 
378 	retval = switch_clock(chip, ms_card->ms_clock);
379 	if (retval != STATUS_SUCCESS)
380 		return STATUS_FAIL;
381 
382 	return STATUS_SUCCESS;
383 }
384 
ms_pull_ctl_disable(struct rtsx_chip * chip)385 static int ms_pull_ctl_disable(struct rtsx_chip *chip)
386 {
387 	int retval;
388 
389 	if (CHECK_PID(chip, 0x5208)) {
390 		retval = rtsx_write_register(chip, CARD_PULL_CTL1, 0xFF,
391 					     MS_D1_PD | MS_D2_PD | MS_CLK_PD |
392 					     MS_D6_PD);
393 		if (retval)
394 			return retval;
395 
396 		retval = rtsx_write_register(chip, CARD_PULL_CTL2, 0xFF,
397 					     MS_D3_PD | MS_D0_PD | MS_BS_PD |
398 					     XD_D4_PD);
399 		if (retval)
400 			return retval;
401 
402 		retval = rtsx_write_register(chip, CARD_PULL_CTL3, 0xFF,
403 					     MS_D7_PD | XD_CE_PD | XD_CLE_PD |
404 					     XD_CD_PU);
405 		if (retval)
406 			return retval;
407 
408 		retval = rtsx_write_register(chip, CARD_PULL_CTL4, 0xFF,
409 					     XD_RDY_PD | SD_D3_PD | SD_D2_PD |
410 					     XD_ALE_PD);
411 		if (retval)
412 			return retval;
413 
414 		retval = rtsx_write_register(chip, CARD_PULL_CTL5, 0xFF,
415 					     MS_INS_PU | SD_WP_PD | SD_CD_PU |
416 					     SD_CMD_PD);
417 		if (retval)
418 			return retval;
419 
420 		retval = rtsx_write_register(chip, CARD_PULL_CTL6, 0xFF,
421 					     MS_D5_PD | MS_D4_PD);
422 		if (retval)
423 			return retval;
424 
425 	} else if (CHECK_PID(chip, 0x5288)) {
426 		if (CHECK_BARO_PKG(chip, QFN)) {
427 			retval = rtsx_write_register(chip, CARD_PULL_CTL1,
428 						     0xFF, 0x55);
429 			if (retval)
430 				return retval;
431 
432 			retval = rtsx_write_register(chip, CARD_PULL_CTL2,
433 						     0xFF, 0x55);
434 			if (retval)
435 				return retval;
436 
437 			retval = rtsx_write_register(chip, CARD_PULL_CTL3,
438 						     0xFF, 0x4B);
439 			if (retval)
440 				return retval;
441 
442 			retval = rtsx_write_register(chip, CARD_PULL_CTL4,
443 						     0xFF, 0x69);
444 			if (retval)
445 				return retval;
446 		}
447 	}
448 
449 	return STATUS_SUCCESS;
450 }
451 
ms_pull_ctl_enable(struct rtsx_chip * chip)452 static int ms_pull_ctl_enable(struct rtsx_chip *chip)
453 {
454 	int retval;
455 
456 	rtsx_init_cmd(chip);
457 
458 	if (CHECK_PID(chip, 0x5208)) {
459 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF,
460 			     MS_D1_PD | MS_D2_PD | MS_CLK_NP | MS_D6_PD);
461 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF,
462 			     MS_D3_PD | MS_D0_PD | MS_BS_NP | XD_D4_PD);
463 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF,
464 			     MS_D7_PD | XD_CE_PD | XD_CLE_PD | XD_CD_PU);
465 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF,
466 			     XD_RDY_PD | SD_D3_PD | SD_D2_PD | XD_ALE_PD);
467 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF,
468 			     MS_INS_PU | SD_WP_PD | SD_CD_PU | SD_CMD_PD);
469 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF,
470 			     MS_D5_PD | MS_D4_PD);
471 	} else if (CHECK_PID(chip, 0x5288)) {
472 		if (CHECK_BARO_PKG(chip, QFN)) {
473 			rtsx_add_cmd(chip, WRITE_REG_CMD,
474 				     CARD_PULL_CTL1, 0xFF, 0x55);
475 			rtsx_add_cmd(chip, WRITE_REG_CMD,
476 				     CARD_PULL_CTL2, 0xFF, 0x45);
477 			rtsx_add_cmd(chip, WRITE_REG_CMD,
478 				     CARD_PULL_CTL3, 0xFF, 0x4B);
479 			rtsx_add_cmd(chip, WRITE_REG_CMD,
480 				     CARD_PULL_CTL4, 0xFF, 0x29);
481 		}
482 	}
483 
484 	retval = rtsx_send_cmd(chip, MS_CARD, 100);
485 	if (retval < 0)
486 		return STATUS_FAIL;
487 
488 	return STATUS_SUCCESS;
489 }
490 
ms_prepare_reset(struct rtsx_chip * chip)491 static int ms_prepare_reset(struct rtsx_chip *chip)
492 {
493 	struct ms_info *ms_card = &chip->ms_card;
494 	int retval;
495 	u8 oc_mask = 0;
496 
497 	ms_card->ms_type = 0;
498 	ms_card->check_ms_flow = 0;
499 	ms_card->switch_8bit_fail = 0;
500 	ms_card->delay_write.delay_write_flag = 0;
501 
502 	ms_card->pro_under_formatting = 0;
503 
504 	retval = ms_power_off_card3v3(chip);
505 	if (retval != STATUS_SUCCESS)
506 		return STATUS_FAIL;
507 
508 	if (!chip->ft2_fast_mode)
509 		wait_timeout(250);
510 
511 	retval = enable_card_clock(chip, MS_CARD);
512 	if (retval != STATUS_SUCCESS)
513 		return STATUS_FAIL;
514 
515 	if (chip->asic_code) {
516 		retval = ms_pull_ctl_enable(chip);
517 		if (retval != STATUS_SUCCESS)
518 			return STATUS_FAIL;
519 	} else {
520 		retval = rtsx_write_register(chip, FPGA_PULL_CTL,
521 					     FPGA_MS_PULL_CTL_BIT | 0x20, 0);
522 		if (retval)
523 			return retval;
524 	}
525 
526 	if (!chip->ft2_fast_mode) {
527 		retval = card_power_on(chip, MS_CARD);
528 		if (retval != STATUS_SUCCESS)
529 			return STATUS_FAIL;
530 
531 		wait_timeout(150);
532 
533 #ifdef SUPPORT_OCP
534 		if (CHECK_LUN_MODE(chip, SD_MS_2LUN))
535 			oc_mask = MS_OC_NOW | MS_OC_EVER;
536 		else
537 			oc_mask = SD_OC_NOW | SD_OC_EVER;
538 
539 		if (chip->ocp_stat & oc_mask) {
540 			dev_dbg(rtsx_dev(chip), "Over current, OCPSTAT is 0x%x\n",
541 				chip->ocp_stat);
542 			return STATUS_FAIL;
543 		}
544 #endif
545 	}
546 
547 	retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN,
548 				     MS_OUTPUT_EN);
549 	if (retval)
550 		return retval;
551 
552 	if (chip->asic_code) {
553 		retval = rtsx_write_register(chip, MS_CFG, 0xFF,
554 					     SAMPLE_TIME_RISING |
555 					     PUSH_TIME_DEFAULT |
556 					     NO_EXTEND_TOGGLE |
557 					     MS_BUS_WIDTH_1);
558 		if (retval)
559 			return retval;
560 
561 	} else {
562 		retval = rtsx_write_register(chip, MS_CFG, 0xFF,
563 					     SAMPLE_TIME_FALLING |
564 					     PUSH_TIME_DEFAULT |
565 					     NO_EXTEND_TOGGLE |
566 					     MS_BUS_WIDTH_1);
567 		if (retval)
568 			return retval;
569 	}
570 	retval = rtsx_write_register(chip, MS_TRANS_CFG, 0xFF,
571 				     NO_WAIT_INT | NO_AUTO_READ_INT_REG);
572 	if (retval)
573 		return retval;
574 
575 	retval = rtsx_write_register(chip, CARD_STOP, MS_STOP | MS_CLR_ERR,
576 				     MS_STOP | MS_CLR_ERR);
577 	if (retval)
578 		return retval;
579 
580 	retval = ms_set_init_para(chip);
581 	if (retval != STATUS_SUCCESS)
582 		return STATUS_FAIL;
583 
584 	return STATUS_SUCCESS;
585 }
586 
ms_identify_media_type(struct rtsx_chip * chip,int switch_8bit_bus)587 static int ms_identify_media_type(struct rtsx_chip *chip, int switch_8bit_bus)
588 {
589 	struct ms_info *ms_card = &chip->ms_card;
590 	int retval, i;
591 	u8 val;
592 
593 	retval = ms_set_rw_reg_addr(chip, PRO_STATUS_REG, 6, SYSTEM_PARAM, 1);
594 	if (retval != STATUS_SUCCESS)
595 		return STATUS_FAIL;
596 
597 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
598 		retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, READ_REG,
599 					 6, NO_WAIT_INT);
600 		if (retval == STATUS_SUCCESS)
601 			break;
602 	}
603 	if (i == MS_MAX_RETRY_COUNT)
604 		return STATUS_FAIL;
605 
606 	retval = rtsx_read_register(chip, PPBUF_BASE2 + 2, &val);
607 	if (retval)
608 		return retval;
609 
610 	dev_dbg(rtsx_dev(chip), "Type register: 0x%x\n", val);
611 	if (val != 0x01) {
612 		if (val != 0x02)
613 			ms_card->check_ms_flow = 1;
614 
615 		return STATUS_FAIL;
616 	}
617 
618 	retval = rtsx_read_register(chip, PPBUF_BASE2 + 4, &val);
619 	if (retval)
620 		return retval;
621 
622 	dev_dbg(rtsx_dev(chip), "Category register: 0x%x\n", val);
623 	if (val != 0) {
624 		ms_card->check_ms_flow = 1;
625 		return STATUS_FAIL;
626 	}
627 
628 	retval = rtsx_read_register(chip, PPBUF_BASE2 + 5, &val);
629 	if (retval)
630 		return retval;
631 
632 	dev_dbg(rtsx_dev(chip), "Class register: 0x%x\n", val);
633 	if (val == 0) {
634 		retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
635 		if (retval)
636 			return retval;
637 
638 		if (val & WRT_PRTCT)
639 			chip->card_wp |= MS_CARD;
640 		else
641 			chip->card_wp &= ~MS_CARD;
642 
643 	} else if ((val == 0x01) || (val == 0x02) || (val == 0x03)) {
644 		chip->card_wp |= MS_CARD;
645 	} else {
646 		ms_card->check_ms_flow = 1;
647 		return STATUS_FAIL;
648 	}
649 
650 	ms_card->ms_type |= TYPE_MSPRO;
651 
652 	retval = rtsx_read_register(chip, PPBUF_BASE2 + 3, &val);
653 	if (retval)
654 		return retval;
655 
656 	dev_dbg(rtsx_dev(chip), "IF Mode register: 0x%x\n", val);
657 	if (val == 0) {
658 		ms_card->ms_type &= 0x0F;
659 	} else if (val == 7) {
660 		if (switch_8bit_bus)
661 			ms_card->ms_type |= MS_HG;
662 		else
663 			ms_card->ms_type &= 0x0F;
664 
665 	} else {
666 		return STATUS_FAIL;
667 	}
668 
669 	return STATUS_SUCCESS;
670 }
671 
ms_confirm_cpu_startup(struct rtsx_chip * chip)672 static int ms_confirm_cpu_startup(struct rtsx_chip *chip)
673 {
674 	int retval, i, k;
675 	u8 val;
676 
677 	/* Confirm CPU StartUp */
678 	k = 0;
679 	do {
680 		if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
681 			ms_set_err_code(chip, MS_NO_CARD);
682 			return STATUS_FAIL;
683 		}
684 
685 		for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
686 			retval = ms_read_bytes(chip, GET_INT, 1,
687 					       NO_WAIT_INT, &val, 1);
688 			if (retval == STATUS_SUCCESS)
689 				break;
690 		}
691 		if (i == MS_MAX_RETRY_COUNT)
692 			return STATUS_FAIL;
693 
694 		if (k > 100)
695 			return STATUS_FAIL;
696 
697 		k++;
698 		wait_timeout(100);
699 	} while (!(val & INT_REG_CED));
700 
701 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
702 		retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
703 		if (retval == STATUS_SUCCESS)
704 			break;
705 	}
706 	if (i == MS_MAX_RETRY_COUNT)
707 		return STATUS_FAIL;
708 
709 	if (val & INT_REG_ERR) {
710 		if (val & INT_REG_CMDNK)
711 			chip->card_wp |= (MS_CARD);
712 		else
713 			return STATUS_FAIL;
714 	}
715 	/* --  end confirm CPU startup */
716 
717 	return STATUS_SUCCESS;
718 }
719 
ms_switch_parallel_bus(struct rtsx_chip * chip)720 static int ms_switch_parallel_bus(struct rtsx_chip *chip)
721 {
722 	int retval, i;
723 	u8 data[2];
724 
725 	data[0] = PARALLEL_4BIT_IF;
726 	data[1] = 0;
727 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
728 		retval = ms_write_bytes(chip, WRITE_REG, 1, NO_WAIT_INT,
729 					data, 2);
730 		if (retval == STATUS_SUCCESS)
731 			break;
732 	}
733 	if (retval != STATUS_SUCCESS)
734 		return STATUS_FAIL;
735 
736 	return STATUS_SUCCESS;
737 }
738 
ms_switch_8bit_bus(struct rtsx_chip * chip)739 static int ms_switch_8bit_bus(struct rtsx_chip *chip)
740 {
741 	struct ms_info *ms_card = &chip->ms_card;
742 	int retval, i;
743 	u8 data[2];
744 
745 	data[0] = PARALLEL_8BIT_IF;
746 	data[1] = 0;
747 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
748 		retval = ms_write_bytes(chip, WRITE_REG, 1,
749 					NO_WAIT_INT, data, 2);
750 		if (retval == STATUS_SUCCESS)
751 			break;
752 	}
753 	if (retval != STATUS_SUCCESS)
754 		return STATUS_FAIL;
755 
756 	retval = rtsx_write_register(chip, MS_CFG, 0x98,
757 				     MS_BUS_WIDTH_8 | SAMPLE_TIME_FALLING);
758 	if (retval)
759 		return retval;
760 
761 	ms_card->ms_type |= MS_8BIT;
762 	retval = ms_set_init_para(chip);
763 	if (retval != STATUS_SUCCESS)
764 		return STATUS_FAIL;
765 
766 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
767 		retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT,
768 					 1, NO_WAIT_INT);
769 		if (retval != STATUS_SUCCESS)
770 			return STATUS_FAIL;
771 	}
772 
773 	return STATUS_SUCCESS;
774 }
775 
ms_pro_reset_flow(struct rtsx_chip * chip,int switch_8bit_bus)776 static int ms_pro_reset_flow(struct rtsx_chip *chip, int switch_8bit_bus)
777 {
778 	struct ms_info *ms_card = &chip->ms_card;
779 	int retval, i;
780 
781 	for (i = 0; i < 3; i++) {
782 		retval = ms_prepare_reset(chip);
783 		if (retval != STATUS_SUCCESS)
784 			return STATUS_FAIL;
785 
786 		retval = ms_identify_media_type(chip, switch_8bit_bus);
787 		if (retval != STATUS_SUCCESS)
788 			return STATUS_FAIL;
789 
790 		retval = ms_confirm_cpu_startup(chip);
791 		if (retval != STATUS_SUCCESS)
792 			return STATUS_FAIL;
793 
794 		retval = ms_switch_parallel_bus(chip);
795 		if (retval != STATUS_SUCCESS) {
796 			if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
797 				ms_set_err_code(chip, MS_NO_CARD);
798 				return STATUS_FAIL;
799 			}
800 			continue;
801 		} else {
802 			break;
803 		}
804 	}
805 
806 	if (retval != STATUS_SUCCESS)
807 		return STATUS_FAIL;
808 
809 	/* Switch MS-PRO into Parallel mode */
810 	retval = rtsx_write_register(chip, MS_CFG, 0x18, MS_BUS_WIDTH_4);
811 	if (retval)
812 		return retval;
813 
814 	retval = rtsx_write_register(chip, MS_CFG, PUSH_TIME_ODD,
815 				     PUSH_TIME_ODD);
816 	if (retval)
817 		return retval;
818 
819 	retval = ms_set_init_para(chip);
820 	if (retval != STATUS_SUCCESS)
821 		return STATUS_FAIL;
822 
823 	/* If MSPro HG Card, We shall try to switch to 8-bit bus */
824 	if (CHK_MSHG(ms_card) && chip->support_ms_8bit && switch_8bit_bus) {
825 		retval = ms_switch_8bit_bus(chip);
826 		if (retval != STATUS_SUCCESS) {
827 			ms_card->switch_8bit_fail = 1;
828 			return STATUS_FAIL;
829 		}
830 	}
831 
832 	return STATUS_SUCCESS;
833 }
834 
835 #ifdef XC_POWERCLASS
msxc_change_power(struct rtsx_chip * chip,u8 mode)836 static int msxc_change_power(struct rtsx_chip *chip, u8 mode)
837 {
838 	int retval;
839 	u8 buf[6];
840 
841 	ms_cleanup_work(chip);
842 
843 	retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_DATA_COUNT1, 6);
844 	if (retval != STATUS_SUCCESS)
845 		return STATUS_FAIL;
846 
847 	buf[0] = 0;
848 	buf[1] = mode;
849 	buf[2] = 0;
850 	buf[3] = 0;
851 	buf[4] = 0;
852 	buf[5] = 0;
853 
854 	retval = ms_write_bytes(chip, PRO_WRITE_REG, 6, NO_WAIT_INT, buf, 6);
855 	if (retval != STATUS_SUCCESS)
856 		return STATUS_FAIL;
857 
858 	retval = ms_send_cmd(chip, XC_CHG_POWER, WAIT_INT);
859 	if (retval != STATUS_SUCCESS)
860 		return STATUS_FAIL;
861 
862 	retval = rtsx_read_register(chip, MS_TRANS_CFG, buf);
863 	if (retval)
864 		return retval;
865 
866 	if (buf[0] & (MS_INT_CMDNK | MS_INT_ERR))
867 		return STATUS_FAIL;
868 
869 	return STATUS_SUCCESS;
870 }
871 #endif
872 
ms_read_attribute_info(struct rtsx_chip * chip)873 static int ms_read_attribute_info(struct rtsx_chip *chip)
874 {
875 	struct ms_info *ms_card = &chip->ms_card;
876 	int retval, i;
877 	u8 val, *buf, class_code, device_type, sub_class, data[16];
878 	u16 total_blk = 0, blk_size = 0;
879 #ifdef SUPPORT_MSXC
880 	u32 xc_total_blk = 0, xc_blk_size = 0;
881 #endif
882 	u32 sys_info_addr = 0, sys_info_size;
883 #ifdef SUPPORT_PCGL_1P18
884 	u32 model_name_addr = 0, model_name_size;
885 	int found_sys_info = 0, found_model_name = 0;
886 #endif
887 
888 	retval = ms_set_rw_reg_addr(chip, PRO_INT_REG, 2, PRO_SYSTEM_PARAM, 7);
889 	if (retval != STATUS_SUCCESS)
890 		return STATUS_FAIL;
891 
892 	if (CHK_MS8BIT(ms_card))
893 		data[0] = PARALLEL_8BIT_IF;
894 	else
895 		data[0] = PARALLEL_4BIT_IF;
896 
897 	data[1] = 0;
898 
899 	data[2] = 0x40;
900 	data[3] = 0;
901 	data[4] = 0;
902 	data[5] = 0;
903 	data[6] = 0;
904 	data[7] = 0;
905 
906 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
907 		retval = ms_write_bytes(chip, PRO_WRITE_REG, 7, NO_WAIT_INT,
908 					data, 8);
909 		if (retval == STATUS_SUCCESS)
910 			break;
911 	}
912 	if (retval != STATUS_SUCCESS)
913 		return STATUS_FAIL;
914 
915 	buf = kmalloc(64 * 512, GFP_KERNEL);
916 	if (!buf)
917 		return STATUS_ERROR;
918 
919 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
920 		retval = ms_send_cmd(chip, PRO_READ_ATRB, WAIT_INT);
921 		if (retval != STATUS_SUCCESS)
922 			continue;
923 
924 		retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
925 		if (retval != STATUS_SUCCESS) {
926 			kfree(buf);
927 			return STATUS_FAIL;
928 		}
929 		if (!(val & MS_INT_BREQ)) {
930 			kfree(buf);
931 			return STATUS_FAIL;
932 		}
933 		retval = ms_transfer_data(chip, MS_TM_AUTO_READ,
934 					  PRO_READ_LONG_DATA, 0x40, WAIT_INT,
935 					  0, 0, buf, 64 * 512);
936 		if (retval == STATUS_SUCCESS)
937 			break;
938 
939 		rtsx_clear_ms_error(chip);
940 	}
941 	if (retval != STATUS_SUCCESS) {
942 		kfree(buf);
943 		return STATUS_FAIL;
944 	}
945 
946 	i = 0;
947 	do {
948 		retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
949 		if (retval != STATUS_SUCCESS) {
950 			kfree(buf);
951 			return STATUS_FAIL;
952 		}
953 
954 		if ((val & MS_INT_CED) || !(val & MS_INT_BREQ))
955 			break;
956 
957 		retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ,
958 					 PRO_READ_LONG_DATA, 0, WAIT_INT);
959 		if (retval != STATUS_SUCCESS) {
960 			kfree(buf);
961 			return STATUS_FAIL;
962 		}
963 
964 		i++;
965 	} while (i < 1024);
966 
967 	if (buf[0] != 0xa5 && buf[1] != 0xc3) {
968 		/* Signature code is wrong */
969 		kfree(buf);
970 		return STATUS_FAIL;
971 	}
972 
973 	if (buf[4] < 1 || buf[4] > 12) {
974 		kfree(buf);
975 		return STATUS_FAIL;
976 	}
977 
978 	for (i = 0; i < buf[4]; i++) {
979 		int cur_addr_off = 16 + i * 12;
980 
981 #ifdef SUPPORT_MSXC
982 		if (buf[cur_addr_off + 8] == 0x10 ||
983 		    buf[cur_addr_off + 8] == 0x13) {
984 #else
985 		if (buf[cur_addr_off + 8] == 0x10) {
986 #endif
987 			sys_info_addr = ((u32)buf[cur_addr_off + 0] << 24) |
988 				((u32)buf[cur_addr_off + 1] << 16) |
989 				((u32)buf[cur_addr_off + 2] << 8) |
990 				buf[cur_addr_off + 3];
991 			sys_info_size = ((u32)buf[cur_addr_off + 4] << 24) |
992 				((u32)buf[cur_addr_off + 5] << 16) |
993 				((u32)buf[cur_addr_off + 6] << 8) |
994 				buf[cur_addr_off + 7];
995 			dev_dbg(rtsx_dev(chip), "sys_info_addr = 0x%x, sys_info_size = 0x%x\n",
996 				sys_info_addr, sys_info_size);
997 			if (sys_info_size != 96)  {
998 				kfree(buf);
999 				return STATUS_FAIL;
1000 			}
1001 			if (sys_info_addr < 0x1A0) {
1002 				kfree(buf);
1003 				return STATUS_FAIL;
1004 			}
1005 			if ((sys_info_size + sys_info_addr) > 0x8000) {
1006 				kfree(buf);
1007 				return STATUS_FAIL;
1008 			}
1009 
1010 #ifdef SUPPORT_MSXC
1011 			if (buf[cur_addr_off + 8] == 0x13)
1012 				ms_card->ms_type |= MS_XC;
1013 #endif
1014 #ifdef SUPPORT_PCGL_1P18
1015 			found_sys_info = 1;
1016 #else
1017 			break;
1018 #endif
1019 		}
1020 #ifdef SUPPORT_PCGL_1P18
1021 		if (buf[cur_addr_off + 8] == 0x15) {
1022 			model_name_addr = ((u32)buf[cur_addr_off + 0] << 24) |
1023 				((u32)buf[cur_addr_off + 1] << 16) |
1024 				((u32)buf[cur_addr_off + 2] << 8) |
1025 				buf[cur_addr_off + 3];
1026 			model_name_size = ((u32)buf[cur_addr_off + 4] << 24) |
1027 				((u32)buf[cur_addr_off + 5] << 16) |
1028 				((u32)buf[cur_addr_off + 6] << 8) |
1029 				buf[cur_addr_off + 7];
1030 			dev_dbg(rtsx_dev(chip), "model_name_addr = 0x%x, model_name_size = 0x%x\n",
1031 				model_name_addr, model_name_size);
1032 			if (model_name_size != 48)  {
1033 				kfree(buf);
1034 				return STATUS_FAIL;
1035 			}
1036 			if (model_name_addr < 0x1A0) {
1037 				kfree(buf);
1038 				return STATUS_FAIL;
1039 			}
1040 			if ((model_name_size + model_name_addr) > 0x8000) {
1041 				kfree(buf);
1042 				return STATUS_FAIL;
1043 			}
1044 
1045 			found_model_name = 1;
1046 		}
1047 
1048 		if (found_sys_info && found_model_name)
1049 			break;
1050 #endif
1051 	}
1052 
1053 	if (i == buf[4]) {
1054 		kfree(buf);
1055 		return STATUS_FAIL;
1056 	}
1057 
1058 	class_code =  buf[sys_info_addr + 0];
1059 	device_type = buf[sys_info_addr + 56];
1060 	sub_class = buf[sys_info_addr + 46];
1061 #ifdef SUPPORT_MSXC
1062 	if (CHK_MSXC(ms_card)) {
1063 		xc_total_blk = ((u32)buf[sys_info_addr + 6] << 24) |
1064 				((u32)buf[sys_info_addr + 7] << 16) |
1065 				((u32)buf[sys_info_addr + 8] << 8) |
1066 				buf[sys_info_addr + 9];
1067 		xc_blk_size = ((u32)buf[sys_info_addr + 32] << 24) |
1068 				((u32)buf[sys_info_addr + 33] << 16) |
1069 				((u32)buf[sys_info_addr + 34] << 8) |
1070 				buf[sys_info_addr + 35];
1071 		dev_dbg(rtsx_dev(chip), "xc_total_blk = 0x%x, xc_blk_size = 0x%x\n",
1072 			xc_total_blk, xc_blk_size);
1073 	} else {
1074 		total_blk = ((u16)buf[sys_info_addr + 6] << 8) |
1075 			buf[sys_info_addr + 7];
1076 		blk_size = ((u16)buf[sys_info_addr + 2] << 8) |
1077 			buf[sys_info_addr + 3];
1078 		dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1079 			total_blk, blk_size);
1080 	}
1081 #else
1082 	total_blk = ((u16)buf[sys_info_addr + 6] << 8) | buf[sys_info_addr + 7];
1083 	blk_size = ((u16)buf[sys_info_addr + 2] << 8) | buf[sys_info_addr + 3];
1084 	dev_dbg(rtsx_dev(chip), "total_blk = 0x%x, blk_size = 0x%x\n",
1085 		total_blk, blk_size);
1086 #endif
1087 
1088 	dev_dbg(rtsx_dev(chip), "class_code = 0x%x, device_type = 0x%x, sub_class = 0x%x\n",
1089 		class_code, device_type, sub_class);
1090 
1091 	memcpy(ms_card->raw_sys_info, buf + sys_info_addr, 96);
1092 #ifdef SUPPORT_PCGL_1P18
1093 	memcpy(ms_card->raw_model_name, buf + model_name_addr, 48);
1094 #endif
1095 
1096 	kfree(buf);
1097 
1098 #ifdef SUPPORT_MSXC
1099 	if (CHK_MSXC(ms_card)) {
1100 		if (class_code != 0x03)
1101 			return STATUS_FAIL;
1102 	} else {
1103 		if (class_code != 0x02)
1104 			return STATUS_FAIL;
1105 	}
1106 #else
1107 	if (class_code != 0x02)
1108 		return STATUS_FAIL;
1109 #endif
1110 
1111 	if (device_type != 0x00) {
1112 		if (device_type == 0x01 || device_type == 0x02 ||
1113 		    device_type == 0x03) {
1114 			chip->card_wp |= MS_CARD;
1115 		} else {
1116 			return STATUS_FAIL;
1117 		}
1118 	}
1119 
1120 	if (sub_class & 0xC0)
1121 		return STATUS_FAIL;
1122 
1123 	dev_dbg(rtsx_dev(chip), "class_code: 0x%x, device_type: 0x%x, sub_class: 0x%x\n",
1124 		class_code, device_type, sub_class);
1125 
1126 #ifdef SUPPORT_MSXC
1127 	if (CHK_MSXC(ms_card)) {
1128 		chip->capacity[chip->card2lun[MS_CARD]] =
1129 			ms_card->capacity = xc_total_blk * xc_blk_size;
1130 	} else {
1131 		chip->capacity[chip->card2lun[MS_CARD]] =
1132 			ms_card->capacity = total_blk * blk_size;
1133 	}
1134 #else
1135 	ms_card->capacity = total_blk * blk_size;
1136 	chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
1137 #endif
1138 
1139 	return STATUS_SUCCESS;
1140 }
1141 
1142 #ifdef SUPPORT_MAGIC_GATE
1143 static int mg_set_tpc_para_sub(struct rtsx_chip *chip,
1144 			       int type, u8 mg_entry_num);
1145 #endif
1146 
1147 static int reset_ms_pro(struct rtsx_chip *chip)
1148 {
1149 	struct ms_info *ms_card = &chip->ms_card;
1150 	int retval;
1151 #ifdef XC_POWERCLASS
1152 	u8 change_power_class;
1153 
1154 	if (chip->ms_power_class_en & 0x02)
1155 		change_power_class = 2;
1156 	else if (chip->ms_power_class_en & 0x01)
1157 		change_power_class = 1;
1158 	else
1159 		change_power_class = 0;
1160 #endif
1161 
1162 #ifdef XC_POWERCLASS
1163 retry:
1164 #endif
1165 	retval = ms_pro_reset_flow(chip, 1);
1166 	if (retval != STATUS_SUCCESS) {
1167 		if (ms_card->switch_8bit_fail) {
1168 			retval = ms_pro_reset_flow(chip, 0);
1169 			if (retval != STATUS_SUCCESS)
1170 				return STATUS_FAIL;
1171 		} else {
1172 			return STATUS_FAIL;
1173 		}
1174 	}
1175 
1176 	retval = ms_read_attribute_info(chip);
1177 	if (retval != STATUS_SUCCESS)
1178 		return STATUS_FAIL;
1179 
1180 #ifdef XC_POWERCLASS
1181 	if (CHK_HG8BIT(ms_card))
1182 		change_power_class = 0;
1183 
1184 	if (change_power_class && CHK_MSXC(ms_card)) {
1185 		u8 power_class_en = chip->ms_power_class_en;
1186 
1187 		dev_dbg(rtsx_dev(chip), "power_class_en = 0x%x\n",
1188 			power_class_en);
1189 		dev_dbg(rtsx_dev(chip), "change_power_class = %d\n",
1190 			change_power_class);
1191 
1192 		if (change_power_class)
1193 			power_class_en &= (1 << (change_power_class - 1));
1194 		else
1195 			power_class_en = 0;
1196 
1197 		if (power_class_en) {
1198 			u8 power_class_mode =
1199 				(ms_card->raw_sys_info[46] & 0x18) >> 3;
1200 			dev_dbg(rtsx_dev(chip), "power_class_mode = 0x%x",
1201 				power_class_mode);
1202 			if (change_power_class > power_class_mode)
1203 				change_power_class = power_class_mode;
1204 			if (change_power_class) {
1205 				retval = msxc_change_power(chip,
1206 							   change_power_class);
1207 				if (retval != STATUS_SUCCESS) {
1208 					change_power_class--;
1209 					goto retry;
1210 				}
1211 			}
1212 		}
1213 	}
1214 #endif
1215 
1216 #ifdef SUPPORT_MAGIC_GATE
1217 	retval = mg_set_tpc_para_sub(chip, 0, 0);
1218 	if (retval != STATUS_SUCCESS)
1219 		return STATUS_FAIL;
1220 #endif
1221 
1222 	if (CHK_HG8BIT(ms_card))
1223 		chip->card_bus_width[chip->card2lun[MS_CARD]] = 8;
1224 	else
1225 		chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
1226 
1227 	return STATUS_SUCCESS;
1228 }
1229 
1230 static int ms_read_status_reg(struct rtsx_chip *chip)
1231 {
1232 	int retval;
1233 	u8 val[2];
1234 
1235 	retval = ms_set_rw_reg_addr(chip, STATUS_REG0, 2, 0, 0);
1236 	if (retval != STATUS_SUCCESS)
1237 		return STATUS_FAIL;
1238 
1239 	retval = ms_read_bytes(chip, READ_REG, 2, NO_WAIT_INT, val, 2);
1240 	if (retval != STATUS_SUCCESS)
1241 		return STATUS_FAIL;
1242 
1243 	if (val[1] & (STS_UCDT | STS_UCEX | STS_UCFG)) {
1244 		ms_set_err_code(chip, MS_FLASH_READ_ERROR);
1245 		return STATUS_FAIL;
1246 	}
1247 
1248 	return STATUS_SUCCESS;
1249 }
1250 
1251 static int ms_read_extra_data(struct rtsx_chip *chip,
1252 			      u16 block_addr, u8 page_num, u8 *buf, int buf_len)
1253 {
1254 	struct ms_info *ms_card = &chip->ms_card;
1255 	int retval, i;
1256 	u8 val, data[10];
1257 
1258 	retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1259 				    SYSTEM_PARAM, 6);
1260 	if (retval != STATUS_SUCCESS)
1261 		return STATUS_FAIL;
1262 
1263 	if (CHK_MS4BIT(ms_card)) {
1264 		/* Parallel interface */
1265 		data[0] = 0x88;
1266 	} else {
1267 		/* Serial interface */
1268 		data[0] = 0x80;
1269 	}
1270 	data[1] = 0;
1271 	data[2] = (u8)(block_addr >> 8);
1272 	data[3] = (u8)block_addr;
1273 	data[4] = 0x40;
1274 	data[5] = page_num;
1275 
1276 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1277 		retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1278 					data, 6);
1279 		if (retval == STATUS_SUCCESS)
1280 			break;
1281 	}
1282 	if (i == MS_MAX_RETRY_COUNT)
1283 		return STATUS_FAIL;
1284 
1285 	ms_set_err_code(chip, MS_NO_ERROR);
1286 
1287 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
1288 		retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1289 		if (retval == STATUS_SUCCESS)
1290 			break;
1291 	}
1292 	if (i == MS_MAX_RETRY_COUNT)
1293 		return STATUS_FAIL;
1294 
1295 	ms_set_err_code(chip, MS_NO_ERROR);
1296 	retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1297 	if (retval != STATUS_SUCCESS)
1298 		return STATUS_FAIL;
1299 
1300 	if (val & INT_REG_CMDNK) {
1301 		ms_set_err_code(chip, MS_CMD_NK);
1302 		return STATUS_FAIL;
1303 	}
1304 	if (val & INT_REG_CED) {
1305 		if (val & INT_REG_ERR) {
1306 			retval = ms_read_status_reg(chip);
1307 			if (retval != STATUS_SUCCESS)
1308 				return STATUS_FAIL;
1309 
1310 			retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1311 						    MS_EXTRA_SIZE, SYSTEM_PARAM,
1312 						    6);
1313 			if (retval != STATUS_SUCCESS)
1314 				return STATUS_FAIL;
1315 		}
1316 	}
1317 
1318 	retval = ms_read_bytes(chip, READ_REG, MS_EXTRA_SIZE, NO_WAIT_INT,
1319 			       data, MS_EXTRA_SIZE);
1320 	if (retval != STATUS_SUCCESS)
1321 		return STATUS_FAIL;
1322 
1323 	if (buf && buf_len) {
1324 		if (buf_len > MS_EXTRA_SIZE)
1325 			buf_len = MS_EXTRA_SIZE;
1326 		memcpy(buf, data, buf_len);
1327 	}
1328 
1329 	return STATUS_SUCCESS;
1330 }
1331 
1332 static int ms_write_extra_data(struct rtsx_chip *chip, u16 block_addr,
1333 			       u8 page_num, u8 *buf, int buf_len)
1334 {
1335 	struct ms_info *ms_card = &chip->ms_card;
1336 	int retval, i;
1337 	u8 val, data[16];
1338 
1339 	if (!buf || buf_len < MS_EXTRA_SIZE)
1340 		return STATUS_FAIL;
1341 
1342 	retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1343 				    SYSTEM_PARAM, 6 + MS_EXTRA_SIZE);
1344 	if (retval != STATUS_SUCCESS)
1345 		return STATUS_FAIL;
1346 
1347 	if (CHK_MS4BIT(ms_card))
1348 		data[0] = 0x88;
1349 	else
1350 		data[0] = 0x80;
1351 
1352 	data[1] = 0;
1353 	data[2] = (u8)(block_addr >> 8);
1354 	data[3] = (u8)block_addr;
1355 	data[4] = 0x40;
1356 	data[5] = page_num;
1357 
1358 	for (i = 6; i < MS_EXTRA_SIZE + 6; i++)
1359 		data[i] = buf[i - 6];
1360 
1361 	retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1362 				NO_WAIT_INT, data, 16);
1363 	if (retval != STATUS_SUCCESS)
1364 		return STATUS_FAIL;
1365 
1366 	retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1367 	if (retval != STATUS_SUCCESS)
1368 		return STATUS_FAIL;
1369 
1370 	ms_set_err_code(chip, MS_NO_ERROR);
1371 	retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1372 	if (retval != STATUS_SUCCESS)
1373 		return STATUS_FAIL;
1374 
1375 	if (val & INT_REG_CMDNK) {
1376 		ms_set_err_code(chip, MS_CMD_NK);
1377 		return STATUS_FAIL;
1378 	}
1379 	if (val & INT_REG_CED) {
1380 		if (val & INT_REG_ERR) {
1381 			ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1382 			return STATUS_FAIL;
1383 		}
1384 	}
1385 
1386 	return STATUS_SUCCESS;
1387 }
1388 
1389 static int ms_read_page(struct rtsx_chip *chip, u16 block_addr, u8 page_num)
1390 {
1391 	struct ms_info *ms_card = &chip->ms_card;
1392 	int retval;
1393 	u8 val, data[6];
1394 
1395 	retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1396 				    SYSTEM_PARAM, 6);
1397 	if (retval != STATUS_SUCCESS)
1398 		return STATUS_FAIL;
1399 
1400 	if (CHK_MS4BIT(ms_card))
1401 		data[0] = 0x88;
1402 	else
1403 		data[0] = 0x80;
1404 
1405 	data[1] = 0;
1406 	data[2] = (u8)(block_addr >> 8);
1407 	data[3] = (u8)block_addr;
1408 	data[4] = 0x20;
1409 	data[5] = page_num;
1410 
1411 	retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1412 	if (retval != STATUS_SUCCESS)
1413 		return STATUS_FAIL;
1414 
1415 	retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1416 	if (retval != STATUS_SUCCESS)
1417 		return STATUS_FAIL;
1418 
1419 	ms_set_err_code(chip, MS_NO_ERROR);
1420 	retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1421 	if (retval != STATUS_SUCCESS)
1422 		return STATUS_FAIL;
1423 
1424 	if (val & INT_REG_CMDNK) {
1425 		ms_set_err_code(chip, MS_CMD_NK);
1426 		return STATUS_FAIL;
1427 	}
1428 
1429 	if (val & INT_REG_CED) {
1430 		if (val & INT_REG_ERR) {
1431 			if (!(val & INT_REG_BREQ)) {
1432 				ms_set_err_code(chip,  MS_FLASH_READ_ERROR);
1433 				return STATUS_FAIL;
1434 			}
1435 			retval = ms_read_status_reg(chip);
1436 			if (retval != STATUS_SUCCESS)
1437 				ms_set_err_code(chip,  MS_FLASH_WRITE_ERROR);
1438 
1439 		} else {
1440 			if (!(val & INT_REG_BREQ)) {
1441 				ms_set_err_code(chip, MS_BREQ_ERROR);
1442 				return STATUS_FAIL;
1443 			}
1444 		}
1445 	}
1446 
1447 	retval = ms_transfer_tpc(chip, MS_TM_NORMAL_READ, READ_PAGE_DATA,
1448 				 0, NO_WAIT_INT);
1449 	if (retval != STATUS_SUCCESS)
1450 		return STATUS_FAIL;
1451 
1452 	if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR))
1453 		return STATUS_FAIL;
1454 
1455 	return STATUS_SUCCESS;
1456 }
1457 
1458 static int ms_set_bad_block(struct rtsx_chip *chip, u16 phy_blk)
1459 {
1460 	struct ms_info *ms_card = &chip->ms_card;
1461 	int retval;
1462 	u8 val, data[8], extra[MS_EXTRA_SIZE];
1463 
1464 	retval = ms_read_extra_data(chip, phy_blk, 0, extra, MS_EXTRA_SIZE);
1465 	if (retval != STATUS_SUCCESS)
1466 		return STATUS_FAIL;
1467 
1468 	retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1469 				    SYSTEM_PARAM, 7);
1470 	if (retval != STATUS_SUCCESS)
1471 		return STATUS_FAIL;
1472 
1473 	ms_set_err_code(chip, MS_NO_ERROR);
1474 
1475 	if (CHK_MS4BIT(ms_card))
1476 		data[0] = 0x88;
1477 	else
1478 		data[0] = 0x80;
1479 
1480 	data[1] = 0;
1481 	data[2] = (u8)(phy_blk >> 8);
1482 	data[3] = (u8)phy_blk;
1483 	data[4] = 0x80;
1484 	data[5] = 0;
1485 	data[6] = extra[0] & 0x7F;
1486 	data[7] = 0xFF;
1487 
1488 	retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT, data, 7);
1489 	if (retval != STATUS_SUCCESS)
1490 		return STATUS_FAIL;
1491 
1492 	retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1493 	if (retval != STATUS_SUCCESS)
1494 		return STATUS_FAIL;
1495 
1496 	ms_set_err_code(chip, MS_NO_ERROR);
1497 	retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1498 	if (retval != STATUS_SUCCESS)
1499 		return STATUS_FAIL;
1500 
1501 	if (val & INT_REG_CMDNK) {
1502 		ms_set_err_code(chip, MS_CMD_NK);
1503 		return STATUS_FAIL;
1504 	}
1505 
1506 	if (val & INT_REG_CED) {
1507 		if (val & INT_REG_ERR) {
1508 			ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1509 			return STATUS_FAIL;
1510 		}
1511 	}
1512 
1513 	return STATUS_SUCCESS;
1514 }
1515 
1516 static int ms_erase_block(struct rtsx_chip *chip, u16 phy_blk)
1517 {
1518 	struct ms_info *ms_card = &chip->ms_card;
1519 	int retval, i = 0;
1520 	u8 val, data[6];
1521 
1522 	retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1523 				    SYSTEM_PARAM, 6);
1524 	if (retval != STATUS_SUCCESS)
1525 		return STATUS_FAIL;
1526 
1527 	ms_set_err_code(chip, MS_NO_ERROR);
1528 
1529 	if (CHK_MS4BIT(ms_card))
1530 		data[0] = 0x88;
1531 	else
1532 		data[0] = 0x80;
1533 
1534 	data[1] = 0;
1535 	data[2] = (u8)(phy_blk >> 8);
1536 	data[3] = (u8)phy_blk;
1537 	data[4] = 0;
1538 	data[5] = 0;
1539 
1540 	retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT, data, 6);
1541 	if (retval != STATUS_SUCCESS)
1542 		return STATUS_FAIL;
1543 
1544 ERASE_RTY:
1545 	retval = ms_send_cmd(chip, BLOCK_ERASE, WAIT_INT);
1546 	if (retval != STATUS_SUCCESS)
1547 		return STATUS_FAIL;
1548 
1549 	ms_set_err_code(chip, MS_NO_ERROR);
1550 	retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1551 	if (retval != STATUS_SUCCESS)
1552 		return STATUS_FAIL;
1553 
1554 	if (val & INT_REG_CMDNK) {
1555 		if (i < 3) {
1556 			i++;
1557 			goto ERASE_RTY;
1558 		}
1559 
1560 		ms_set_err_code(chip, MS_CMD_NK);
1561 		ms_set_bad_block(chip, phy_blk);
1562 		return STATUS_FAIL;
1563 	}
1564 
1565 	if (val & INT_REG_CED) {
1566 		if (val & INT_REG_ERR) {
1567 			ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1568 			return STATUS_FAIL;
1569 		}
1570 	}
1571 
1572 	return STATUS_SUCCESS;
1573 }
1574 
1575 static void ms_set_page_status(u16 log_blk, u8 type, u8 *extra, int extra_len)
1576 {
1577 	if (!extra || extra_len < MS_EXTRA_SIZE)
1578 		return;
1579 
1580 	memset(extra, 0xFF, MS_EXTRA_SIZE);
1581 
1582 	if (type == set_PS_NG) {
1583 		/* set page status as 1:NG,and block status keep 1:OK */
1584 		extra[0] = 0xB8;
1585 	} else {
1586 		/* set page status as 0:Data Error,and block status keep 1:OK */
1587 		extra[0] = 0x98;
1588 	}
1589 
1590 	extra[2] = (u8)(log_blk >> 8);
1591 	extra[3] = (u8)log_blk;
1592 }
1593 
1594 static int ms_init_page(struct rtsx_chip *chip, u16 phy_blk, u16 log_blk,
1595 			u8 start_page, u8 end_page)
1596 {
1597 	int retval;
1598 	u8 extra[MS_EXTRA_SIZE], i;
1599 
1600 	memset(extra, 0xff, MS_EXTRA_SIZE);
1601 
1602 	extra[0] = 0xf8;	/* Block, page OK, data erased */
1603 	extra[1] = 0xff;
1604 	extra[2] = (u8)(log_blk >> 8);
1605 	extra[3] = (u8)log_blk;
1606 
1607 	for (i = start_page; i < end_page; i++) {
1608 		if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1609 			ms_set_err_code(chip, MS_NO_CARD);
1610 			return STATUS_FAIL;
1611 		}
1612 
1613 		retval = ms_write_extra_data(chip, phy_blk, i,
1614 					     extra, MS_EXTRA_SIZE);
1615 		if (retval != STATUS_SUCCESS)
1616 			return STATUS_FAIL;
1617 	}
1618 
1619 	return STATUS_SUCCESS;
1620 }
1621 
1622 static int ms_copy_page(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
1623 			u16 log_blk, u8 start_page, u8 end_page)
1624 {
1625 	struct ms_info *ms_card = &chip->ms_card;
1626 	bool uncorrect_flag = false;
1627 	int retval, rty_cnt;
1628 	u8 extra[MS_EXTRA_SIZE], val, i, j, data[16];
1629 
1630 	dev_dbg(rtsx_dev(chip), "Copy page from 0x%x to 0x%x, logical block is 0x%x\n",
1631 		old_blk, new_blk, log_blk);
1632 	dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d\n",
1633 		start_page, end_page);
1634 
1635 	retval = ms_read_extra_data(chip, new_blk, 0, extra, MS_EXTRA_SIZE);
1636 	if (retval != STATUS_SUCCESS)
1637 		return STATUS_FAIL;
1638 
1639 	retval = ms_read_status_reg(chip);
1640 	if (retval != STATUS_SUCCESS)
1641 		return STATUS_FAIL;
1642 
1643 	retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1644 	if (retval)
1645 		return retval;
1646 
1647 	if (val & BUF_FULL) {
1648 		retval = ms_send_cmd(chip, CLEAR_BUF, WAIT_INT);
1649 		if (retval != STATUS_SUCCESS)
1650 			return STATUS_FAIL;
1651 
1652 		retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1653 		if (retval != STATUS_SUCCESS)
1654 			return STATUS_FAIL;
1655 
1656 		if (!(val & INT_REG_CED)) {
1657 			ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1658 			return STATUS_FAIL;
1659 		}
1660 	}
1661 
1662 	for (i = start_page; i < end_page; i++) {
1663 		if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1664 			ms_set_err_code(chip, MS_NO_CARD);
1665 			return STATUS_FAIL;
1666 		}
1667 
1668 		retval = ms_read_extra_data(chip, old_blk, i, extra,
1669 					    MS_EXTRA_SIZE);
1670 		if (retval != STATUS_SUCCESS)
1671 			return STATUS_FAIL;
1672 
1673 		retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1674 					    MS_EXTRA_SIZE, SYSTEM_PARAM, 6);
1675 		if (retval != STATUS_SUCCESS)
1676 			return STATUS_FAIL;
1677 
1678 		ms_set_err_code(chip, MS_NO_ERROR);
1679 
1680 		if (CHK_MS4BIT(ms_card))
1681 			data[0] = 0x88;
1682 		else
1683 			data[0] = 0x80;
1684 
1685 		data[1] = 0;
1686 		data[2] = (u8)(old_blk >> 8);
1687 		data[3] = (u8)old_blk;
1688 		data[4] = 0x20;
1689 		data[5] = i;
1690 
1691 		retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
1692 					data, 6);
1693 		if (retval != STATUS_SUCCESS)
1694 			return STATUS_FAIL;
1695 
1696 		retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
1697 		if (retval != STATUS_SUCCESS)
1698 			return STATUS_FAIL;
1699 
1700 		ms_set_err_code(chip, MS_NO_ERROR);
1701 		retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1702 		if (retval != STATUS_SUCCESS)
1703 			return STATUS_FAIL;
1704 
1705 		if (val & INT_REG_CMDNK) {
1706 			ms_set_err_code(chip, MS_CMD_NK);
1707 			return STATUS_FAIL;
1708 		}
1709 
1710 		if (val & INT_REG_CED) {
1711 			if (val & INT_REG_ERR) {
1712 				retval = ms_read_status_reg(chip);
1713 				if (retval != STATUS_SUCCESS) {
1714 					uncorrect_flag = true;
1715 					dev_dbg(rtsx_dev(chip), "Uncorrectable error\n");
1716 				} else {
1717 					uncorrect_flag = false;
1718 				}
1719 
1720 				retval = ms_transfer_tpc(chip,
1721 							 MS_TM_NORMAL_READ,
1722 							 READ_PAGE_DATA,
1723 							 0, NO_WAIT_INT);
1724 				if (retval != STATUS_SUCCESS)
1725 					return STATUS_FAIL;
1726 
1727 				if (uncorrect_flag) {
1728 					ms_set_page_status(log_blk, set_PS_NG,
1729 							   extra,
1730 							   MS_EXTRA_SIZE);
1731 					if (i == 0)
1732 						extra[0] &= 0xEF;
1733 
1734 					ms_write_extra_data(chip, old_blk, i,
1735 							    extra,
1736 							    MS_EXTRA_SIZE);
1737 					dev_dbg(rtsx_dev(chip), "page %d : extra[0] = 0x%x\n",
1738 						i, extra[0]);
1739 					MS_SET_BAD_BLOCK_FLG(ms_card);
1740 
1741 					ms_set_page_status(log_blk,
1742 							   set_PS_error, extra,
1743 							   MS_EXTRA_SIZE);
1744 					ms_write_extra_data(chip, new_blk, i,
1745 							    extra,
1746 							    MS_EXTRA_SIZE);
1747 					continue;
1748 				}
1749 
1750 				for (rty_cnt = 0; rty_cnt < MS_MAX_RETRY_COUNT;
1751 				     rty_cnt++) {
1752 					retval = ms_transfer_tpc(chip,
1753 								 MS_TM_NORMAL_WRITE,
1754 								 WRITE_PAGE_DATA,
1755 								 0, NO_WAIT_INT);
1756 					if (retval == STATUS_SUCCESS)
1757 						break;
1758 				}
1759 				if (rty_cnt == MS_MAX_RETRY_COUNT)
1760 					return STATUS_FAIL;
1761 			}
1762 
1763 			if (!(val & INT_REG_BREQ)) {
1764 				ms_set_err_code(chip, MS_BREQ_ERROR);
1765 				return STATUS_FAIL;
1766 			}
1767 		}
1768 
1769 		retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
1770 					    SYSTEM_PARAM, (6 + MS_EXTRA_SIZE));
1771 		if (retval != STATUS_SUCCESS)
1772 			return STATUS_FAIL;
1773 
1774 		ms_set_err_code(chip, MS_NO_ERROR);
1775 
1776 		if (CHK_MS4BIT(ms_card))
1777 			data[0] = 0x88;
1778 		else
1779 			data[0] = 0x80;
1780 
1781 		data[1] = 0;
1782 		data[2] = (u8)(new_blk >> 8);
1783 		data[3] = (u8)new_blk;
1784 		data[4] = 0x20;
1785 		data[5] = i;
1786 
1787 		if ((extra[0] & 0x60) != 0x60)
1788 			data[6] = extra[0];
1789 		else
1790 			data[6] = 0xF8;
1791 
1792 		data[6 + 1] = 0xFF;
1793 		data[6 + 2] = (u8)(log_blk >> 8);
1794 		data[6 + 3] = (u8)log_blk;
1795 
1796 		for (j = 4; j <= MS_EXTRA_SIZE; j++)
1797 			data[6 + j] = 0xFF;
1798 
1799 		retval = ms_write_bytes(chip, WRITE_REG, (6 + MS_EXTRA_SIZE),
1800 					NO_WAIT_INT, data, 16);
1801 		if (retval != STATUS_SUCCESS)
1802 			return STATUS_FAIL;
1803 
1804 		retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1805 		if (retval != STATUS_SUCCESS)
1806 			return STATUS_FAIL;
1807 
1808 		ms_set_err_code(chip, MS_NO_ERROR);
1809 		retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
1810 		if (retval != STATUS_SUCCESS)
1811 			return STATUS_FAIL;
1812 
1813 		if (val & INT_REG_CMDNK) {
1814 			ms_set_err_code(chip, MS_CMD_NK);
1815 			return STATUS_FAIL;
1816 		}
1817 
1818 		if (val & INT_REG_CED) {
1819 			if (val & INT_REG_ERR) {
1820 				ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
1821 				return STATUS_FAIL;
1822 			}
1823 		}
1824 
1825 		if (i == 0) {
1826 			retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG,
1827 						    MS_EXTRA_SIZE, SYSTEM_PARAM,
1828 						    7);
1829 			if (retval != STATUS_SUCCESS)
1830 				return STATUS_FAIL;
1831 
1832 			ms_set_err_code(chip, MS_NO_ERROR);
1833 
1834 			if (CHK_MS4BIT(ms_card))
1835 				data[0] = 0x88;
1836 			else
1837 				data[0] = 0x80;
1838 
1839 			data[1] = 0;
1840 			data[2] = (u8)(old_blk >> 8);
1841 			data[3] = (u8)old_blk;
1842 			data[4] = 0x80;
1843 			data[5] = 0;
1844 			data[6] = 0xEF;
1845 			data[7] = 0xFF;
1846 
1847 			retval = ms_write_bytes(chip, WRITE_REG, 7,
1848 						NO_WAIT_INT, data, 8);
1849 			if (retval != STATUS_SUCCESS)
1850 				return STATUS_FAIL;
1851 
1852 			retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
1853 			if (retval != STATUS_SUCCESS)
1854 				return STATUS_FAIL;
1855 
1856 			ms_set_err_code(chip, MS_NO_ERROR);
1857 			retval = ms_read_bytes(chip, GET_INT, 1,
1858 					       NO_WAIT_INT, &val, 1);
1859 			if (retval != STATUS_SUCCESS)
1860 				return STATUS_FAIL;
1861 
1862 			if (val & INT_REG_CMDNK) {
1863 				ms_set_err_code(chip, MS_CMD_NK);
1864 				return STATUS_FAIL;
1865 			}
1866 
1867 			if (val & INT_REG_CED) {
1868 				if (val & INT_REG_ERR) {
1869 					ms_set_err_code(chip,
1870 							MS_FLASH_WRITE_ERROR);
1871 					return STATUS_FAIL;
1872 				}
1873 			}
1874 		}
1875 	}
1876 
1877 	return STATUS_SUCCESS;
1878 }
1879 
1880 static int reset_ms(struct rtsx_chip *chip)
1881 {
1882 	struct ms_info *ms_card = &chip->ms_card;
1883 	int retval;
1884 	u16 i, reg_addr, block_size;
1885 	u8 val, extra[MS_EXTRA_SIZE], j, *ptr;
1886 #ifndef SUPPORT_MAGIC_GATE
1887 	u16 eblock_cnt;
1888 #endif
1889 
1890 	retval = ms_prepare_reset(chip);
1891 	if (retval != STATUS_SUCCESS)
1892 		return STATUS_FAIL;
1893 
1894 	ms_card->ms_type |= TYPE_MS;
1895 
1896 	retval = ms_send_cmd(chip, MS_RESET, NO_WAIT_INT);
1897 	if (retval != STATUS_SUCCESS)
1898 		return STATUS_FAIL;
1899 
1900 	retval = ms_read_status_reg(chip);
1901 	if (retval != STATUS_SUCCESS)
1902 		return STATUS_FAIL;
1903 
1904 	retval = rtsx_read_register(chip, PPBUF_BASE2, &val);
1905 	if (retval)
1906 		return retval;
1907 
1908 	if (val & WRT_PRTCT)
1909 		chip->card_wp |= MS_CARD;
1910 	else
1911 		chip->card_wp &= ~MS_CARD;
1912 
1913 	i = 0;
1914 
1915 RE_SEARCH:
1916 	/* Search Boot Block */
1917 	while (i < (MAX_DEFECTIVE_BLOCK + 2)) {
1918 		if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
1919 			ms_set_err_code(chip, MS_NO_CARD);
1920 			return STATUS_FAIL;
1921 		}
1922 
1923 		retval = ms_read_extra_data(chip, i, 0, extra, MS_EXTRA_SIZE);
1924 		if (retval != STATUS_SUCCESS) {
1925 			i++;
1926 			continue;
1927 		}
1928 
1929 		if (extra[0] & BLOCK_OK) {
1930 			if (!(extra[1] & NOT_BOOT_BLOCK)) {
1931 				ms_card->boot_block = i;
1932 				break;
1933 			}
1934 		}
1935 		i++;
1936 	}
1937 
1938 	if (i == (MAX_DEFECTIVE_BLOCK + 2)) {
1939 		dev_dbg(rtsx_dev(chip), "No boot block found!");
1940 		return STATUS_FAIL;
1941 	}
1942 
1943 	for (j = 0; j < 3; j++) {
1944 		retval = ms_read_page(chip, ms_card->boot_block, j);
1945 		if (retval != STATUS_SUCCESS) {
1946 			if (ms_check_err_code(chip, MS_FLASH_WRITE_ERROR)) {
1947 				i = ms_card->boot_block + 1;
1948 				ms_set_err_code(chip, MS_NO_ERROR);
1949 				goto RE_SEARCH;
1950 			}
1951 		}
1952 	}
1953 
1954 	retval = ms_read_page(chip, ms_card->boot_block, 0);
1955 	if (retval != STATUS_SUCCESS)
1956 		return STATUS_FAIL;
1957 
1958 	/* Read MS system information as sys_info */
1959 	rtsx_init_cmd(chip);
1960 
1961 	for (i = 0; i < 96; i++)
1962 		rtsx_add_cmd(chip, READ_REG_CMD, PPBUF_BASE2 + 0x1A0 + i, 0, 0);
1963 
1964 	retval = rtsx_send_cmd(chip, MS_CARD, 100);
1965 	if (retval < 0)
1966 		return STATUS_FAIL;
1967 
1968 	ptr = rtsx_get_cmd_data(chip);
1969 	memcpy(ms_card->raw_sys_info, ptr, 96);
1970 
1971 	/* Read useful block contents */
1972 	rtsx_init_cmd(chip);
1973 
1974 	rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID0, 0, 0);
1975 	rtsx_add_cmd(chip, READ_REG_CMD, HEADER_ID1, 0, 0);
1976 
1977 	for (reg_addr = DISABLED_BLOCK0; reg_addr <= DISABLED_BLOCK3;
1978 	     reg_addr++)
1979 		rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1980 
1981 	for (reg_addr = BLOCK_SIZE_0; reg_addr <= PAGE_SIZE_1; reg_addr++)
1982 		rtsx_add_cmd(chip, READ_REG_CMD, reg_addr, 0, 0);
1983 
1984 	rtsx_add_cmd(chip, READ_REG_CMD, MS_device_type, 0, 0);
1985 	rtsx_add_cmd(chip, READ_REG_CMD, MS_4bit_support, 0, 0);
1986 
1987 	retval = rtsx_send_cmd(chip, MS_CARD, 100);
1988 	if (retval < 0)
1989 		return STATUS_FAIL;
1990 
1991 	ptr = rtsx_get_cmd_data(chip);
1992 
1993 	dev_dbg(rtsx_dev(chip), "Boot block data:\n");
1994 	dev_dbg(rtsx_dev(chip), "%*ph\n", 16, ptr);
1995 
1996 	/* Block ID error
1997 	 * HEADER_ID0, HEADER_ID1
1998 	 */
1999 	if (ptr[0] != 0x00 || ptr[1] != 0x01) {
2000 		i = ms_card->boot_block + 1;
2001 		goto RE_SEARCH;
2002 	}
2003 
2004 	/* Page size error
2005 	 * PAGE_SIZE_0, PAGE_SIZE_1
2006 	 */
2007 	if (ptr[12] != 0x02 || ptr[13] != 0x00) {
2008 		i = ms_card->boot_block + 1;
2009 		goto RE_SEARCH;
2010 	}
2011 
2012 	if (ptr[14] == 1 || ptr[14] == 3)
2013 		chip->card_wp |= MS_CARD;
2014 
2015 	/* BLOCK_SIZE_0, BLOCK_SIZE_1 */
2016 	block_size = ((u16)ptr[6] << 8) | ptr[7];
2017 	if (block_size == 0x0010) {
2018 		/* Block size 16KB */
2019 		ms_card->block_shift = 5;
2020 		ms_card->page_off = 0x1F;
2021 	} else if (block_size == 0x0008) {
2022 		/* Block size 8KB */
2023 		ms_card->block_shift = 4;
2024 		ms_card->page_off = 0x0F;
2025 	}
2026 
2027 	/* BLOCK_COUNT_0, BLOCK_COUNT_1 */
2028 	ms_card->total_block = ((u16)ptr[8] << 8) | ptr[9];
2029 
2030 #ifdef SUPPORT_MAGIC_GATE
2031 	j = ptr[10];
2032 
2033 	if (ms_card->block_shift == 4)  { /* 4MB or 8MB */
2034 		if (j < 2)  { /* Effective block for 4MB: 0x1F0 */
2035 			ms_card->capacity = 0x1EE0;
2036 		} else { /* Effective block for 8MB: 0x3E0 */
2037 			ms_card->capacity = 0x3DE0;
2038 		}
2039 	} else  { /* 16MB, 32MB, 64MB or 128MB */
2040 		if (j < 5)  { /* Effective block for 16MB: 0x3E0 */
2041 			ms_card->capacity = 0x7BC0;
2042 		} else if (j < 0xA) { /* Effective block for 32MB: 0x7C0 */
2043 			ms_card->capacity = 0xF7C0;
2044 		} else if (j < 0x11) { /* Effective block for 64MB: 0xF80 */
2045 			ms_card->capacity = 0x1EF80;
2046 		} else { /* Effective block for 128MB: 0x1F00 */
2047 			ms_card->capacity = 0x3DF00;
2048 		}
2049 	}
2050 #else
2051 	/* EBLOCK_COUNT_0, EBLOCK_COUNT_1 */
2052 	eblock_cnt = ((u16)ptr[10] << 8) | ptr[11];
2053 
2054 	ms_card->capacity = ((u32)eblock_cnt - 2) << ms_card->block_shift;
2055 #endif
2056 
2057 	chip->capacity[chip->card2lun[MS_CARD]] = ms_card->capacity;
2058 
2059 	/* Switch I/F Mode */
2060 	if (ptr[15]) {
2061 		retval = ms_set_rw_reg_addr(chip, 0, 0, SYSTEM_PARAM, 1);
2062 		if (retval != STATUS_SUCCESS)
2063 			return STATUS_FAIL;
2064 
2065 		retval = rtsx_write_register(chip, PPBUF_BASE2, 0xFF, 0x88);
2066 		if (retval)
2067 			return retval;
2068 
2069 		retval = rtsx_write_register(chip, PPBUF_BASE2 + 1, 0xFF, 0);
2070 		if (retval)
2071 			return retval;
2072 
2073 		retval = ms_transfer_tpc(chip, MS_TM_WRITE_BYTES, WRITE_REG, 1,
2074 					 NO_WAIT_INT);
2075 		if (retval != STATUS_SUCCESS)
2076 			return STATUS_FAIL;
2077 
2078 		retval = rtsx_write_register(chip, MS_CFG,
2079 					     0x58 | MS_NO_CHECK_INT,
2080 					     MS_BUS_WIDTH_4 |
2081 					     PUSH_TIME_ODD |
2082 					     MS_NO_CHECK_INT);
2083 		if (retval)
2084 			return retval;
2085 
2086 		ms_card->ms_type |= MS_4BIT;
2087 	}
2088 
2089 	if (CHK_MS4BIT(ms_card))
2090 		chip->card_bus_width[chip->card2lun[MS_CARD]] = 4;
2091 	else
2092 		chip->card_bus_width[chip->card2lun[MS_CARD]] = 1;
2093 
2094 	return STATUS_SUCCESS;
2095 }
2096 
2097 static int ms_init_l2p_tbl(struct rtsx_chip *chip)
2098 {
2099 	struct ms_info *ms_card = &chip->ms_card;
2100 	int size, i, seg_no, retval;
2101 	u16 defect_block, reg_addr;
2102 	u8 val1, val2;
2103 
2104 	ms_card->segment_cnt = ms_card->total_block >> 9;
2105 	dev_dbg(rtsx_dev(chip), "ms_card->segment_cnt = %d\n",
2106 		ms_card->segment_cnt);
2107 
2108 	size = ms_card->segment_cnt * sizeof(struct zone_entry);
2109 	ms_card->segment = vzalloc(size);
2110 	if (!ms_card->segment)
2111 		return STATUS_FAIL;
2112 
2113 	retval = ms_read_page(chip, ms_card->boot_block, 1);
2114 	if (retval != STATUS_SUCCESS)
2115 		goto INIT_FAIL;
2116 
2117 	reg_addr = PPBUF_BASE2;
2118 	for (i = 0; i < (((ms_card->total_block >> 9) * 10) + 1); i++) {
2119 		int block_no;
2120 
2121 		retval = rtsx_read_register(chip, reg_addr++, &val1);
2122 		if (retval != STATUS_SUCCESS)
2123 			goto INIT_FAIL;
2124 
2125 		retval = rtsx_read_register(chip, reg_addr++, &val2);
2126 		if (retval != STATUS_SUCCESS)
2127 			goto INIT_FAIL;
2128 
2129 		defect_block = ((u16)val1 << 8) | val2;
2130 		if (defect_block == 0xFFFF)
2131 			break;
2132 
2133 		seg_no = defect_block / 512;
2134 
2135 		block_no = ms_card->segment[seg_no].disable_count++;
2136 		ms_card->segment[seg_no].defect_list[block_no] = defect_block;
2137 	}
2138 
2139 	for (i = 0; i < ms_card->segment_cnt; i++) {
2140 		ms_card->segment[i].build_flag = 0;
2141 		ms_card->segment[i].l2p_table = NULL;
2142 		ms_card->segment[i].free_table = NULL;
2143 		ms_card->segment[i].get_index = 0;
2144 		ms_card->segment[i].set_index = 0;
2145 		ms_card->segment[i].unused_blk_cnt = 0;
2146 
2147 		dev_dbg(rtsx_dev(chip), "defective block count of segment %d is %d\n",
2148 			i, ms_card->segment[i].disable_count);
2149 	}
2150 
2151 	return STATUS_SUCCESS;
2152 
2153 INIT_FAIL:
2154 	vfree(ms_card->segment);
2155 	ms_card->segment = NULL;
2156 
2157 	return STATUS_FAIL;
2158 }
2159 
2160 static u16 ms_get_l2p_tbl(struct rtsx_chip *chip, int seg_no, u16 log_off)
2161 {
2162 	struct ms_info *ms_card = &chip->ms_card;
2163 	struct zone_entry *segment;
2164 
2165 	if (!ms_card->segment)
2166 		return 0xFFFF;
2167 
2168 	segment = &ms_card->segment[seg_no];
2169 
2170 	if (segment->l2p_table)
2171 		return segment->l2p_table[log_off];
2172 
2173 	return 0xFFFF;
2174 }
2175 
2176 static void ms_set_l2p_tbl(struct rtsx_chip *chip,
2177 			   int seg_no, u16 log_off, u16 phy_blk)
2178 {
2179 	struct ms_info *ms_card = &chip->ms_card;
2180 	struct zone_entry *segment;
2181 
2182 	if (!ms_card->segment)
2183 		return;
2184 
2185 	segment = &ms_card->segment[seg_no];
2186 	if (segment->l2p_table)
2187 		segment->l2p_table[log_off] = phy_blk;
2188 }
2189 
2190 static void ms_set_unused_block(struct rtsx_chip *chip, u16 phy_blk)
2191 {
2192 	struct ms_info *ms_card = &chip->ms_card;
2193 	struct zone_entry *segment;
2194 	int seg_no;
2195 
2196 	seg_no = (int)phy_blk >> 9;
2197 	segment = &ms_card->segment[seg_no];
2198 
2199 	segment->free_table[segment->set_index++] = phy_blk;
2200 	if (segment->set_index >= MS_FREE_TABLE_CNT)
2201 		segment->set_index = 0;
2202 
2203 	segment->unused_blk_cnt++;
2204 }
2205 
2206 static u16 ms_get_unused_block(struct rtsx_chip *chip, int seg_no)
2207 {
2208 	struct ms_info *ms_card = &chip->ms_card;
2209 	struct zone_entry *segment;
2210 	u16 phy_blk;
2211 
2212 	segment = &ms_card->segment[seg_no];
2213 
2214 	if (segment->unused_blk_cnt <= 0)
2215 		return 0xFFFF;
2216 
2217 	phy_blk = segment->free_table[segment->get_index];
2218 	segment->free_table[segment->get_index++] = 0xFFFF;
2219 	if (segment->get_index >= MS_FREE_TABLE_CNT)
2220 		segment->get_index = 0;
2221 
2222 	segment->unused_blk_cnt--;
2223 
2224 	return phy_blk;
2225 }
2226 
2227 static const unsigned short ms_start_idx[] = {0, 494, 990, 1486, 1982, 2478,
2228 					      2974, 3470, 3966, 4462, 4958,
2229 					      5454, 5950, 6446, 6942, 7438,
2230 					      7934};
2231 
2232 static int ms_arbitrate_l2p(struct rtsx_chip *chip, u16 phy_blk,
2233 			    u16 log_off, u8 us1, u8 us2)
2234 {
2235 	struct ms_info *ms_card = &chip->ms_card;
2236 	struct zone_entry *segment;
2237 	int seg_no;
2238 	u16 tmp_blk;
2239 
2240 	seg_no = (int)phy_blk >> 9;
2241 	segment = &ms_card->segment[seg_no];
2242 	tmp_blk = segment->l2p_table[log_off];
2243 
2244 	if (us1 != us2) {
2245 		if (us1 == 0) {
2246 			if (!(chip->card_wp & MS_CARD))
2247 				ms_erase_block(chip, tmp_blk);
2248 
2249 			ms_set_unused_block(chip, tmp_blk);
2250 			segment->l2p_table[log_off] = phy_blk;
2251 		} else {
2252 			if (!(chip->card_wp & MS_CARD))
2253 				ms_erase_block(chip, phy_blk);
2254 
2255 			ms_set_unused_block(chip, phy_blk);
2256 		}
2257 	} else {
2258 		if (phy_blk < tmp_blk) {
2259 			if (!(chip->card_wp & MS_CARD))
2260 				ms_erase_block(chip, phy_blk);
2261 
2262 			ms_set_unused_block(chip, phy_blk);
2263 		} else {
2264 			if (!(chip->card_wp & MS_CARD))
2265 				ms_erase_block(chip, tmp_blk);
2266 
2267 			ms_set_unused_block(chip, tmp_blk);
2268 			segment->l2p_table[log_off] = phy_blk;
2269 		}
2270 	}
2271 
2272 	return STATUS_SUCCESS;
2273 }
2274 
2275 static int ms_build_l2p_tbl(struct rtsx_chip *chip, int seg_no)
2276 {
2277 	struct ms_info *ms_card = &chip->ms_card;
2278 	struct zone_entry *segment;
2279 	bool defect_flag;
2280 	int retval, table_size, disable_cnt, i;
2281 	u16 start, end, phy_blk, log_blk, tmp_blk, idx;
2282 	u8 extra[MS_EXTRA_SIZE], us1, us2;
2283 
2284 	dev_dbg(rtsx_dev(chip), "%s: %d\n", __func__, seg_no);
2285 
2286 	if (!ms_card->segment) {
2287 		retval = ms_init_l2p_tbl(chip);
2288 		if (retval != STATUS_SUCCESS)
2289 			return retval;
2290 	}
2291 
2292 	if (ms_card->segment[seg_no].build_flag) {
2293 		dev_dbg(rtsx_dev(chip), "l2p table of segment %d has been built\n",
2294 			seg_no);
2295 		return STATUS_SUCCESS;
2296 	}
2297 
2298 	if (seg_no == 0)
2299 		table_size = 494;
2300 	else
2301 		table_size = 496;
2302 
2303 	segment = &ms_card->segment[seg_no];
2304 
2305 	if (!segment->l2p_table) {
2306 		segment->l2p_table = vmalloc(array_size(table_size, 2));
2307 		if (!segment->l2p_table)
2308 			goto BUILD_FAIL;
2309 	}
2310 	memset((u8 *)(segment->l2p_table), 0xff, array_size(table_size, 2));
2311 
2312 	if (!segment->free_table) {
2313 		segment->free_table = vmalloc(array_size(MS_FREE_TABLE_CNT, 2));
2314 		if (!segment->free_table)
2315 			goto BUILD_FAIL;
2316 	}
2317 	memset((u8 *)(segment->free_table), 0xff, array_size(MS_FREE_TABLE_CNT, 2));
2318 
2319 	start = (u16)seg_no << 9;
2320 	end = (u16)(seg_no + 1) << 9;
2321 
2322 	disable_cnt = segment->disable_count;
2323 
2324 	segment->get_index = 0;
2325 	segment->set_index = 0;
2326 	segment->unused_blk_cnt = 0;
2327 
2328 	for (phy_blk = start; phy_blk < end; phy_blk++) {
2329 		if (disable_cnt) {
2330 			defect_flag = false;
2331 			for (i = 0; i < segment->disable_count; i++) {
2332 				if (phy_blk == segment->defect_list[i]) {
2333 					defect_flag = true;
2334 					break;
2335 				}
2336 			}
2337 			if (defect_flag) {
2338 				disable_cnt--;
2339 				continue;
2340 			}
2341 		}
2342 
2343 		retval = ms_read_extra_data(chip, phy_blk, 0,
2344 					    extra, MS_EXTRA_SIZE);
2345 		if (retval != STATUS_SUCCESS) {
2346 			dev_dbg(rtsx_dev(chip), "read extra data fail\n");
2347 			ms_set_bad_block(chip, phy_blk);
2348 			continue;
2349 		}
2350 
2351 		if (seg_no == ms_card->segment_cnt - 1) {
2352 			if (!(extra[1] & NOT_TRANSLATION_TABLE)) {
2353 				if (!(chip->card_wp & MS_CARD)) {
2354 					retval = ms_erase_block(chip, phy_blk);
2355 					if (retval != STATUS_SUCCESS)
2356 						continue;
2357 					extra[2] = 0xff;
2358 					extra[3] = 0xff;
2359 				}
2360 			}
2361 		}
2362 
2363 		if (!(extra[0] & BLOCK_OK))
2364 			continue;
2365 		if (!(extra[1] & NOT_BOOT_BLOCK))
2366 			continue;
2367 		if ((extra[0] & PAGE_OK) != PAGE_OK)
2368 			continue;
2369 
2370 		log_blk = ((u16)extra[2] << 8) | extra[3];
2371 
2372 		if (log_blk == 0xFFFF) {
2373 			if (!(chip->card_wp & MS_CARD)) {
2374 				retval = ms_erase_block(chip, phy_blk);
2375 				if (retval != STATUS_SUCCESS)
2376 					continue;
2377 			}
2378 			ms_set_unused_block(chip, phy_blk);
2379 			continue;
2380 		}
2381 
2382 		if (log_blk < ms_start_idx[seg_no] ||
2383 		    log_blk >= ms_start_idx[seg_no + 1]) {
2384 			if (!(chip->card_wp & MS_CARD)) {
2385 				retval = ms_erase_block(chip, phy_blk);
2386 				if (retval != STATUS_SUCCESS)
2387 					continue;
2388 			}
2389 			ms_set_unused_block(chip, phy_blk);
2390 			continue;
2391 		}
2392 
2393 		idx = log_blk - ms_start_idx[seg_no];
2394 
2395 		if (segment->l2p_table[idx] == 0xFFFF) {
2396 			segment->l2p_table[idx] = phy_blk;
2397 			continue;
2398 		}
2399 
2400 		us1 = extra[0] & 0x10;
2401 		tmp_blk = segment->l2p_table[idx];
2402 		retval = ms_read_extra_data(chip, tmp_blk, 0,
2403 					    extra, MS_EXTRA_SIZE);
2404 		if (retval != STATUS_SUCCESS)
2405 			continue;
2406 		us2 = extra[0] & 0x10;
2407 
2408 		(void)ms_arbitrate_l2p(chip, phy_blk,
2409 				log_blk - ms_start_idx[seg_no], us1, us2);
2410 	}
2411 
2412 	segment->build_flag = 1;
2413 
2414 	dev_dbg(rtsx_dev(chip), "unused block count: %d\n",
2415 		segment->unused_blk_cnt);
2416 
2417 	/* Logical Address Confirmation Process */
2418 	if (seg_no == ms_card->segment_cnt - 1) {
2419 		if (segment->unused_blk_cnt < 2)
2420 			chip->card_wp |= MS_CARD;
2421 	} else {
2422 		if (segment->unused_blk_cnt < 1)
2423 			chip->card_wp |= MS_CARD;
2424 	}
2425 
2426 	if (chip->card_wp & MS_CARD)
2427 		return STATUS_SUCCESS;
2428 
2429 	for (log_blk = ms_start_idx[seg_no];
2430 	     log_blk < ms_start_idx[seg_no + 1]; log_blk++) {
2431 		idx = log_blk - ms_start_idx[seg_no];
2432 		if (segment->l2p_table[idx] == 0xFFFF) {
2433 			phy_blk = ms_get_unused_block(chip, seg_no);
2434 			if (phy_blk == 0xFFFF) {
2435 				chip->card_wp |= MS_CARD;
2436 				return STATUS_SUCCESS;
2437 			}
2438 			retval = ms_init_page(chip, phy_blk, log_blk, 0, 1);
2439 			if (retval != STATUS_SUCCESS)
2440 				goto BUILD_FAIL;
2441 
2442 			segment->l2p_table[idx] = phy_blk;
2443 			if (seg_no == ms_card->segment_cnt - 1) {
2444 				if (segment->unused_blk_cnt < 2) {
2445 					chip->card_wp |= MS_CARD;
2446 					return STATUS_SUCCESS;
2447 				}
2448 			} else {
2449 				if (segment->unused_blk_cnt < 1) {
2450 					chip->card_wp |= MS_CARD;
2451 					return STATUS_SUCCESS;
2452 				}
2453 			}
2454 		}
2455 	}
2456 
2457 	/* Make boot block be the first normal block */
2458 	if (seg_no == 0) {
2459 		for (log_blk = 0; log_blk < 494; log_blk++) {
2460 			tmp_blk = segment->l2p_table[log_blk];
2461 			if (tmp_blk < ms_card->boot_block) {
2462 				dev_dbg(rtsx_dev(chip), "Boot block is not the first normal block.\n");
2463 
2464 				if (chip->card_wp & MS_CARD)
2465 					break;
2466 
2467 				phy_blk = ms_get_unused_block(chip, 0);
2468 				retval = ms_copy_page(chip, tmp_blk, phy_blk,
2469 						      log_blk, 0,
2470 						      ms_card->page_off + 1);
2471 				if (retval != STATUS_SUCCESS)
2472 					return STATUS_FAIL;
2473 
2474 				segment->l2p_table[log_blk] = phy_blk;
2475 
2476 				retval = ms_set_bad_block(chip, tmp_blk);
2477 				if (retval != STATUS_SUCCESS)
2478 					return STATUS_FAIL;
2479 			}
2480 		}
2481 	}
2482 
2483 	return STATUS_SUCCESS;
2484 
2485 BUILD_FAIL:
2486 	segment->build_flag = 0;
2487 	vfree(segment->l2p_table);
2488 	segment->l2p_table = NULL;
2489 	vfree(segment->free_table);
2490 	segment->free_table = NULL;
2491 
2492 	return STATUS_FAIL;
2493 }
2494 
2495 int reset_ms_card(struct rtsx_chip *chip)
2496 {
2497 	struct ms_info *ms_card = &chip->ms_card;
2498 	int seg_no = ms_card->total_block / 512 - 1;
2499 	int retval;
2500 
2501 	memset(ms_card, 0, sizeof(struct ms_info));
2502 
2503 	retval = enable_card_clock(chip, MS_CARD);
2504 	if (retval != STATUS_SUCCESS)
2505 		return STATUS_FAIL;
2506 
2507 	retval = select_card(chip, MS_CARD);
2508 	if (retval != STATUS_SUCCESS)
2509 		return STATUS_FAIL;
2510 
2511 	ms_card->ms_type = 0;
2512 
2513 	retval = reset_ms_pro(chip);
2514 	if (retval != STATUS_SUCCESS) {
2515 		if (ms_card->check_ms_flow) {
2516 			retval = reset_ms(chip);
2517 			if (retval != STATUS_SUCCESS)
2518 				return STATUS_FAIL;
2519 		} else {
2520 			return STATUS_FAIL;
2521 		}
2522 	}
2523 
2524 	retval = ms_set_init_para(chip);
2525 	if (retval != STATUS_SUCCESS)
2526 		return STATUS_FAIL;
2527 
2528 	if (!CHK_MSPRO(ms_card)) {
2529 		/* Build table for the last segment,
2530 		 * to check if L2P table block exists, erasing it
2531 		 */
2532 		retval = ms_build_l2p_tbl(chip, seg_no);
2533 		if (retval != STATUS_SUCCESS)
2534 			return STATUS_FAIL;
2535 	}
2536 
2537 	dev_dbg(rtsx_dev(chip), "ms_card->ms_type = 0x%x\n", ms_card->ms_type);
2538 
2539 	return STATUS_SUCCESS;
2540 }
2541 
2542 static int mspro_set_rw_cmd(struct rtsx_chip *chip,
2543 			    u32 start_sec, u16 sec_cnt, u8 cmd)
2544 {
2545 	int retval, i;
2546 	u8 data[8];
2547 
2548 	data[0] = cmd;
2549 	data[1] = (u8)(sec_cnt >> 8);
2550 	data[2] = (u8)sec_cnt;
2551 	data[3] = (u8)(start_sec >> 24);
2552 	data[4] = (u8)(start_sec >> 16);
2553 	data[5] = (u8)(start_sec >> 8);
2554 	data[6] = (u8)start_sec;
2555 	data[7] = 0;
2556 
2557 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2558 		retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7,
2559 					WAIT_INT, data, 8);
2560 		if (retval == STATUS_SUCCESS)
2561 			break;
2562 	}
2563 	if (i == MS_MAX_RETRY_COUNT)
2564 		return STATUS_FAIL;
2565 
2566 	return STATUS_SUCCESS;
2567 }
2568 
2569 void mspro_stop_seq_mode(struct rtsx_chip *chip)
2570 {
2571 	struct ms_info *ms_card = &chip->ms_card;
2572 	int retval;
2573 
2574 	if (ms_card->seq_mode) {
2575 		retval = ms_switch_clock(chip);
2576 		if (retval != STATUS_SUCCESS)
2577 			return;
2578 
2579 		ms_card->seq_mode = 0;
2580 		ms_card->total_sec_cnt = 0;
2581 		ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2582 
2583 		rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
2584 	}
2585 }
2586 
2587 static inline int ms_auto_tune_clock(struct rtsx_chip *chip)
2588 {
2589 	struct ms_info *ms_card = &chip->ms_card;
2590 	int retval;
2591 
2592 	if (chip->asic_code) {
2593 		if (ms_card->ms_clock > 30)
2594 			ms_card->ms_clock -= 20;
2595 	} else {
2596 		if (ms_card->ms_clock == CLK_80)
2597 			ms_card->ms_clock = CLK_60;
2598 		else if (ms_card->ms_clock == CLK_60)
2599 			ms_card->ms_clock = CLK_40;
2600 	}
2601 
2602 	retval = ms_switch_clock(chip);
2603 	if (retval != STATUS_SUCCESS)
2604 		return STATUS_FAIL;
2605 
2606 	return STATUS_SUCCESS;
2607 }
2608 
2609 static int mspro_rw_multi_sector(struct scsi_cmnd *srb,
2610 				 struct rtsx_chip *chip, u32 start_sector,
2611 				 u16 sector_cnt)
2612 {
2613 	struct ms_info *ms_card = &chip->ms_card;
2614 	bool mode_2k = false;
2615 	int retval;
2616 	u16 count;
2617 	u8 val, trans_mode, rw_tpc, rw_cmd;
2618 
2619 	ms_set_err_code(chip, MS_NO_ERROR);
2620 
2621 	ms_card->cleanup_counter = 0;
2622 
2623 	if (CHK_MSHG(ms_card)) {
2624 		if ((start_sector % 4) || (sector_cnt % 4)) {
2625 			if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2626 				rw_tpc = PRO_READ_LONG_DATA;
2627 				rw_cmd = PRO_READ_DATA;
2628 			} else {
2629 				rw_tpc = PRO_WRITE_LONG_DATA;
2630 				rw_cmd = PRO_WRITE_DATA;
2631 			}
2632 		} else {
2633 			if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2634 				rw_tpc = PRO_READ_QUAD_DATA;
2635 				rw_cmd = PRO_READ_2K_DATA;
2636 			} else {
2637 				rw_tpc = PRO_WRITE_QUAD_DATA;
2638 				rw_cmd = PRO_WRITE_2K_DATA;
2639 			}
2640 			mode_2k = true;
2641 		}
2642 	} else {
2643 		if (srb->sc_data_direction == DMA_FROM_DEVICE) {
2644 			rw_tpc = PRO_READ_LONG_DATA;
2645 			rw_cmd = PRO_READ_DATA;
2646 		} else {
2647 			rw_tpc = PRO_WRITE_LONG_DATA;
2648 			rw_cmd = PRO_WRITE_DATA;
2649 		}
2650 	}
2651 
2652 	retval = ms_switch_clock(chip);
2653 	if (retval != STATUS_SUCCESS)
2654 		return STATUS_FAIL;
2655 
2656 	if (srb->sc_data_direction == DMA_FROM_DEVICE)
2657 		trans_mode = MS_TM_AUTO_READ;
2658 	else
2659 		trans_mode = MS_TM_AUTO_WRITE;
2660 
2661 	retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
2662 	if (retval)
2663 		return retval;
2664 
2665 	if (ms_card->seq_mode) {
2666 		if (ms_card->pre_dir != srb->sc_data_direction ||
2667 		    ((ms_card->pre_sec_addr + ms_card->pre_sec_cnt) !=
2668 		     start_sector) ||
2669 		    (mode_2k && (ms_card->seq_mode & MODE_512_SEQ)) ||
2670 		    (!mode_2k && (ms_card->seq_mode & MODE_2K_SEQ)) ||
2671 		    !(val & MS_INT_BREQ) ||
2672 		    ((ms_card->total_sec_cnt + sector_cnt) > 0xFE00)) {
2673 			ms_card->seq_mode = 0;
2674 			ms_card->total_sec_cnt = 0;
2675 			if (val & MS_INT_BREQ) {
2676 				retval = ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2677 				if (retval != STATUS_SUCCESS)
2678 					return STATUS_FAIL;
2679 
2680 				rtsx_write_register(chip, RBCTL, RB_FLUSH,
2681 						    RB_FLUSH);
2682 			}
2683 		}
2684 	}
2685 
2686 	if (!ms_card->seq_mode) {
2687 		ms_card->total_sec_cnt = 0;
2688 		if (sector_cnt >= SEQ_START_CRITERIA) {
2689 			if ((ms_card->capacity - start_sector) > 0xFE00)
2690 				count = 0xFE00;
2691 			else
2692 				count = (u16)(ms_card->capacity - start_sector);
2693 
2694 			if (count > sector_cnt) {
2695 				if (mode_2k)
2696 					ms_card->seq_mode = MODE_2K_SEQ;
2697 				else
2698 					ms_card->seq_mode = MODE_512_SEQ;
2699 			}
2700 		} else {
2701 			count = sector_cnt;
2702 		}
2703 		retval = mspro_set_rw_cmd(chip, start_sector, count, rw_cmd);
2704 		if (retval != STATUS_SUCCESS) {
2705 			ms_card->seq_mode = 0;
2706 			return STATUS_FAIL;
2707 		}
2708 	}
2709 
2710 	retval = ms_transfer_data(chip, trans_mode, rw_tpc, sector_cnt,
2711 				  WAIT_INT, mode_2k, scsi_sg_count(srb),
2712 				  scsi_sglist(srb), scsi_bufflen(srb));
2713 	if (retval != STATUS_SUCCESS) {
2714 		ms_card->seq_mode = 0;
2715 		rtsx_read_register(chip, MS_TRANS_CFG, &val);
2716 		rtsx_clear_ms_error(chip);
2717 
2718 		if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
2719 			chip->rw_need_retry = 0;
2720 			dev_dbg(rtsx_dev(chip), "No card exist, exit %s\n",
2721 				__func__);
2722 			return STATUS_FAIL;
2723 		}
2724 
2725 		if (val & MS_INT_BREQ)
2726 			ms_send_cmd(chip, PRO_STOP, WAIT_INT);
2727 
2728 		if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
2729 			dev_dbg(rtsx_dev(chip), "MSPro CRC error, tune clock!\n");
2730 			chip->rw_need_retry = 1;
2731 			ms_auto_tune_clock(chip);
2732 		}
2733 
2734 		return retval;
2735 	}
2736 
2737 	if (ms_card->seq_mode) {
2738 		ms_card->pre_sec_addr = start_sector;
2739 		ms_card->pre_sec_cnt = sector_cnt;
2740 		ms_card->pre_dir = srb->sc_data_direction;
2741 		ms_card->total_sec_cnt += sector_cnt;
2742 	}
2743 
2744 	return STATUS_SUCCESS;
2745 }
2746 
2747 static int mspro_read_format_progress(struct rtsx_chip *chip,
2748 				      const int short_data_len)
2749 {
2750 	struct ms_info *ms_card = &chip->ms_card;
2751 	int retval, i;
2752 	u32 total_progress, cur_progress;
2753 	u8 cnt, tmp;
2754 	u8 data[8];
2755 
2756 	dev_dbg(rtsx_dev(chip), "%s, short_data_len = %d\n", __func__,
2757 		short_data_len);
2758 
2759 	retval = ms_switch_clock(chip);
2760 	if (retval != STATUS_SUCCESS) {
2761 		ms_card->format_status = FORMAT_FAIL;
2762 		return STATUS_FAIL;
2763 	}
2764 
2765 	retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2766 	if (retval != STATUS_SUCCESS) {
2767 		ms_card->format_status = FORMAT_FAIL;
2768 		return STATUS_FAIL;
2769 	}
2770 
2771 	if (!(tmp & MS_INT_BREQ)) {
2772 		if ((tmp & (MS_INT_CED | MS_INT_BREQ | MS_INT_CMDNK |
2773 			    MS_INT_ERR)) == MS_INT_CED) {
2774 			ms_card->format_status = FORMAT_SUCCESS;
2775 			return STATUS_SUCCESS;
2776 		}
2777 		ms_card->format_status = FORMAT_FAIL;
2778 		return STATUS_FAIL;
2779 	}
2780 
2781 	if (short_data_len >= 256)
2782 		cnt = 0;
2783 	else
2784 		cnt = (u8)short_data_len;
2785 
2786 	retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT,
2787 				     MS_NO_CHECK_INT);
2788 	if (retval != STATUS_SUCCESS) {
2789 		ms_card->format_status = FORMAT_FAIL;
2790 		return STATUS_FAIL;
2791 	}
2792 
2793 	retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, cnt, WAIT_INT,
2794 			       data, 8);
2795 	if (retval != STATUS_SUCCESS) {
2796 		ms_card->format_status = FORMAT_FAIL;
2797 		return STATUS_FAIL;
2798 	}
2799 
2800 	total_progress = (data[0] << 24) | (data[1] << 16) |
2801 		(data[2] << 8) | data[3];
2802 	cur_progress = (data[4] << 24) | (data[5] << 16) |
2803 		(data[6] << 8) | data[7];
2804 
2805 	dev_dbg(rtsx_dev(chip), "total_progress = %d, cur_progress = %d\n",
2806 		total_progress, cur_progress);
2807 
2808 	if (total_progress == 0) {
2809 		ms_card->progress = 0;
2810 	} else {
2811 		u64 ulltmp = (u64)cur_progress * (u64)65535;
2812 
2813 		do_div(ulltmp, total_progress);
2814 		ms_card->progress = (u16)ulltmp;
2815 	}
2816 	dev_dbg(rtsx_dev(chip), "progress = %d\n", ms_card->progress);
2817 
2818 	for (i = 0; i < 5000; i++) {
2819 		retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2820 		if (retval != STATUS_SUCCESS) {
2821 			ms_card->format_status = FORMAT_FAIL;
2822 			return STATUS_FAIL;
2823 		}
2824 		if (tmp & (MS_INT_CED | MS_INT_CMDNK |
2825 				MS_INT_BREQ | MS_INT_ERR))
2826 			break;
2827 
2828 		wait_timeout(1);
2829 	}
2830 
2831 	retval = rtsx_write_register(chip, MS_CFG, MS_NO_CHECK_INT, 0);
2832 	if (retval != STATUS_SUCCESS) {
2833 		ms_card->format_status = FORMAT_FAIL;
2834 		return STATUS_FAIL;
2835 	}
2836 
2837 	if (i == 5000) {
2838 		ms_card->format_status = FORMAT_FAIL;
2839 		return STATUS_FAIL;
2840 	}
2841 
2842 	if (tmp & (MS_INT_CMDNK | MS_INT_ERR)) {
2843 		ms_card->format_status = FORMAT_FAIL;
2844 		return STATUS_FAIL;
2845 	}
2846 
2847 	if (tmp & MS_INT_CED) {
2848 		ms_card->format_status = FORMAT_SUCCESS;
2849 		ms_card->pro_under_formatting = 0;
2850 	} else if (tmp & MS_INT_BREQ) {
2851 		ms_card->format_status = FORMAT_IN_PROGRESS;
2852 	} else {
2853 		ms_card->format_status = FORMAT_FAIL;
2854 		ms_card->pro_under_formatting = 0;
2855 		return STATUS_FAIL;
2856 	}
2857 
2858 	return STATUS_SUCCESS;
2859 }
2860 
2861 void mspro_polling_format_status(struct rtsx_chip *chip)
2862 {
2863 	struct ms_info *ms_card = &chip->ms_card;
2864 	int i;
2865 
2866 	if (ms_card->pro_under_formatting &&
2867 	    (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
2868 		rtsx_set_stat(chip, RTSX_STAT_RUN);
2869 
2870 		for (i = 0; i < 65535; i++) {
2871 			mspro_read_format_progress(chip, MS_SHORT_DATA_LEN);
2872 			if (ms_card->format_status != FORMAT_IN_PROGRESS)
2873 				break;
2874 		}
2875 	}
2876 }
2877 
2878 int mspro_format(struct scsi_cmnd *srb, struct rtsx_chip *chip,
2879 		 int short_data_len, bool quick_format)
2880 {
2881 	struct ms_info *ms_card = &chip->ms_card;
2882 	int retval, i;
2883 	u8 buf[8], tmp;
2884 	u16 para;
2885 
2886 	retval = ms_switch_clock(chip);
2887 	if (retval != STATUS_SUCCESS)
2888 		return STATUS_FAIL;
2889 
2890 	retval = ms_set_rw_reg_addr(chip, 0x00, 0x00, PRO_TPC_PARM, 0x01);
2891 	if (retval != STATUS_SUCCESS)
2892 		return STATUS_FAIL;
2893 
2894 	memset(buf, 0, 2);
2895 	switch (short_data_len) {
2896 	case 32:
2897 		buf[0] = 0;
2898 		break;
2899 	case 64:
2900 		buf[0] = 1;
2901 		break;
2902 	case 128:
2903 		buf[0] = 2;
2904 		break;
2905 	case 256:
2906 	default:
2907 		buf[0] = 3;
2908 		break;
2909 	}
2910 
2911 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2912 		retval = ms_write_bytes(chip, PRO_WRITE_REG, 1,
2913 					NO_WAIT_INT, buf, 2);
2914 		if (retval == STATUS_SUCCESS)
2915 			break;
2916 	}
2917 	if (i == MS_MAX_RETRY_COUNT)
2918 		return STATUS_FAIL;
2919 
2920 	if (quick_format)
2921 		para = 0x0000;
2922 	else
2923 		para = 0x0001;
2924 
2925 	retval = mspro_set_rw_cmd(chip, 0, para, PRO_FORMAT);
2926 	if (retval != STATUS_SUCCESS)
2927 		return STATUS_FAIL;
2928 
2929 	retval = rtsx_read_register(chip, MS_TRANS_CFG, &tmp);
2930 	if (retval)
2931 		return retval;
2932 
2933 	if (tmp & (MS_INT_CMDNK | MS_INT_ERR))
2934 		return STATUS_FAIL;
2935 
2936 	if ((tmp & (MS_INT_BREQ | MS_INT_CED)) == MS_INT_BREQ) {
2937 		ms_card->pro_under_formatting = 1;
2938 		ms_card->progress = 0;
2939 		ms_card->format_status = FORMAT_IN_PROGRESS;
2940 		return STATUS_SUCCESS;
2941 	}
2942 
2943 	if (tmp & MS_INT_CED) {
2944 		ms_card->pro_under_formatting = 0;
2945 		ms_card->progress = 0;
2946 		ms_card->format_status = FORMAT_SUCCESS;
2947 		set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_NO_SENSE);
2948 		return STATUS_SUCCESS;
2949 	}
2950 
2951 	return STATUS_FAIL;
2952 }
2953 
2954 static int ms_read_multiple_pages(struct rtsx_chip *chip, u16 phy_blk,
2955 				  u16 log_blk, u8 start_page, u8 end_page,
2956 				  u8 *buf, unsigned int *index,
2957 				  unsigned int *offset)
2958 {
2959 	struct ms_info *ms_card = &chip->ms_card;
2960 	int retval, i;
2961 	u8 extra[MS_EXTRA_SIZE], page_addr, val, trans_cfg, data[6];
2962 	u8 *ptr;
2963 
2964 	retval = ms_read_extra_data(chip, phy_blk, start_page,
2965 				    extra, MS_EXTRA_SIZE);
2966 	if (retval == STATUS_SUCCESS) {
2967 		if ((extra[1] & 0x30) != 0x30) {
2968 			ms_set_err_code(chip, MS_FLASH_READ_ERROR);
2969 			return STATUS_FAIL;
2970 		}
2971 	}
2972 
2973 	retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
2974 				    SYSTEM_PARAM, 6);
2975 	if (retval != STATUS_SUCCESS)
2976 		return STATUS_FAIL;
2977 
2978 	if (CHK_MS4BIT(ms_card))
2979 		data[0] = 0x88;
2980 	else
2981 		data[0] = 0x80;
2982 
2983 	data[1] = 0;
2984 	data[2] = (u8)(phy_blk >> 8);
2985 	data[3] = (u8)phy_blk;
2986 	data[4] = 0;
2987 	data[5] = start_page;
2988 
2989 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
2990 		retval = ms_write_bytes(chip, WRITE_REG, 6, NO_WAIT_INT,
2991 					data, 6);
2992 		if (retval == STATUS_SUCCESS)
2993 			break;
2994 	}
2995 	if (i == MS_MAX_RETRY_COUNT)
2996 		return STATUS_FAIL;
2997 
2998 	ms_set_err_code(chip, MS_NO_ERROR);
2999 
3000 	retval = ms_send_cmd(chip, BLOCK_READ, WAIT_INT);
3001 	if (retval != STATUS_SUCCESS)
3002 		return STATUS_FAIL;
3003 
3004 	ptr = buf;
3005 
3006 	for (page_addr = start_page; page_addr < end_page; page_addr++) {
3007 		ms_set_err_code(chip, MS_NO_ERROR);
3008 
3009 		if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3010 			ms_set_err_code(chip, MS_NO_CARD);
3011 			return STATUS_FAIL;
3012 		}
3013 
3014 		retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3015 		if (retval != STATUS_SUCCESS)
3016 			return STATUS_FAIL;
3017 
3018 		if (val & INT_REG_CMDNK) {
3019 			ms_set_err_code(chip, MS_CMD_NK);
3020 			return STATUS_FAIL;
3021 		}
3022 		if (val & INT_REG_ERR) {
3023 			if (val & INT_REG_BREQ) {
3024 				retval = ms_read_status_reg(chip);
3025 				if (retval != STATUS_SUCCESS) {
3026 					if (!(chip->card_wp & MS_CARD)) {
3027 						reset_ms(chip);
3028 						ms_set_page_status
3029 							(log_blk, set_PS_NG,
3030 							 extra,
3031 							 MS_EXTRA_SIZE);
3032 						ms_write_extra_data
3033 							(chip, phy_blk,
3034 							 page_addr, extra,
3035 							 MS_EXTRA_SIZE);
3036 					}
3037 					ms_set_err_code(chip,
3038 							MS_FLASH_READ_ERROR);
3039 					return STATUS_FAIL;
3040 				}
3041 			} else {
3042 				ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3043 				return STATUS_FAIL;
3044 			}
3045 		} else {
3046 			if (!(val & INT_REG_BREQ)) {
3047 				ms_set_err_code(chip, MS_BREQ_ERROR);
3048 				return STATUS_FAIL;
3049 			}
3050 		}
3051 
3052 		if (page_addr == (end_page - 1)) {
3053 			if (!(val & INT_REG_CED)) {
3054 				retval = ms_send_cmd(chip, BLOCK_END, WAIT_INT);
3055 				if (retval != STATUS_SUCCESS)
3056 					return STATUS_FAIL;
3057 			}
3058 
3059 			retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT,
3060 					       &val, 1);
3061 			if (retval != STATUS_SUCCESS)
3062 				return STATUS_FAIL;
3063 
3064 			if (!(val & INT_REG_CED)) {
3065 				ms_set_err_code(chip, MS_FLASH_READ_ERROR);
3066 				return STATUS_FAIL;
3067 			}
3068 
3069 			trans_cfg = NO_WAIT_INT;
3070 		} else {
3071 			trans_cfg = WAIT_INT;
3072 		}
3073 
3074 		rtsx_init_cmd(chip);
3075 
3076 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC, 0xFF, READ_PAGE_DATA);
3077 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3078 			     0xFF, trans_cfg);
3079 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3080 			     0x01, RING_BUFFER);
3081 
3082 		trans_dma_enable(DMA_FROM_DEVICE, chip, 512, DMA_512);
3083 
3084 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3085 			     MS_TRANSFER_START |  MS_TM_NORMAL_READ);
3086 		rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3087 			     MS_TRANSFER_END, MS_TRANSFER_END);
3088 
3089 		rtsx_send_cmd_no_wait(chip);
3090 
3091 		retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr, 512,
3092 						    scsi_sg_count(chip->srb),
3093 						    index, offset,
3094 						    DMA_FROM_DEVICE,
3095 						    chip->ms_timeout);
3096 		if (retval < 0) {
3097 			if (retval == -ETIMEDOUT) {
3098 				ms_set_err_code(chip, MS_TO_ERROR);
3099 				rtsx_clear_ms_error(chip);
3100 				return STATUS_TIMEDOUT;
3101 			}
3102 
3103 			retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3104 			if (retval != STATUS_SUCCESS) {
3105 				ms_set_err_code(chip, MS_TO_ERROR);
3106 				rtsx_clear_ms_error(chip);
3107 				return STATUS_TIMEDOUT;
3108 			}
3109 			if (val & (MS_CRC16_ERR | MS_RDY_TIMEOUT)) {
3110 				ms_set_err_code(chip, MS_CRC16_ERROR);
3111 				rtsx_clear_ms_error(chip);
3112 				return STATUS_FAIL;
3113 			}
3114 		}
3115 
3116 		if (scsi_sg_count(chip->srb) == 0)
3117 			ptr += 512;
3118 	}
3119 
3120 	return STATUS_SUCCESS;
3121 }
3122 
3123 static int ms_write_multiple_pages(struct rtsx_chip *chip, u16 old_blk,
3124 				   u16 new_blk, u16 log_blk, u8 start_page,
3125 				u8 end_page, u8 *buf, unsigned int *index,
3126 				unsigned int *offset)
3127 {
3128 	struct ms_info *ms_card = &chip->ms_card;
3129 	int retval, i;
3130 	u8 page_addr, val, data[16];
3131 	u8 *ptr;
3132 
3133 	if (!start_page) {
3134 		retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
3135 					    SYSTEM_PARAM, 7);
3136 		if (retval != STATUS_SUCCESS)
3137 			return STATUS_FAIL;
3138 
3139 		if (CHK_MS4BIT(ms_card))
3140 			data[0] = 0x88;
3141 		else
3142 			data[0] = 0x80;
3143 
3144 		data[1] = 0;
3145 		data[2] = (u8)(old_blk >> 8);
3146 		data[3] = (u8)old_blk;
3147 		data[4] = 0x80;
3148 		data[5] = 0;
3149 		data[6] = 0xEF;
3150 		data[7] = 0xFF;
3151 
3152 		retval = ms_write_bytes(chip, WRITE_REG, 7, NO_WAIT_INT,
3153 					data, 8);
3154 		if (retval != STATUS_SUCCESS)
3155 			return STATUS_FAIL;
3156 
3157 		retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3158 		if (retval != STATUS_SUCCESS)
3159 			return STATUS_FAIL;
3160 
3161 		ms_set_err_code(chip, MS_NO_ERROR);
3162 		retval = ms_transfer_tpc(chip, MS_TM_READ_BYTES, GET_INT, 1,
3163 					 NO_WAIT_INT);
3164 		if (retval != STATUS_SUCCESS)
3165 			return STATUS_FAIL;
3166 	}
3167 
3168 	retval = ms_set_rw_reg_addr(chip, OVERWRITE_FLAG, MS_EXTRA_SIZE,
3169 				    SYSTEM_PARAM, (6 + MS_EXTRA_SIZE));
3170 	if (retval != STATUS_SUCCESS)
3171 		return STATUS_FAIL;
3172 
3173 	ms_set_err_code(chip, MS_NO_ERROR);
3174 
3175 	if (CHK_MS4BIT(ms_card))
3176 		data[0] = 0x88;
3177 	else
3178 		data[0] = 0x80;
3179 
3180 	data[1] = 0;
3181 	data[2] = (u8)(new_blk >> 8);
3182 	data[3] = (u8)new_blk;
3183 	if ((end_page - start_page) == 1)
3184 		data[4] = 0x20;
3185 	else
3186 		data[4] = 0;
3187 
3188 	data[5] = start_page;
3189 	data[6] = 0xF8;
3190 	data[7] = 0xFF;
3191 	data[8] = (u8)(log_blk >> 8);
3192 	data[9] = (u8)log_blk;
3193 
3194 	for (i = 0x0A; i < 0x10; i++)
3195 		data[i] = 0xFF;
3196 
3197 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3198 		retval = ms_write_bytes(chip, WRITE_REG, 6 + MS_EXTRA_SIZE,
3199 					NO_WAIT_INT, data, 16);
3200 		if (retval == STATUS_SUCCESS)
3201 			break;
3202 	}
3203 	if (i == MS_MAX_RETRY_COUNT)
3204 		return STATUS_FAIL;
3205 
3206 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3207 		retval = ms_send_cmd(chip, BLOCK_WRITE, WAIT_INT);
3208 		if (retval == STATUS_SUCCESS)
3209 			break;
3210 	}
3211 	if (i == MS_MAX_RETRY_COUNT)
3212 		return STATUS_FAIL;
3213 
3214 	retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3215 	if (retval != STATUS_SUCCESS)
3216 		return STATUS_FAIL;
3217 
3218 	ptr = buf;
3219 	for (page_addr = start_page; page_addr < end_page; page_addr++) {
3220 		ms_set_err_code(chip, MS_NO_ERROR);
3221 
3222 		if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3223 			ms_set_err_code(chip, MS_NO_CARD);
3224 			return STATUS_FAIL;
3225 		}
3226 
3227 		if (val & INT_REG_CMDNK) {
3228 			ms_set_err_code(chip, MS_CMD_NK);
3229 			return STATUS_FAIL;
3230 		}
3231 		if (val & INT_REG_ERR) {
3232 			ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3233 			return STATUS_FAIL;
3234 		}
3235 		if (!(val & INT_REG_BREQ)) {
3236 			ms_set_err_code(chip, MS_BREQ_ERROR);
3237 			return STATUS_FAIL;
3238 		}
3239 
3240 		udelay(30);
3241 
3242 		rtsx_init_cmd(chip);
3243 
3244 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
3245 			     0xFF, WRITE_PAGE_DATA);
3246 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG,
3247 			     0xFF, WAIT_INT);
3248 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
3249 			     0x01, RING_BUFFER);
3250 
3251 		trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
3252 
3253 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
3254 			     MS_TRANSFER_START |  MS_TM_NORMAL_WRITE);
3255 		rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
3256 			     MS_TRANSFER_END, MS_TRANSFER_END);
3257 
3258 		rtsx_send_cmd_no_wait(chip);
3259 
3260 		retval = rtsx_transfer_data_partial(chip, MS_CARD, ptr,	512,
3261 						    scsi_sg_count(chip->srb),
3262 						    index, offset,
3263 						    DMA_TO_DEVICE,
3264 						    chip->ms_timeout);
3265 		if (retval < 0) {
3266 			ms_set_err_code(chip, MS_TO_ERROR);
3267 			rtsx_clear_ms_error(chip);
3268 
3269 			if (retval == -ETIMEDOUT)
3270 				return STATUS_TIMEDOUT;
3271 			return STATUS_FAIL;
3272 		}
3273 
3274 		retval = ms_read_bytes(chip, GET_INT, 1, NO_WAIT_INT, &val, 1);
3275 		if (retval != STATUS_SUCCESS)
3276 			return STATUS_FAIL;
3277 
3278 		if ((end_page - start_page) == 1) {
3279 			if (!(val & INT_REG_CED)) {
3280 				ms_set_err_code(chip, MS_FLASH_WRITE_ERROR);
3281 				return STATUS_FAIL;
3282 			}
3283 		} else {
3284 			if (page_addr == (end_page - 1)) {
3285 				if (!(val & INT_REG_CED)) {
3286 					retval = ms_send_cmd(chip, BLOCK_END,
3287 							     WAIT_INT);
3288 					if (retval != STATUS_SUCCESS)
3289 						return STATUS_FAIL;
3290 				}
3291 
3292 				retval = ms_read_bytes(chip, GET_INT, 1,
3293 						       NO_WAIT_INT, &val, 1);
3294 				if (retval != STATUS_SUCCESS)
3295 					return STATUS_FAIL;
3296 			}
3297 
3298 			if (page_addr == (end_page - 1) ||
3299 			    page_addr == ms_card->page_off) {
3300 				if (!(val & INT_REG_CED)) {
3301 					ms_set_err_code(chip,
3302 							MS_FLASH_WRITE_ERROR);
3303 					return STATUS_FAIL;
3304 				}
3305 			}
3306 		}
3307 
3308 		if (scsi_sg_count(chip->srb) == 0)
3309 			ptr += 512;
3310 	}
3311 
3312 	return STATUS_SUCCESS;
3313 }
3314 
3315 static int ms_finish_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3316 			   u16 log_blk, u8 page_off)
3317 {
3318 	struct ms_info *ms_card = &chip->ms_card;
3319 	int retval, seg_no;
3320 
3321 	retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3322 			      page_off, ms_card->page_off + 1);
3323 	if (retval != STATUS_SUCCESS)
3324 		return STATUS_FAIL;
3325 
3326 	seg_no = old_blk >> 9;
3327 
3328 	if (MS_TST_BAD_BLOCK_FLG(ms_card)) {
3329 		MS_CLR_BAD_BLOCK_FLG(ms_card);
3330 		ms_set_bad_block(chip, old_blk);
3331 	} else {
3332 		retval = ms_erase_block(chip, old_blk);
3333 		if (retval == STATUS_SUCCESS)
3334 			ms_set_unused_block(chip, old_blk);
3335 	}
3336 
3337 	ms_set_l2p_tbl(chip, seg_no, log_blk - ms_start_idx[seg_no], new_blk);
3338 
3339 	return STATUS_SUCCESS;
3340 }
3341 
3342 static int ms_prepare_write(struct rtsx_chip *chip, u16 old_blk, u16 new_blk,
3343 			    u16 log_blk, u8 start_page)
3344 {
3345 	int retval;
3346 
3347 	if (start_page) {
3348 		retval = ms_copy_page(chip, old_blk, new_blk, log_blk,
3349 				      0, start_page);
3350 		if (retval != STATUS_SUCCESS)
3351 			return STATUS_FAIL;
3352 	}
3353 
3354 	return STATUS_SUCCESS;
3355 }
3356 
3357 #ifdef MS_DELAY_WRITE
3358 int ms_delay_write(struct rtsx_chip *chip)
3359 {
3360 	struct ms_info *ms_card = &chip->ms_card;
3361 	struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3362 	int retval;
3363 
3364 	if (delay_write->delay_write_flag) {
3365 		retval = ms_set_init_para(chip);
3366 		if (retval != STATUS_SUCCESS)
3367 			return STATUS_FAIL;
3368 
3369 		delay_write->delay_write_flag = 0;
3370 		retval = ms_finish_write(chip,
3371 					 delay_write->old_phyblock,
3372 					delay_write->new_phyblock,
3373 					delay_write->logblock,
3374 					delay_write->pageoff);
3375 		if (retval != STATUS_SUCCESS)
3376 			return STATUS_FAIL;
3377 	}
3378 
3379 	return STATUS_SUCCESS;
3380 }
3381 #endif
3382 
3383 static inline void ms_rw_fail(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3384 {
3385 	if (srb->sc_data_direction == DMA_FROM_DEVICE)
3386 		set_sense_type(chip, SCSI_LUN(srb),
3387 			       SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3388 	else
3389 		set_sense_type(chip, SCSI_LUN(srb), SENSE_TYPE_MEDIA_WRITE_ERR);
3390 }
3391 
3392 static int ms_rw_multi_sector(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3393 			      u32 start_sector, u16 sector_cnt)
3394 {
3395 	struct ms_info *ms_card = &chip->ms_card;
3396 	unsigned int lun = SCSI_LUN(srb);
3397 	int retval, seg_no;
3398 	unsigned int index = 0, offset = 0;
3399 	u16 old_blk = 0, new_blk = 0, log_blk, total_sec_cnt = sector_cnt;
3400 	u8 start_page, end_page = 0, page_cnt;
3401 	u8 *ptr;
3402 #ifdef MS_DELAY_WRITE
3403 	struct ms_delay_write_tag *delay_write = &ms_card->delay_write;
3404 #endif
3405 
3406 	ms_set_err_code(chip, MS_NO_ERROR);
3407 
3408 	ms_card->cleanup_counter = 0;
3409 
3410 	ptr = (u8 *)scsi_sglist(srb);
3411 
3412 	retval = ms_switch_clock(chip);
3413 	if (retval != STATUS_SUCCESS) {
3414 		ms_rw_fail(srb, chip);
3415 		return STATUS_FAIL;
3416 	}
3417 
3418 	log_blk = (u16)(start_sector >> ms_card->block_shift);
3419 	start_page = (u8)(start_sector & ms_card->page_off);
3420 
3421 	for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1; seg_no++) {
3422 		if (log_blk < ms_start_idx[seg_no + 1])
3423 			break;
3424 	}
3425 
3426 	if (ms_card->segment[seg_no].build_flag == 0) {
3427 		retval = ms_build_l2p_tbl(chip, seg_no);
3428 		if (retval != STATUS_SUCCESS) {
3429 			chip->card_fail |= MS_CARD;
3430 			set_sense_type(chip, lun, SENSE_TYPE_MEDIA_NOT_PRESENT);
3431 			return STATUS_FAIL;
3432 		}
3433 	}
3434 
3435 	if (srb->sc_data_direction == DMA_TO_DEVICE) {
3436 #ifdef MS_DELAY_WRITE
3437 		if (delay_write->delay_write_flag &&
3438 		    delay_write->logblock == log_blk &&
3439 		    start_page > delay_write->pageoff) {
3440 			delay_write->delay_write_flag = 0;
3441 			retval = ms_copy_page(chip,
3442 					      delay_write->old_phyblock,
3443 					      delay_write->new_phyblock,
3444 					      log_blk,
3445 					      delay_write->pageoff, start_page);
3446 			if (retval != STATUS_SUCCESS) {
3447 				set_sense_type(chip, lun,
3448 					       SENSE_TYPE_MEDIA_WRITE_ERR);
3449 				return STATUS_FAIL;
3450 			}
3451 			old_blk = delay_write->old_phyblock;
3452 			new_blk = delay_write->new_phyblock;
3453 		} else if (delay_write->delay_write_flag &&
3454 				(delay_write->logblock == log_blk) &&
3455 				(start_page == delay_write->pageoff)) {
3456 			delay_write->delay_write_flag = 0;
3457 			old_blk = delay_write->old_phyblock;
3458 			new_blk = delay_write->new_phyblock;
3459 		} else {
3460 			retval = ms_delay_write(chip);
3461 			if (retval != STATUS_SUCCESS) {
3462 				set_sense_type(chip, lun,
3463 					       SENSE_TYPE_MEDIA_WRITE_ERR);
3464 				return STATUS_FAIL;
3465 			}
3466 #endif
3467 			old_blk = ms_get_l2p_tbl
3468 					(chip, seg_no,
3469 					 log_blk - ms_start_idx[seg_no]);
3470 			new_blk  = ms_get_unused_block(chip, seg_no);
3471 			if (old_blk == 0xFFFF || new_blk == 0xFFFF) {
3472 				set_sense_type(chip, lun,
3473 					       SENSE_TYPE_MEDIA_WRITE_ERR);
3474 				return STATUS_FAIL;
3475 			}
3476 
3477 			retval = ms_prepare_write(chip, old_blk, new_blk,
3478 						  log_blk, start_page);
3479 			if (retval != STATUS_SUCCESS) {
3480 				if (detect_card_cd(chip, MS_CARD) !=
3481 				    STATUS_SUCCESS) {
3482 					set_sense_type
3483 						(chip, lun,
3484 						SENSE_TYPE_MEDIA_NOT_PRESENT);
3485 					return STATUS_FAIL;
3486 				}
3487 				set_sense_type(chip, lun,
3488 					       SENSE_TYPE_MEDIA_WRITE_ERR);
3489 				return STATUS_FAIL;
3490 			}
3491 #ifdef MS_DELAY_WRITE
3492 		}
3493 #endif
3494 	} else {
3495 #ifdef MS_DELAY_WRITE
3496 		retval = ms_delay_write(chip);
3497 		if (retval != STATUS_SUCCESS) {
3498 			if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3499 				set_sense_type(chip, lun,
3500 					       SENSE_TYPE_MEDIA_NOT_PRESENT);
3501 				return STATUS_FAIL;
3502 			}
3503 			set_sense_type(chip, lun,
3504 				       SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3505 			return STATUS_FAIL;
3506 		}
3507 #endif
3508 		old_blk = ms_get_l2p_tbl(chip, seg_no,
3509 					 log_blk - ms_start_idx[seg_no]);
3510 		if (old_blk == 0xFFFF) {
3511 			set_sense_type(chip, lun,
3512 				       SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
3513 			return STATUS_FAIL;
3514 		}
3515 	}
3516 
3517 	dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3518 		seg_no, old_blk, new_blk);
3519 
3520 	while (total_sec_cnt) {
3521 		if ((start_page + total_sec_cnt) > (ms_card->page_off + 1))
3522 			end_page = ms_card->page_off + 1;
3523 		else
3524 			end_page = start_page + (u8)total_sec_cnt;
3525 
3526 		page_cnt = end_page - start_page;
3527 
3528 		dev_dbg(rtsx_dev(chip), "start_page = %d, end_page = %d, page_cnt = %d\n",
3529 			start_page, end_page, page_cnt);
3530 
3531 		if (srb->sc_data_direction == DMA_FROM_DEVICE) {
3532 			retval = ms_read_multiple_pages(chip,
3533 							old_blk, log_blk,
3534 							start_page, end_page,
3535 							ptr, &index, &offset);
3536 		} else {
3537 			retval = ms_write_multiple_pages(chip, old_blk, new_blk,
3538 							 log_blk, start_page,
3539 							 end_page, ptr, &index,
3540 							 &offset);
3541 		}
3542 
3543 		if (retval != STATUS_SUCCESS) {
3544 			toggle_gpio(chip, 1);
3545 			if (detect_card_cd(chip, MS_CARD) != STATUS_SUCCESS) {
3546 				set_sense_type(chip, lun,
3547 					       SENSE_TYPE_MEDIA_NOT_PRESENT);
3548 				return STATUS_FAIL;
3549 			}
3550 			ms_rw_fail(srb, chip);
3551 			return STATUS_FAIL;
3552 		}
3553 
3554 		if (srb->sc_data_direction == DMA_TO_DEVICE) {
3555 			if (end_page == (ms_card->page_off + 1)) {
3556 				retval = ms_erase_block(chip, old_blk);
3557 				if (retval == STATUS_SUCCESS)
3558 					ms_set_unused_block(chip, old_blk);
3559 
3560 				ms_set_l2p_tbl(chip, seg_no,
3561 					       log_blk - ms_start_idx[seg_no],
3562 					       new_blk);
3563 			}
3564 		}
3565 
3566 		total_sec_cnt -= page_cnt;
3567 		if (scsi_sg_count(srb) == 0)
3568 			ptr += page_cnt * 512;
3569 
3570 		if (total_sec_cnt == 0)
3571 			break;
3572 
3573 		log_blk++;
3574 
3575 		for (seg_no = 0; seg_no < ARRAY_SIZE(ms_start_idx) - 1;
3576 				seg_no++) {
3577 			if (log_blk < ms_start_idx[seg_no + 1])
3578 				break;
3579 		}
3580 
3581 		if (ms_card->segment[seg_no].build_flag == 0) {
3582 			retval = ms_build_l2p_tbl(chip, seg_no);
3583 			if (retval != STATUS_SUCCESS) {
3584 				chip->card_fail |= MS_CARD;
3585 				set_sense_type(chip, lun,
3586 					       SENSE_TYPE_MEDIA_NOT_PRESENT);
3587 				return STATUS_FAIL;
3588 			}
3589 		}
3590 
3591 		old_blk = ms_get_l2p_tbl(chip, seg_no,
3592 					 log_blk - ms_start_idx[seg_no]);
3593 		if (old_blk == 0xFFFF) {
3594 			ms_rw_fail(srb, chip);
3595 			return STATUS_FAIL;
3596 		}
3597 
3598 		if (srb->sc_data_direction == DMA_TO_DEVICE) {
3599 			new_blk = ms_get_unused_block(chip, seg_no);
3600 			if (new_blk == 0xFFFF) {
3601 				ms_rw_fail(srb, chip);
3602 				return STATUS_FAIL;
3603 			}
3604 		}
3605 
3606 		dev_dbg(rtsx_dev(chip), "seg_no = %d, old_blk = 0x%x, new_blk = 0x%x\n",
3607 			seg_no, old_blk, new_blk);
3608 
3609 		start_page = 0;
3610 	}
3611 
3612 	if (srb->sc_data_direction == DMA_TO_DEVICE) {
3613 		if (end_page < (ms_card->page_off + 1)) {
3614 #ifdef MS_DELAY_WRITE
3615 			delay_write->delay_write_flag = 1;
3616 			delay_write->old_phyblock = old_blk;
3617 			delay_write->new_phyblock = new_blk;
3618 			delay_write->logblock = log_blk;
3619 			delay_write->pageoff = end_page;
3620 #else
3621 			retval = ms_finish_write(chip, old_blk, new_blk,
3622 						 log_blk, end_page);
3623 			if (retval != STATUS_SUCCESS) {
3624 				if (detect_card_cd(chip, MS_CARD) !=
3625 				    STATUS_SUCCESS) {
3626 					set_sense_type
3627 						(chip, lun,
3628 						SENSE_TYPE_MEDIA_NOT_PRESENT);
3629 					return STATUS_FAIL;
3630 				}
3631 
3632 				ms_rw_fail(srb, chip);
3633 				return STATUS_FAIL;
3634 			}
3635 #endif
3636 		}
3637 	}
3638 
3639 	scsi_set_resid(srb, 0);
3640 
3641 	return STATUS_SUCCESS;
3642 }
3643 
3644 int ms_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
3645 	  u32 start_sector, u16 sector_cnt)
3646 {
3647 	struct ms_info *ms_card = &chip->ms_card;
3648 	int retval;
3649 
3650 	if (CHK_MSPRO(ms_card))
3651 		retval = mspro_rw_multi_sector(srb, chip, start_sector,
3652 					       sector_cnt);
3653 	else
3654 		retval = ms_rw_multi_sector(srb, chip, start_sector,
3655 					    sector_cnt);
3656 
3657 	return retval;
3658 }
3659 
3660 void ms_free_l2p_tbl(struct rtsx_chip *chip)
3661 {
3662 	struct ms_info *ms_card = &chip->ms_card;
3663 	int i = 0;
3664 
3665 	if (ms_card->segment) {
3666 		for (i = 0; i < ms_card->segment_cnt; i++) {
3667 			vfree(ms_card->segment[i].l2p_table);
3668 			ms_card->segment[i].l2p_table = NULL;
3669 			vfree(ms_card->segment[i].free_table);
3670 			ms_card->segment[i].free_table = NULL;
3671 		}
3672 		vfree(ms_card->segment);
3673 		ms_card->segment = NULL;
3674 	}
3675 }
3676 
3677 #ifdef SUPPORT_MAGIC_GATE
3678 
3679 #ifdef READ_BYTES_WAIT_INT
3680 static int ms_poll_int(struct rtsx_chip *chip)
3681 {
3682 	int retval;
3683 	u8 val;
3684 
3685 	rtsx_init_cmd(chip);
3686 
3687 	rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANS_CFG, MS_INT_CED, MS_INT_CED);
3688 
3689 	retval = rtsx_send_cmd(chip, MS_CARD, 5000);
3690 	if (retval != STATUS_SUCCESS)
3691 		return STATUS_FAIL;
3692 
3693 	val = *rtsx_get_cmd_data(chip);
3694 	if (val & MS_INT_ERR)
3695 		return STATUS_FAIL;
3696 
3697 	return STATUS_SUCCESS;
3698 }
3699 #endif
3700 
3701 #ifdef MS_SAMPLE_INT_ERR
3702 static int check_ms_err(struct rtsx_chip *chip)
3703 {
3704 	int retval;
3705 	u8 val;
3706 
3707 	retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3708 	if (retval != STATUS_SUCCESS)
3709 		return 1;
3710 	if (val & MS_TRANSFER_ERR)
3711 		return 1;
3712 
3713 	retval = rtsx_read_register(chip, MS_TRANS_CFG, &val);
3714 	if (retval != STATUS_SUCCESS)
3715 		return 1;
3716 
3717 	if (val & (MS_INT_ERR | MS_INT_CMDNK))
3718 		return 1;
3719 
3720 	return 0;
3721 }
3722 #else
3723 static int check_ms_err(struct rtsx_chip *chip)
3724 {
3725 	int retval;
3726 	u8 val;
3727 
3728 	retval = rtsx_read_register(chip, MS_TRANSFER, &val);
3729 	if (retval != STATUS_SUCCESS)
3730 		return 1;
3731 	if (val & MS_TRANSFER_ERR)
3732 		return 1;
3733 
3734 	return 0;
3735 }
3736 #endif
3737 
3738 static int mg_send_ex_cmd(struct rtsx_chip *chip, u8 cmd, u8 entry_num)
3739 {
3740 	int retval, i;
3741 	u8 data[8];
3742 
3743 	data[0] = cmd;
3744 	data[1] = 0;
3745 	data[2] = 0;
3746 	data[3] = 0;
3747 	data[4] = 0;
3748 	data[5] = 0;
3749 	data[6] = entry_num;
3750 	data[7] = 0;
3751 
3752 	for (i = 0; i < MS_MAX_RETRY_COUNT; i++) {
3753 		retval = ms_write_bytes(chip, PRO_EX_SET_CMD, 7, WAIT_INT,
3754 					data, 8);
3755 		if (retval == STATUS_SUCCESS)
3756 			break;
3757 	}
3758 	if (i == MS_MAX_RETRY_COUNT)
3759 		return STATUS_FAIL;
3760 
3761 	if (check_ms_err(chip)) {
3762 		rtsx_clear_ms_error(chip);
3763 		return STATUS_FAIL;
3764 	}
3765 
3766 	return STATUS_SUCCESS;
3767 }
3768 
3769 static int mg_set_tpc_para_sub(struct rtsx_chip *chip, int type,
3770 			       u8 mg_entry_num)
3771 {
3772 	int retval;
3773 	u8 buf[6];
3774 
3775 	if (type == 0)
3776 		retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_TPC_PARM, 1);
3777 	else
3778 		retval = ms_set_rw_reg_addr(chip, 0, 0, PRO_DATA_COUNT1, 6);
3779 
3780 	if (retval != STATUS_SUCCESS)
3781 		return STATUS_FAIL;
3782 
3783 	buf[0] = 0;
3784 	buf[1] = 0;
3785 	if (type == 1) {
3786 		buf[2] = 0;
3787 		buf[3] = 0;
3788 		buf[4] = 0;
3789 		buf[5] = mg_entry_num;
3790 	}
3791 	retval = ms_write_bytes(chip, PRO_WRITE_REG, (type == 0) ? 1 : 6,
3792 				NO_WAIT_INT, buf, 6);
3793 	if (retval != STATUS_SUCCESS)
3794 		return STATUS_FAIL;
3795 
3796 	return STATUS_SUCCESS;
3797 }
3798 
3799 int mg_set_leaf_id(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3800 {
3801 	int retval;
3802 	int i;
3803 	unsigned int lun = SCSI_LUN(srb);
3804 	u8 buf1[32], buf2[12];
3805 
3806 	if (scsi_bufflen(srb) < 12) {
3807 		set_sense_type(chip, lun, SENSE_TYPE_MEDIA_INVALID_CMD_FIELD);
3808 		return STATUS_FAIL;
3809 	}
3810 
3811 	ms_cleanup_work(chip);
3812 
3813 	retval = ms_switch_clock(chip);
3814 	if (retval != STATUS_SUCCESS)
3815 		return STATUS_FAIL;
3816 
3817 	retval = mg_send_ex_cmd(chip, MG_SET_LID, 0);
3818 	if (retval != STATUS_SUCCESS) {
3819 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3820 		return STATUS_FAIL;
3821 	}
3822 
3823 	memset(buf1, 0, 32);
3824 	rtsx_stor_get_xfer_buf(buf2, min_t(int, 12, scsi_bufflen(srb)), srb);
3825 	for (i = 0; i < 8; i++)
3826 		buf1[8 + i] = buf2[4 + i];
3827 
3828 	retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
3829 				buf1, 32);
3830 	if (retval != STATUS_SUCCESS) {
3831 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3832 		return STATUS_FAIL;
3833 	}
3834 	if (check_ms_err(chip)) {
3835 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
3836 		rtsx_clear_ms_error(chip);
3837 		return STATUS_FAIL;
3838 	}
3839 
3840 	return STATUS_SUCCESS;
3841 }
3842 
3843 int mg_get_local_EKB(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3844 {
3845 	int retval;
3846 	int bufflen;
3847 	unsigned int lun = SCSI_LUN(srb);
3848 	u8 *buf = NULL;
3849 
3850 	ms_cleanup_work(chip);
3851 
3852 	retval = ms_switch_clock(chip);
3853 	if (retval != STATUS_SUCCESS)
3854 		return STATUS_FAIL;
3855 
3856 	buf = kmalloc(1540, GFP_KERNEL);
3857 	if (!buf)
3858 		return STATUS_ERROR;
3859 
3860 	buf[0] = 0x04;
3861 	buf[1] = 0x1A;
3862 	buf[2] = 0x00;
3863 	buf[3] = 0x00;
3864 
3865 	retval = mg_send_ex_cmd(chip, MG_GET_LEKB, 0);
3866 	if (retval != STATUS_SUCCESS) {
3867 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3868 		goto free_buffer;
3869 	}
3870 
3871 	retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
3872 				  3, WAIT_INT, 0, 0, buf + 4, 1536);
3873 	if (retval != STATUS_SUCCESS) {
3874 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3875 		rtsx_clear_ms_error(chip);
3876 		goto free_buffer;
3877 	}
3878 	if (check_ms_err(chip)) {
3879 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3880 		rtsx_clear_ms_error(chip);
3881 		retval = STATUS_FAIL;
3882 		goto free_buffer;
3883 	}
3884 
3885 	bufflen = min_t(int, 1052, scsi_bufflen(srb));
3886 	rtsx_stor_set_xfer_buf(buf, bufflen, srb);
3887 
3888 free_buffer:
3889 	kfree(buf);
3890 	return retval;
3891 }
3892 
3893 int mg_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3894 {
3895 	struct ms_info *ms_card = &chip->ms_card;
3896 	int retval;
3897 	int bufflen;
3898 	int i;
3899 	unsigned int lun = SCSI_LUN(srb);
3900 	u8 buf[32];
3901 
3902 	ms_cleanup_work(chip);
3903 
3904 	retval = ms_switch_clock(chip);
3905 	if (retval != STATUS_SUCCESS)
3906 		return STATUS_FAIL;
3907 
3908 	retval = mg_send_ex_cmd(chip, MG_GET_ID, 0);
3909 	if (retval != STATUS_SUCCESS) {
3910 		set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3911 		return STATUS_FAIL;
3912 	}
3913 
3914 	retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
3915 			       buf, 32);
3916 	if (retval != STATUS_SUCCESS) {
3917 		set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3918 		return STATUS_FAIL;
3919 	}
3920 	if (check_ms_err(chip)) {
3921 		set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3922 		rtsx_clear_ms_error(chip);
3923 		return STATUS_FAIL;
3924 	}
3925 
3926 	memcpy(ms_card->magic_gate_id, buf, 16);
3927 
3928 #ifdef READ_BYTES_WAIT_INT
3929 	retval = ms_poll_int(chip);
3930 	if (retval != STATUS_SUCCESS) {
3931 		set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3932 		return STATUS_FAIL;
3933 	}
3934 #endif
3935 
3936 	retval = mg_send_ex_cmd(chip, MG_SET_RD, 0);
3937 	if (retval != STATUS_SUCCESS) {
3938 		set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3939 		return STATUS_FAIL;
3940 	}
3941 
3942 	bufflen = min_t(int, 12, scsi_bufflen(srb));
3943 	rtsx_stor_get_xfer_buf(buf, bufflen, srb);
3944 
3945 	for (i = 0; i < 8; i++)
3946 		buf[i] = buf[4 + i];
3947 
3948 	for (i = 0; i < 24; i++)
3949 		buf[8 + i] = 0;
3950 
3951 	retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA,
3952 				32, WAIT_INT, buf, 32);
3953 	if (retval != STATUS_SUCCESS) {
3954 		set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3955 		return STATUS_FAIL;
3956 	}
3957 	if (check_ms_err(chip)) {
3958 		set_sense_type(chip, lun, SENSE_TYPE_MG_INCOMPATIBLE_MEDIUM);
3959 		rtsx_clear_ms_error(chip);
3960 		return STATUS_FAIL;
3961 	}
3962 
3963 	ms_card->mg_auth = 0;
3964 
3965 	return STATUS_SUCCESS;
3966 }
3967 
3968 int mg_get_rsp_chg(struct scsi_cmnd *srb, struct rtsx_chip *chip)
3969 {
3970 	struct ms_info *ms_card = &chip->ms_card;
3971 	int retval;
3972 	int bufflen;
3973 	unsigned int lun = SCSI_LUN(srb);
3974 	u8 buf1[32], buf2[36];
3975 
3976 	ms_cleanup_work(chip);
3977 
3978 	retval = ms_switch_clock(chip);
3979 	if (retval != STATUS_SUCCESS)
3980 		return STATUS_FAIL;
3981 
3982 	retval = mg_send_ex_cmd(chip, MG_MAKE_RMS, 0);
3983 	if (retval != STATUS_SUCCESS) {
3984 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3985 		return STATUS_FAIL;
3986 	}
3987 
3988 	retval = ms_read_bytes(chip, PRO_READ_SHORT_DATA, 32, WAIT_INT,
3989 			       buf1, 32);
3990 	if (retval != STATUS_SUCCESS) {
3991 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3992 		return STATUS_FAIL;
3993 	}
3994 	if (check_ms_err(chip)) {
3995 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
3996 		rtsx_clear_ms_error(chip);
3997 		return STATUS_FAIL;
3998 	}
3999 
4000 	buf2[0] = 0x00;
4001 	buf2[1] = 0x22;
4002 	buf2[2] = 0x00;
4003 	buf2[3] = 0x00;
4004 
4005 	memcpy(buf2 + 4, ms_card->magic_gate_id, 16);
4006 	memcpy(buf2 + 20, buf1, 16);
4007 
4008 	bufflen = min_t(int, 36, scsi_bufflen(srb));
4009 	rtsx_stor_set_xfer_buf(buf2, bufflen, srb);
4010 
4011 #ifdef READ_BYTES_WAIT_INT
4012 	retval = ms_poll_int(chip);
4013 	if (retval != STATUS_SUCCESS) {
4014 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4015 		return STATUS_FAIL;
4016 	}
4017 #endif
4018 
4019 	return STATUS_SUCCESS;
4020 }
4021 
4022 int mg_rsp(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4023 {
4024 	struct ms_info *ms_card = &chip->ms_card;
4025 	int retval;
4026 	int i;
4027 	int bufflen;
4028 	unsigned int lun = SCSI_LUN(srb);
4029 	u8 buf[32];
4030 
4031 	ms_cleanup_work(chip);
4032 
4033 	retval = ms_switch_clock(chip);
4034 	if (retval != STATUS_SUCCESS)
4035 		return STATUS_FAIL;
4036 
4037 	retval = mg_send_ex_cmd(chip, MG_MAKE_KSE, 0);
4038 	if (retval != STATUS_SUCCESS) {
4039 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4040 		return STATUS_FAIL;
4041 	}
4042 
4043 	bufflen = min_t(int, 12, scsi_bufflen(srb));
4044 	rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4045 
4046 	for (i = 0; i < 8; i++)
4047 		buf[i] = buf[4 + i];
4048 
4049 	for (i = 0; i < 24; i++)
4050 		buf[8 + i] = 0;
4051 
4052 	retval = ms_write_bytes(chip, PRO_WRITE_SHORT_DATA, 32, WAIT_INT,
4053 				buf, 32);
4054 	if (retval != STATUS_SUCCESS) {
4055 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4056 		return STATUS_FAIL;
4057 	}
4058 	if (check_ms_err(chip)) {
4059 		set_sense_type(chip, lun, SENSE_TYPE_MG_KEY_FAIL_NOT_AUTHEN);
4060 		rtsx_clear_ms_error(chip);
4061 		return STATUS_FAIL;
4062 	}
4063 
4064 	ms_card->mg_auth = 1;
4065 
4066 	return STATUS_SUCCESS;
4067 }
4068 
4069 int mg_get_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4070 {
4071 	struct ms_info *ms_card = &chip->ms_card;
4072 	int retval;
4073 	int bufflen;
4074 	unsigned int lun = SCSI_LUN(srb);
4075 	u8 *buf = NULL;
4076 
4077 	ms_cleanup_work(chip);
4078 
4079 	retval = ms_switch_clock(chip);
4080 	if (retval != STATUS_SUCCESS)
4081 		return STATUS_FAIL;
4082 
4083 	buf = kmalloc(1028, GFP_KERNEL);
4084 	if (!buf)
4085 		return STATUS_ERROR;
4086 
4087 	buf[0] = 0x04;
4088 	buf[1] = 0x02;
4089 	buf[2] = 0x00;
4090 	buf[3] = 0x00;
4091 
4092 	retval = mg_send_ex_cmd(chip, MG_GET_IBD, ms_card->mg_entry_num);
4093 	if (retval != STATUS_SUCCESS) {
4094 		set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4095 		goto free_buffer;
4096 	}
4097 
4098 	retval = ms_transfer_data(chip, MS_TM_AUTO_READ, PRO_READ_LONG_DATA,
4099 				  2, WAIT_INT, 0, 0, buf + 4, 1024);
4100 	if (retval != STATUS_SUCCESS) {
4101 		set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4102 		rtsx_clear_ms_error(chip);
4103 		goto free_buffer;
4104 	}
4105 	if (check_ms_err(chip)) {
4106 		set_sense_type(chip, lun, SENSE_TYPE_MEDIA_UNRECOVER_READ_ERR);
4107 		rtsx_clear_ms_error(chip);
4108 		retval = STATUS_FAIL;
4109 		goto free_buffer;
4110 	}
4111 
4112 	bufflen = min_t(int, 1028, scsi_bufflen(srb));
4113 	rtsx_stor_set_xfer_buf(buf, bufflen, srb);
4114 
4115 free_buffer:
4116 	kfree(buf);
4117 	return retval;
4118 }
4119 
4120 int mg_set_ICV(struct scsi_cmnd *srb, struct rtsx_chip *chip)
4121 {
4122 	struct ms_info *ms_card = &chip->ms_card;
4123 	int retval;
4124 	int bufflen;
4125 #ifdef MG_SET_ICV_SLOW
4126 	int i;
4127 #endif
4128 	unsigned int lun = SCSI_LUN(srb);
4129 	u8 *buf = NULL;
4130 
4131 	ms_cleanup_work(chip);
4132 
4133 	retval = ms_switch_clock(chip);
4134 	if (retval != STATUS_SUCCESS)
4135 		return STATUS_FAIL;
4136 
4137 	buf = kmalloc(1028, GFP_KERNEL);
4138 	if (!buf)
4139 		return STATUS_ERROR;
4140 
4141 	bufflen = min_t(int, 1028, scsi_bufflen(srb));
4142 	rtsx_stor_get_xfer_buf(buf, bufflen, srb);
4143 
4144 	retval = mg_send_ex_cmd(chip, MG_SET_IBD, ms_card->mg_entry_num);
4145 	if (retval != STATUS_SUCCESS) {
4146 		if (ms_card->mg_auth == 0) {
4147 			if ((buf[5] & 0xC0) != 0)
4148 				set_sense_type
4149 					(chip, lun,
4150 					SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4151 			else
4152 				set_sense_type(chip, lun,
4153 					       SENSE_TYPE_MG_WRITE_ERR);
4154 		} else {
4155 			set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4156 		}
4157 		goto set_ICV_finish;
4158 	}
4159 
4160 #ifdef MG_SET_ICV_SLOW
4161 	for (i = 0; i < 2; i++) {
4162 		udelay(50);
4163 
4164 		rtsx_init_cmd(chip);
4165 
4166 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TPC,
4167 			     0xFF, PRO_WRITE_LONG_DATA);
4168 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANS_CFG, 0xFF, WAIT_INT);
4169 		rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE,
4170 			     0x01, RING_BUFFER);
4171 
4172 		trans_dma_enable(DMA_TO_DEVICE, chip, 512, DMA_512);
4173 
4174 		rtsx_add_cmd(chip, WRITE_REG_CMD, MS_TRANSFER, 0xFF,
4175 			     MS_TRANSFER_START |  MS_TM_NORMAL_WRITE);
4176 		rtsx_add_cmd(chip, CHECK_REG_CMD, MS_TRANSFER,
4177 			     MS_TRANSFER_END, MS_TRANSFER_END);
4178 
4179 		rtsx_send_cmd_no_wait(chip);
4180 
4181 		retval = rtsx_transfer_data(chip, MS_CARD, buf + 4 + i * 512,
4182 					    512, 0, DMA_TO_DEVICE, 3000);
4183 		if (retval < 0 || check_ms_err(chip)) {
4184 			rtsx_clear_ms_error(chip);
4185 			if (ms_card->mg_auth == 0) {
4186 				if ((buf[5] & 0xC0) != 0)
4187 					set_sense_type
4188 					    (chip, lun,
4189 					     SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4190 				else
4191 					set_sense_type(chip, lun,
4192 						       SENSE_TYPE_MG_WRITE_ERR);
4193 			} else {
4194 				set_sense_type(chip, lun,
4195 					       SENSE_TYPE_MG_WRITE_ERR);
4196 			}
4197 			retval = STATUS_FAIL;
4198 			goto set_ICV_finish;
4199 		}
4200 	}
4201 #else
4202 	retval = ms_transfer_data(chip, MS_TM_AUTO_WRITE, PRO_WRITE_LONG_DATA,
4203 				  2, WAIT_INT, 0, 0, buf + 4, 1024);
4204 	if (retval != STATUS_SUCCESS || check_ms_err(chip)) {
4205 		rtsx_clear_ms_error(chip);
4206 		if (ms_card->mg_auth == 0) {
4207 			if ((buf[5] & 0xC0) != 0)
4208 				set_sense_type
4209 				    (chip, lun,
4210 				     SENSE_TYPE_MG_KEY_FAIL_NOT_ESTAB);
4211 			else
4212 				set_sense_type(chip, lun,
4213 					       SENSE_TYPE_MG_WRITE_ERR);
4214 		} else {
4215 			set_sense_type(chip, lun, SENSE_TYPE_MG_WRITE_ERR);
4216 		}
4217 		goto set_ICV_finish;
4218 	}
4219 #endif
4220 
4221 set_ICV_finish:
4222 	kfree(buf);
4223 	return retval;
4224 }
4225 
4226 #endif /* SUPPORT_MAGIC_GATE */
4227 
4228 void ms_cleanup_work(struct rtsx_chip *chip)
4229 {
4230 	struct ms_info *ms_card = &chip->ms_card;
4231 
4232 	if (CHK_MSPRO(ms_card)) {
4233 		if (ms_card->seq_mode) {
4234 			dev_dbg(rtsx_dev(chip), "MS Pro: stop transmission\n");
4235 			mspro_stop_seq_mode(chip);
4236 			ms_card->cleanup_counter = 0;
4237 		}
4238 		if (CHK_MSHG(ms_card)) {
4239 			rtsx_write_register(chip, MS_CFG,
4240 					    MS_2K_SECTOR_MODE, 0x00);
4241 		}
4242 	}
4243 #ifdef MS_DELAY_WRITE
4244 	else if ((!CHK_MSPRO(ms_card)) &&
4245 		 ms_card->delay_write.delay_write_flag) {
4246 		dev_dbg(rtsx_dev(chip), "MS: delay write\n");
4247 		ms_delay_write(chip);
4248 		ms_card->cleanup_counter = 0;
4249 	}
4250 #endif
4251 }
4252 
4253 int ms_power_off_card3v3(struct rtsx_chip *chip)
4254 {
4255 	int retval;
4256 
4257 	retval = disable_card_clock(chip, MS_CARD);
4258 	if (retval != STATUS_SUCCESS)
4259 		return STATUS_FAIL;
4260 
4261 	if (chip->asic_code) {
4262 		retval = ms_pull_ctl_disable(chip);
4263 		if (retval != STATUS_SUCCESS)
4264 			return STATUS_FAIL;
4265 	} else {
4266 		retval = rtsx_write_register(chip, FPGA_PULL_CTL,
4267 					     FPGA_MS_PULL_CTL_BIT | 0x20,
4268 					     FPGA_MS_PULL_CTL_BIT);
4269 		if (retval)
4270 			return retval;
4271 	}
4272 	retval = rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
4273 	if (retval)
4274 		return retval;
4275 
4276 	if (!chip->ft2_fast_mode) {
4277 		retval = card_power_off(chip, MS_CARD);
4278 		if (retval != STATUS_SUCCESS)
4279 			return STATUS_FAIL;
4280 	}
4281 
4282 	return STATUS_SUCCESS;
4283 }
4284 
4285 int release_ms_card(struct rtsx_chip *chip)
4286 {
4287 	struct ms_info *ms_card = &chip->ms_card;
4288 	int retval;
4289 
4290 #ifdef MS_DELAY_WRITE
4291 	ms_card->delay_write.delay_write_flag = 0;
4292 #endif
4293 	ms_card->pro_under_formatting = 0;
4294 
4295 	chip->card_ready &= ~MS_CARD;
4296 	chip->card_fail &= ~MS_CARD;
4297 	chip->card_wp &= ~MS_CARD;
4298 
4299 	ms_free_l2p_tbl(chip);
4300 
4301 	memset(ms_card->raw_sys_info, 0, 96);
4302 #ifdef SUPPORT_PCGL_1P18
4303 	memset(ms_card->raw_model_name, 0, 48);
4304 #endif
4305 
4306 	retval = ms_power_off_card3v3(chip);
4307 	if (retval != STATUS_SUCCESS)
4308 		return STATUS_FAIL;
4309 
4310 	return STATUS_SUCCESS;
4311 }
4312