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Searched defs:SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h488 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
H A Dsdma0_4_0_sh_mask.h489 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT 0x4 macro
H A Dsdma0_4_2_sh_mask.h489 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
H A Dsdma0_4_2_2_sh_mask.h495 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h918 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT 0x4 macro
H A Doss_2_4_sh_mask.h998 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT 0x4 macro
H A Doss_3_0_1_sh_mask.h1016 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT 0x4 macro
H A Doss_3_0_sh_mask.h1522 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT 0x4 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h180 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_sh_mask.h176 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
H A Dgc_11_0_0_sh_mask.h165 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
H A Dgc_12_0_0_sh_mask.h146 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
H A Dgc_10_1_0_sh_mask.h197 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
H A Dgc_11_0_3_sh_mask.h171 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro
H A Dgc_10_3_0_sh_mask.h198 #define SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT macro