1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _OPL_TOPO_H 28 #define _OPL_TOPO_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #include <fm/topo_hc.h> 33 #include <fm/topo_mod.h> 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 #define PCI_BUS_VERS 1 40 41 /* 42 * OPL uses the Jupiter Bus Bindings (see FWARC/2005/076) which specifies 43 * the hostbridge port id (the part of the bus address before the comma) as 44 * [10:9] = 00 45 * [8] = LSB_ID[4] = 0 46 * [7:4] = LSB_ID[3:0] 47 * [3] = IO_Channel#[2] = 0 48 * [2:1] = IO_Channel#[1:0] 49 * [0] = PCI Leaf Number (0=leaf-A, 1=leaf-B) 50 * where the LSB_ID is the logical system board, the IO_Channel is the 51 * hostbridge, and the PCI leaf is the root complex. The definitions 52 * allow up to 32 system boards, 8 hostbridges per system board, and 53 * two root complexes per hostbridge. 54 */ 55 56 /* Common OPL limits */ 57 #define OPL_IOB_MAX 32 /* Max 32 IOBs per machine */ 58 #define OPL_HB_MAX 8 /* Max 8 hostbridges per IOB */ 59 #define OPL_RC_MAX 2 /* Max 2 root complexes per hostbridge */ 60 #define OPL_BUS_MAX 4 /* Max PCI-Ex buses under root complex */ 61 62 /* Macros for manipulating px driver bus address. */ 63 #define OPL_PX_DRV "px" /* Oberon driver name */ 64 #define OPL_PX_STR2BA(s) strtol(s, NULL, 16) /* Convert ba string to int */ 65 #define OPL_PX_LSB(a) (((a) >> 4) & 0x1f) /* Extract board from ba */ 66 #define OPL_PX_HB(a) (((a) >> 1) & 0x07) /* Extract hb from ba */ 67 #define OPL_PX_RC(a) ((a) & 0x01) /* Extract rc from ba */ 68 #define OPL_SLOT_NAMES "slot-names" /* Slot name property */ 69 #define OPL_PX_DEVTYPE "pciex" /* Oberon is PCI-Ex devtype */ 70 #define OPL_PX_BDF "0x08" /* BDF is always 0/1/0 */ 71 72 /* Macros for manipulating mc-opl driver bus address. */ 73 #define OPL_MC_DRV "mc-opl" /* Driver name */ 74 #define OPL_MC_STR2BA(s) strtol(s, NULL, 16) /* Convert ba string to int */ 75 #define OPL_MC_LSB(a) (((a) >> 4) & 0x1f) /* Extract board from ba */ 76 #define OPL_PHYSICAL_BD "physical-board#" /* Physical board for the mc */ 77 78 /* Structure listing devices on an ioboard */ 79 typedef struct { 80 int count; 81 di_node_t rcs[OPL_HB_MAX][OPL_RC_MAX]; 82 } ioboard_contents_t; 83 84 /* Shared device tree root node */ 85 int opl_hb_enum(topo_mod_t *mp, const ioboard_contents_t *iob, 86 tnode_t *parent, int brd); 87 88 #ifdef __cplusplus 89 } 90 #endif 91 92 #endif /* _OPL_TOPO_H */ 93