xref: /illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/fw/rdma_constants.h (revision d14abf155341d55053c76eeec58b787a456b753b)
1 /*
2 ********************************************************************************
3 * $Id: //servers/main/nx2/577xx/hsi/microcode/rdma/headers/rdma_constants.h#39 $
4 ********************************************************************************
5 * $Name:  $
6 ********************************************************************************
7 * $Date: 2007/11/13 $
8 ********************************************************************************
9 * $Revision: #39 $
10 ********************************************************************************
11 * $Author: yaronu $
12 ********************************************************************************
13 * $Log: rdma_constants.h,v $
14 * Revision 1.37  2007/06/13 11:46:43  yanivr
15 * Add support for RDMA classifier in favor of the Eth
16 *
17 * Revision 1.36  2007/05/31 14:38:45  yanivr
18 * Enhance PCS request/PCS response scheme
19 *
20 * Revision 1.35  2007/05/30 13:35:11  yanivr
21 * Enable L5cm Passive Connection Establishment
22 *
23 * Revision 1.34  2007/04/29 14:58:29  yanivr
24 * Add RDMA_ASYNC_EVENT_PCS_RESPONSE1_SUCCEEDED, RDMA_ASYNC_EVENT_PCS_RESPONSE2_SUCCEEDED, RDMA_ASYNC_EVENT_PCS_RESPONSE3_SUCCEEDED
25 *
26 * Revision 1.33  2007/04/29 12:57:26  yanivr
27 * Add RDMA_RAMROD_CMD_ID_CLOSE_PHY_PORT defines
28 *
29 * Revision 1.32  2007/04/18 18:57:45  yanivr
30 * Add support for L5cm passive side connection establishment
31 *
32 * Revision 1.31  2007/02/22 18:19:11  yanivr
33 * Move common connection establishments ramrods to L5cm
34 *
35 * Revision 1.30  2006/09/19 06:14:39  edreayc
36 * Insert RDMA Error reporting & Invalidation process
37 *
38 * Revision 1.29  2006/08/28 06:32:40  yanivr
39 * Add RDMA_ASYNC_EVENT_UPDATE_ULP_SUCCEEDED event
40 *
41 * Revision 1.28  2006/08/27 15:43:24  yaronu
42 * - removed old include of rdma_eqe struct from rdma_constants
43 * - removed old includes to rdma event report files
44 * - added include to rdma event report structs where needed
45 *
46 * Revision 1.27  2006/08/27 15:18:26  yuvalk
47 * Rdma, Error reporting, Rx
48 *
49 * Revision 1.26  2006/08/22 15:38:05  yuvalk
50 * Rdma - Ustorm, Tstorm Error reporting fixes
51 *
52 * Revision 1.25  2006/08/21 15:39:12  yuvalk
53 * Rdma - added completion code defines for completion errors
54 *
55 * Revision 1.24  2006/08/20 17:00:35  yuvalk
56 * Rdma, Ustorm, Tstorm, Error reporting
57 *
58 * Revision 1.23  2006/08/17 14:39:25  yanivr
59 * Resupport ramrod RDMA_RxLlpSlowPath.cpp
60 *
61 * Revision 1.22  2006/08/13 08:34:49  yaronu
62 * Added some event code constants
63 *
64 * Revision 1.21  2006/07/30 08:42:04  yaronu
65 * renamed SEND_MPA SP command ID to LLP_SEND
66 *
67 * Revision 1.20  2006/07/12 09:51:14  yaronu
68 * Added  new slow path command IDs and event codes
69 *
70 * Revision 1.19  2006/06/08 06:27:44  yuvalk
71 * Rdma -
72 * Tstorm - some minor changes to better suite ASM code writting
73 * everest.fmt - added Rdma Xstorm slowPath handler
74 * microcode.vcproj - marked ASM files as excluded from build
75 *
76 * Revision 1.18  2006/05/16 16:25:51  yaronu
77 * - modified rdma slow path handlers for easier translation into ASM
78 * - add function execution counter in rdma driversim
79 *
80 * Revision 1.17  2006/05/15 11:44:21  yuvalk
81 * Rdma - changed "rh" prefix in all rdma hsi structs to be "rdma"
82 *
83 * Revision 1.16  2006/05/11 16:05:06  yaronu
84 * - extended Tstorm slow path handler
85 * - added new Ustorm and Cstorm slow path handlers
86 * - modified output message argument of Cstorm event report handler
87 *
88 * Revision 1.15  2006/05/09 09:38:47  yaronu
89 * updates to event report handlers and driversim after debugging events with terminate messages
90 *
91 * Revision 1.14  2006/05/02 08:07:06  ofirh
92 * HSI changes before microcode and driver entering lab
93 *
94 * Revision 1.13  2006/04/27 16:19:16  yaronu
95 * - updated driversim event handling
96 * - created event report handler in Ustorm
97 * - moved MAX_RAMROD_PER_PORT to hsi
98 *
99 * Revision 1.12  2006/04/25 07:59:45  yaronu
100 * added completion event type
101 *
102 * Revision 1.11  2006/04/24 13:34:53  yaronu
103 * event reporting handler updates
104 *
105 * Revision 1.10  2006/04/23 10:02:26  ofirh
106 * tree change - phase 3
107 *
108 * Revision 1.9  2006/04/16 13:00:04  yaronu
109 * added rdma event processing constants
110 *
111 * Revision 1.8  2006/04/05 08:25:37  yaronu
112 * added handler for rdma error reporting
113 *
114 * Revision 1.7  2006/03/21 13:53:31  yuvalk
115 * Rdma -
116 * uRdmaSend.cpp - Send Received flow implemented and partially tested
117 * uRdmaWriteReadResp - fixed bug when ddpLen == pbeSize
118 *
119 * Revision 1.6  2006/03/09 08:32:08  vitalyo
120 * Started implementing data integrity mechanism
121 *
122 * Revision 1.5  2006/03/06 10:28:57  vitalyo
123 * Adding functionality to test engine module
124 * Adding modify to rts implementation
125 *
126 * Revision 1.4  2006/02/22 09:27:59  yuvalk
127 * Rdma-
128 * RdmaCommon.cpp - StagLoad - first run on code. some bug fixes
129 * uRdmaWriteReadResp.cpp - some minor changes
130 *
131 * Revision 1.3  2006/02/20 09:41:06  yuvalk
132 * Rdma - first run on uRdmaWriteReadResp.cpp
133 * bring up of UstormRdmaSurroundingsRuntime.xml
134 * RamAccessHeader - fixed bug in RAM_ADDR macro
135 *
136 * Revision 1.2  2006/02/13 08:47:18  yuvalk
137 * Rdma -
138 * uRdmaWriteReadResp.cpp
139 * - calling loadPbl function, using 6 PBEs
140 * - change in cache coherency entry structure
141 *
142 * Revision 1.1  2006/02/08 10:39:29  shmulikr
143 * Microcode Hsi include files
144 *
145 ********************************************************************************
146 */
147 #ifndef __RDMA_CONSTANTS_H_
148 #define __RDMA_CONSTANTS_H_
149 
150 /**
151 * This file defines HSI constants for the RDMA flows
152 */
153 
154 #include "microcode_constants.h"
155 
156 /* SQ WQE operations */
157 #define EVEREST_SQ_WQE_OP_INTERNAL					(1 << 7)
158 #define EVEREST_SQ_WQE_OP_INLINE					(1 << 6)
159 
160 #define EVEREST_SQ_WQE_OP_WRITE						(0)
161 #define EVEREST_SQ_WQE_OP_WRITE_INLINE				(EVEREST_SQ_WQE_OP_WRITE | EVEREST_SQ_WQE_OP_INLINE)
162 #define EVEREST_SQ_WQE_OP_READ						(1)
163 #define EVEREST_SQ_WQE_OP_READ_INVAL_LOCAL			(EVEREST_SQ_WQE_OP_READ | EVEREST_SQ_WQE_OP_INTERNAL)
164 #define EVEREST_SQ_WQE_OP_READ_RESP					(2) /* not a WQE opcode -  reserved for network opcode only */
165 #define EVEREST_SQ_WQE_OP_SEND						(3)
166 #define EVEREST_SQ_WQE_OP_SEND_INVAL				(4)
167 #define EVEREST_SQ_WQE_OP_SEND_SE					(5)
168 #define EVEREST_SQ_WQE_OP_SEND_SE_INVAL				(6)
169 #define EVEREST_SQ_WQE_OP_SEND_INLINE				(EVEREST_SQ_WQE_OP_SEND				| EVEREST_SQ_WQE_OP_INLINE)
170 #define EVEREST_SQ_WQE_OP_SEND_INVAL_INLINE			(EVEREST_SQ_WQE_OP_SEND_INVAL		| EVEREST_SQ_WQE_OP_INLINE)
171 #define EVEREST_SQ_WQE_OP_SEND_SE_INLINE			(EVEREST_SQ_WQE_OP_SEND_SE			| EVEREST_SQ_WQE_OP_INLINE)
172 #define EVEREST_SQ_WQE_OP_SEND_SE_INVAL_INLINE		(EVEREST_SQ_WQE_OP_SEND_SE_INVAL	| EVEREST_SQ_WQE_OP_INLINE)
173 #define EVEREST_SQ_WQE_OP_TERMINATE					(7)
174 
175 #define EVEREST_SQ_WQE_OP_BIND_MEM_WINDOW			((8)	| EVEREST_SQ_WQE_OP_INTERNAL)
176 #define EVEREST_SQ_WQE_OP_FAST_MEM_REGISTER			((9)	| EVEREST_SQ_WQE_OP_INTERNAL)
177 #define EVEREST_SQ_WQE_OP_INVAL_LOCAL				((10)	| EVEREST_SQ_WQE_OP_INTERNAL)
178 #define EVEREST_SQ_WQE_INVALID_OPCODE				(0xFF)
179 
180 /* DDP and RDMAP versions */
181 #define RDMA_RDMAP_DDP_VERSION_RDMAC	(0)		/* RDMAP and DDP versions must have the same value hence use the same "define" */
182 #define RDMA_RDMAP_DDP_VERSION_IETF		(1)		/* RDMAP and DDP versions must have the same value hence use the same "define" */
183 
184 /* MPA Markers */
185 #define RDMA_MPA_USE_MARKERS_FLAG (0x8000)
186 
187 /* CQE constants */
188 #define RDMA_CQE_TYPE_NON_AGGR	(1)
189 #define RDMA_CQE_STATUS_OK		(0)
190 
191 /* RQ WQE constants */
192 #define RDMA_RQ_WQE_SHIFT		(6)
193 #define RDMA_RQ_WQE_SGL_SIZE_SMALL		(2) /* number of SGES in 64 byte WQE */
194 #define RDMA_RQ_WQE_SGL_SIZE_BIG		(6) /* number of SGES in 128 byte WQE */
195 
196 /* Slow path commands */
197 #define RDMA_RAMROD_CMD_ID_SEND_MPA						(14)
198 #define RDMA_RAMROD_CMD_ID_UPDATE_ULP					(15)
199 #define	RDMA_RAMROD_CMD_ID_CLOSE_PHY_PORT				(16)
200 
201 /* Terminate message constants */
202 #define RDMA_MAX_TERMINATE_MESSAGE_SIZE (52) // in bytes
203 
204 
205 #define RDMA_FWD_MODE_L2	(0)
206 #define RDMA_FWD_MODE_RDMA	(1)
207 /* Event reporting constants */
208 
209 // number of elements in the EQ that are reserved for slow path completions, catastrophic error
210 // in case the EQ is (almost) full, and an end of page element
211 #define RESERVED_EQ_ELEMENTS (MAX_RAMRODS_PER_PORT + 2)
212 
213 // Event types
214 #define RDMA_EVENT_TYPE_ASYNC					(0)
215 #define RDMA_EVENT_TYPE_ERROR					(1)
216 #define RDMA_EVENT_TYPE_TERMINATE_MESSAGE		(2)
217 #define RDMA_EVENT_TYPE_SLOW_PATH_COMPLETION	(3)
218 
219 // Source types
220 #define RDMA_SOURCE_TYPE_RNIC	(0)
221 #define RDMA_SOURCE_TYPE_QP		(1)
222 #define RDMA_SOURCE_TYPE_CQ		(2)
223 #define RDMA_SOURCE_TYPE_SRQ	(3)
224 
225 // Queue types
226 #define RDMA_QUEUE_TYPE_NONE	(0)
227 #define RDMA_QUEUE_TYPE_SQ		(1)
228 #define RDMA_QUEUE_TYPE_RQ		(2)
229 #define RDMA_QUEUE_TYPE_IRQ		(3)
230 #define RDMA_QUEUE_TYPE_SRQ		(4)
231 
232 // Asynchronous event types - from Verbs
233 #define RDMA_ASYNC_EVENT_LLP_CLOSE_COMPLETE						(0)
234 #define RDMA_ASYNC_EVENT_TERMINATE_MESSAGE_RECEIVED				(1)
235 #define RDMA_ASYNC_EVENT_LLP_CONNECTION_RESET					(2)
236 #define RDMA_ASYNC_EVENT_LLP_CONNECTION_LOST					(3)
237 #define RDMA_ASYNC_EVENT_LLP_INTEGRITY_INVALID_SEGMENT_SIZE		(4)
238 #define RDMA_ASYNC_EVENT_LLP_INTEGRITY_INVALID_CRC				(5)
239 #define RDMA_ASYNC_EVENT_LLP_INTEGRITY_BAD_FPDU					(6)
240 #define RDMA_ASYNC_EVENT_REMOTE_INVALID_DDP_VERSION				(7)
241 #define RDMA_ASYNC_EVENT_REMOTE_INVALID_RDMA_VERSION			(8)
242 #define RDMA_ASYNC_EVENT_REMOTE_UNEXPECTED_OPCODE				(9)
243 #define RDMA_ASYNC_EVENT_REMOTE_INVALID_DDP_QUEUE_NUMBER		(10)
244 #define RDMA_ASYNC_EVENT_REMOTE_READ_REQUEST_DISABLED			(11)
245 #define RDMA_ASYNC_EVENT_REMOTE_WRITE_OR_READ_RESPONSE_DISABLED (12)
246 #define RDMA_ASYNC_EVENT_REMOTE_INVALID_READ_REQUEST			(13)
247 #define RDMA_ASYNC_EVENT_REMOTE_NO_L_BIT						(14)
248 #define RDMA_ASYNC_EVENT_PROTECTION_INVALID_STAG				(15)
249 #define RDMA_ASYNC_EVENT_PROTECTION_TAGGED_BOUNDS_VIOLATION		(16)
250 #define RDMA_ASYNC_EVENT_PROTECTION_TAGGED_ACCESS_VIOLATION		(17)
251 #define RDMA_ASYNC_EVENT_PROTECTION_TAGGED_INVALID_PD			(18)
252 #define RDMA_ASYNC_EVENT_PROTECTION_WRAP_ERROR					(19)
253 #define RDMA_ASYNC_EVENT_BAD_CLOSE								(20)
254 #define RDMA_ASYNC_EVENT_BAD_LLP_CLOSE							(21)
255 #define RDMA_ASYNC_EVENT_RQ_PROTECTION_INVALID_MSN_RANGE		(22)
256 #define RDMA_ASYNC_EVENT_RQ_PROTECTION_INVALID_MSN_GAP			(23)
257 #define RDMA_ASYNC_EVENT_IRQ_PROTECTION_TOO_MANY_READ_REQUEST	(24)
258 #define RDMA_ASYNC_EVENT_IRQ_PROTECTION_INVALID_MSN_GAP			(25)
259 #define RDMA_ASYNC_EVENT_IRQ_PROTECTION_INVALID_MSN_RANGE		(26)
260 #define RDMA_ASYNC_EVENT_IRQ_PROTECTION_INVALID_STAG			(27)
261 #define RDMA_ASYNC_EVENT_IRQ_PROTECTION_TAGGED_BOUNDS_VIOLATION (28)
262 #define RDMA_ASYNC_EVENT_IRQ_PROTECTION_TAGGED_ACCESS_VIOLATION (29)
263 #define RDMA_ASYNC_EVENT_IRQ_PROTECTION_TAGGED_INVALID_PD		(30)
264 #define RDMA_ASYNC_EVENT_IRQ_PROTECTION_WRAP_ERROR				(31)
265 #define RDMA_ASYNC_EVENT_SQ_COMPLETION_CQ_OVERFLOW				(32)
266 #define RDMA_ASYNC_EVENT_RQ_COMPLETION_CQ_OPERATION_ERROR		(33)
267 #define RDMA_ASYNC_EVENT_SRQ_ERROR_ON_QP						(34)
268 #define RDMA_ASYNC_EVENT_LOCAL_QP_CATASTROPHIC_ERROR			(35)
269 #define RDMA_ASYNC_EVENT_CQ_OVERFLOW							(36)
270 #define RDMA_ASYNC_EVENT_CQ_OPERATION_ERROR						(37)
271 #define RDMA_ASYNC_EVENT_SRQ_LIMIT_REACHED						(38)
272 #define RDMA_ASYNC_EVENT_RQ_LIMIT_REACHED						(39)
273 #define RDMA_ASYNC_EVENT_SRQ_CATASTROPHIC_ERROR					(40)
274 #define RDMA_ASYNC_EVENT_RNIC_CATASTROPHIC_ERROR				(41)
275 #define RDMA_ASYNC_EVENT_COMPLETION								(42)
276 #define RDMA_ASYNC_EVENT_SLOW_PATH_COMPLETION_SUCCEEDED			(43)
277 #define RDMA_ASYNC_EVENT_SLOW_PATH_COMPLETION_FAILED			(44)
278 #define RDMA_ASYNC_EVENT_CONNECTION_LIMIT_REACHED			    (45)
279 #define RDMA_ASYNC_EVENT_ADD_NEW_CONNECTION_SUCCEEDED			(46)
280 #define RDMA_ASYNC_EVENT_CONNECT_SUCCEEDED					    (47)
281 #define RDMA_ASYNC_EVENT_SEND_MPA_SUCCEEDED						(48)
282 #define RDMA_ASYNC_EVENT_CONNECT_COMPLETE_SUCCEEDED				(49)
283 #define RDMA_ASYNC_EVENT_CONNECT_COMPLETE_FAILED				(50)
284 #define RDMA_ASYNC_EVENT_RECEIVED_MPA_SUCCEEDED					(51)
285 #define RDMA_ASYNC_EVENT_UPDATE_ULP_SUCCEEDED					(52)
286 #define RDMA_ASYNC_EVENT_PCS_REQUEST1							(53) // SYN RECEIVED
287 #define RDMA_ASYNC_EVENT_PCS_REQUEST2							(54) // Final-Ack received with MPA request
288 #define RDMA_ASYNC_EVENT_PCS_REQUEST3							(55) // Final-Ack received with DDP segment
289 #define RDMA_ASYNC_EVENT_PCS_REQUEST4							(56) // send segment through the forward channel
290 #define RDMA_ASYNC_EVENT_PCS_RESPONSE1_SUCCEEDED				(57)
291 #define	RDMA_ASYNC_EVENT_PCS_RESPONSE2_SUCCEEDED				(58)
292 #define	RDMA_ASYNC_EVENT_PCS_RESPONSE3_SUCCEEDED				(59)
293 #define RDMA_ASYNC_EVENT_PCS_RESPONSE4_SUCCEEDED				(60)
294 #define RDMA_ASYNC_EVENT_PCS_RESPONSE_FAILED					(61)
295 #define	RDMA_ASYNC_EVENT_INIT_SEED_SUCCEEDED					(62)
296 #define	RDMA_ASYNC_EVENT_UPDATE_SEED_SUCCEEDED					(63)
297 #define RDMA_ASYNC_EVENT_CLOSE_PHY_PORT_SUCCEEDED				(64)
298 #define RDMA_ASYNC_EVENT_LOCAL_CATASTROPHIC_ERROR				(65)
299 #define RDMA_COMPLETION_CODE_INVALID_REGION_STAG				(66)  // bind/FR
300 #define RDMA_COMPLETION_CODE_INVALID_WINDOW_STAG				(67)  // bind//FR
301 #define RDMA_COMPLETION_CODE_BASE_AND_BOUNDS_VIOLATION			(68)  //Bind
302 #define RDMA_COMPLETION_CODE_RIGHTS_ACCESS_VIOLATION			(69)  //Bind
303 #define RDMA_COMPLETION_CODE_STAG_NOT_IN_INVALID_STATE			(70)  // fast-register, bind
304 #define RDMA_COMPLETION_MR_NOT_IN_VALID_STATE					(71)  // fast-register, bind
305 #define RDMA_COMPLETION_CODE_INVALID_PD_ID						(72)  // fast-register, bind //used
306 
307 
308 // Asyncronous event types <--> Completion status codes (Everest specific)
309 #define RDMA_COMPLETION_CODE_QP_CATASTROPHIC_ERROR						(254)
310 #define RDMA_COMPLETION_CODE_REMOTE_TERMINATION_ERROR					(253)
311 #define RDMA_COMPLETION_CODE_INVALID_STAG								(252)
312 #define RDMA_COMPLETION_CODE_ACCESS_VIOLATION							(251)
313 #define RDMA_COMPLETION_CODE_INVALID_PD									(250)
314 #define RDMA_COMPLETION_CODE_WRAP_ERROR									(249)
315 #define RDMA_COMPLETION_CODE_INVALIDATE_STAG_PD_OR_ACCESS_RIGHTS_ERROR	(248)
316 #define RDMA_COMPLETION_CODE_ZERO_ORD									(247)
317 #define RDMA_COMPLETION_CODE_QP_NOT_IN_PRIVILEGED_MODE					(246)  // fast-register
318 #define RDMA_COMPLETION_CODE_INVALID_PAGE_SIZE							(245)  // fast-register
319 #define RDMA_COMPLETION_CODE_INVALID_PHYSICAL_BUFFER_SIZE				(244)  // fast-register
320 #define RDMA_COMPLETION_CODE_INVALID_PHYSICAL_BUFFER_LIST_ENTRY			(243)  // fast-register
321 #define RDMA_COMPLETION_CODE_INVALID_FBO								(242)  // fast-register
322 #define RDMA_COMPLETION_CODE_INVALID_FR_LENGTH							(241)  // fast-register
323 #define RDMA_COMPLETION_CODE_INVALID_ACCESS_RIGHTS						(240)  // fast-register
324 #define RDMA_COMPLETION_CODE_PHYSICAL_BUFFER_LIST_TOO_LONG				(239)  // fast-register
325 #define RDMA_COMPLETION_CODE_INVALID_VA									(238)  // fast-register
326 #define RDMA_COMPLETION_CODE_INVALID_LENGTH								(237)
327 #define RDMA_COMPLETION_CODE_TRYING_TO_BIND_AND_QP_DOESNT_SUPPORT_BIND	(236)	// bind
328 #define RDMA_COMPLETION_MR_DOESNT_HAVE_BIND_MW_PREEMPTION				(235)  // bind
329 #define RDMA_COMPLETION_STAG_KEY_DOESNT_MATCH							(234)  // bind
330 #define RDMA_COMPLETION_MR_IS_ZERO_BASED								(233)  //bind
331 
332 #define RDMA_COMPLETION_CODE_INVALID_WQE								(232)
333 
334 // Everest specific async events
335 #define RDMA_ASYNC_EVENT_RQ_EMPTY										(85)
336 
337 
338 #define RDMA_ASYNC_EVENT_INVALID_EVENT									(0xFF)
339 
340 
341 // Terminate codes
342 #define RDMA_TERM_CODE_LLP_CLOSE_COMPLETE						(0)
343 #define RDMA_TERM_CODE_TERMINATE_MESSAGE_RECEIVED				(0)
344 #define RDMA_TERM_CODE_LLP_CONNECTION_RESET						(0)
345 #define RDMA_TERM_CODE_LLP_CONNECTION_LOST						(0)
346 #define RDMA_TERM_CODE_LLP_INTEGRITY_INVALID_SEGMENT_SIZE		(0x1000)
347 #define RDMA_TERM_CODE_LLP_INTEGRITY_INVALID_CRC				(0x0202)
348 #define RDMA_TERM_CODE_LLP_INTEGRITY_BAD_FPDU					(0x0203)
349 #define RDMA_TERM_CODE_REMOTE_INVALID_DDP_VERSION				(0x1206)
350 #define RDMA_TERM_CODE_REMOTE_INVALID_RDMA_VERSION				(0x0205)
351 #define RDMA_TERM_CODE_REMOTE_UNEXPECTED_OPCODE					(0x0206)
352 #define RDMA_TERM_CODE_REMOTE_INVALID_DDP_QUEUE_NUMBER			(0x1201)
353 #define RDMA_TERM_CODE_REMOTE_READ_REQUEST_DISABLED				(0x1201)
354 #define RDMA_TERM_CODE_REMOTE_WRITE_OR_READ_RESPONSE_DISABLED	(0)
355 #define RDMA_TERM_CODE_REMOTE_INVALID_READ_REQUEST				(0)
356 #define RDMA_TERM_CODE_REMOTE_NO_L_BIT							(0x0207)
357 #define RDMA_TERM_CODE_PROTECTION_INVALID_STAG					(0x1100)
358 #define RDMA_TERM_CODE_PROTECTION_TAGGED_BOUNDS_VIOLATION		(0x1101)
359 #define RDMA_TERM_CODE_PROTECTION_TAGGED_ACCESS_VIOLATION		(0x1102)
360 #define RDMA_TERM_CODE_PROTECTION_TAGGED_INVALID_PD				(0x1102)
361 #define RDMA_TERM_CODE_PROTECTION_WRAP_ERROR					(0x1103)
362 #define RDMA_TERM_CODE_BAD_CLOSE								(0)
363 #define RDMA_TERM_CODE_BAD_LLP_CLOSE							(0x0207)
364 #define RDMA_TERM_CODE_RQ_PROTECTION_INVALID_MSN_RANGE			(0x1202)
365 #define RDMA_TERM_CODE_RQ_PROTECTION_INVALID_MSN_GAP			(0x1202)
366 #define RDMA_TERM_CODE_IRQ_PROTECTION_TOO_MANY_READ_REQUEST		(0x1203)
367 #define RDMA_TERM_CODE_IRQ_PROTECTION_INVALID_MSN_GAP			(0x1203)
368 #define RDMA_TERM_CODE_IRQ_PROTECTION_INVALID_MSN_RANGE			(0x1203)
369 #define RDMA_TERM_CODE_IRQ_PROTECTION_INVALID_STAG				(0x0100)
370 #define RDMA_TERM_CODE_IRQ_PROTECTION_TAGGED_BOUNDS_VIOLATION	(0x0101)
371 #define RDMA_TERM_CODE_IRQ_PROTECTION_TAGGED_ACCESS_VIOLATION	(0x0102)
372 #define RDMA_TERM_CODE_IRQ_PROTECTION_TAGGED_INVALID_PD			(0x0103)
373 #define RDMA_TERM_CODE_IRQ_PROTECTION_WRAP_ERROR				(0x0104)
374 #define RDMA_TERM_CODE_SQ_COMPLETION_CQ_OVERFLOW				(0x0207)
375 #define RDMA_TERM_CODE_RQ_COMPLETION_CQ_OPERATION_ERROR			(0x0207)
376 #define RDMA_TERM_CODE_SRQ_ERROR_ON_QP							(0x0207)
377 #define RDMA_TERM_CODE_LOCAL_QP_CATASTROPHIC_ERROR				(0x0207)
378 #define RDMA_TERM_CODE_LOCAL_CATASTROPHIC_ERROR					(0x0)
379 #define RDMA_TERM_CODE_CQ_OVERFLOW								(0)
380 #define RDMA_TERM_CODE_CQ_OPERATION_ERROR						(0)
381 #define RDMA_TERM_CODE_SRQ_LIMIT_REACHED						(0)
382 #define RDMA_TERM_CODE_RQ_LIMIT_REACHED							(0)
383 #define RDMA_TERM_CODE_SRQ_CATASTROPHIC_ERROR					(0)
384 #define RDMA_TERM_CODE_RNIC_CATASTROPHIC_ERROR					(0x0208)
385 // Terminate codes for RQ completion errors
386 #define RDMA_TERM_CODE_RQ_WQE_ERROR								0
387 #define RDMA_TERM_CODE_RQ_INVALIDATE_STAG_INVALID				(0x0100)
388 #define RDMA_TERM_CODE_RQ_INVALIDATE_STAG_ACCESS_RIGHTS			(0x0102)
389 #define RDMA_TERM_CODE_RQ_INVALIDATE_STAG_INVALID_PD_ID			(0x0103)
390 #define RDMA_TERM_CODE_RQ_INVALIDATE_STAG_NOT_BOUND_TO_QP		(0x0103)
391 #define RDMA_TERM_CODE_RQ_INVALIDATE_MR_STAG_HAD_BOUND_MW		(0x0103)
392 
393 // Terminate message control fields
394 // Layer name mask
395 #define	RDMA_TERM_LAYER_MASK(termErrCode)						(((termErrCode) >> 12) & 0xf)
396 // Error type mask
397 #define	RDMA_TERM_ERR_TYPE_MASK(termErrCode)					(((termErrCode) >> 8) & 0xf)
398 // Error code mask
399 #define	RDMA_TERM_ERR_CODE_MASK(termErrCode)					((termErrCode) & 0xff)
400 
401 
402 #endif //__RDMA_CONSTANTS_H_
403