1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Texas Instruments DA8xx/OMAP-L1x "glue layer"
4 *
5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
6 *
7 * Based on the DaVinci "glue layer" code.
8 * Copyright (C) 2005-2006 by Texas Instruments
9 *
10 * DT support
11 * Copyright (c) 2016 Petr Kulhavy <petr@barix.com>
12 *
13 * This file is part of the Inventra Controller Driver for Linux.
14 */
15
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/err.h>
19 #include <linux/io.h>
20 #include <linux/of.h>
21 #include <linux/of_platform.h>
22 #include <linux/phy/phy.h>
23 #include <linux/platform_device.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/usb/usb_phy_generic.h>
26
27 #include "musb_core.h"
28
29 /*
30 * DA8XX specific definitions
31 */
32
33 /* USB 2.0 OTG module registers */
34 #define DA8XX_USB_REVISION_REG 0x00
35 #define DA8XX_USB_CTRL_REG 0x04
36 #define DA8XX_USB_STAT_REG 0x08
37 #define DA8XX_USB_EMULATION_REG 0x0c
38 #define DA8XX_USB_SRP_FIX_TIME_REG 0x18
39 #define DA8XX_USB_INTR_SRC_REG 0x20
40 #define DA8XX_USB_INTR_SRC_SET_REG 0x24
41 #define DA8XX_USB_INTR_SRC_CLEAR_REG 0x28
42 #define DA8XX_USB_INTR_MASK_REG 0x2c
43 #define DA8XX_USB_INTR_MASK_SET_REG 0x30
44 #define DA8XX_USB_INTR_MASK_CLEAR_REG 0x34
45 #define DA8XX_USB_INTR_SRC_MASKED_REG 0x38
46 #define DA8XX_USB_END_OF_INTR_REG 0x3c
47 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
48
49 /* Control register bits */
50 #define DA8XX_SOFT_RESET_MASK 1
51
52 #define DA8XX_USB_TX_EP_MASK 0x1f /* EP0 + 4 Tx EPs */
53 #define DA8XX_USB_RX_EP_MASK 0x1e /* 4 Rx EPs */
54
55 /* USB interrupt register bits */
56 #define DA8XX_INTR_USB_SHIFT 16
57 #define DA8XX_INTR_USB_MASK (0x1ff << DA8XX_INTR_USB_SHIFT) /* 8 Mentor */
58 /* interrupts and DRVVBUS interrupt */
59 #define DA8XX_INTR_DRVVBUS 0x100
60 #define DA8XX_INTR_RX_SHIFT 8
61 #define DA8XX_INTR_RX_MASK (DA8XX_USB_RX_EP_MASK << DA8XX_INTR_RX_SHIFT)
62 #define DA8XX_INTR_TX_SHIFT 0
63 #define DA8XX_INTR_TX_MASK (DA8XX_USB_TX_EP_MASK << DA8XX_INTR_TX_SHIFT)
64
65 #define DA8XX_MENTOR_CORE_OFFSET 0x400
66
67 struct da8xx_glue {
68 struct device *dev;
69 struct platform_device *musb;
70 struct platform_device *usb_phy;
71 struct clk *clk;
72 struct phy *phy;
73 };
74
75 /*
76 * Because we don't set CTRL.UINT, it's "important" to:
77 * - not read/write INTRUSB/INTRUSBE (except during
78 * initial setup, as a workaround);
79 * - use INTSET/INTCLR instead.
80 */
81
82 /**
83 * da8xx_musb_enable - enable interrupts
84 */
da8xx_musb_enable(struct musb * musb)85 static void da8xx_musb_enable(struct musb *musb)
86 {
87 void __iomem *reg_base = musb->ctrl_base;
88 u32 mask;
89
90 /* Workaround: setup IRQs through both register sets. */
91 mask = ((musb->epmask & DA8XX_USB_TX_EP_MASK) << DA8XX_INTR_TX_SHIFT) |
92 ((musb->epmask & DA8XX_USB_RX_EP_MASK) << DA8XX_INTR_RX_SHIFT) |
93 DA8XX_INTR_USB_MASK;
94 musb_writel(reg_base, DA8XX_USB_INTR_MASK_SET_REG, mask);
95
96 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
97 musb_writel(reg_base, DA8XX_USB_INTR_SRC_SET_REG,
98 DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT);
99 }
100
101 /**
102 * da8xx_musb_disable - disable HDRC and flush interrupts
103 */
da8xx_musb_disable(struct musb * musb)104 static void da8xx_musb_disable(struct musb *musb)
105 {
106 void __iomem *reg_base = musb->ctrl_base;
107
108 musb_writel(reg_base, DA8XX_USB_INTR_MASK_CLEAR_REG,
109 DA8XX_INTR_USB_MASK |
110 DA8XX_INTR_TX_MASK | DA8XX_INTR_RX_MASK);
111 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
112 }
113
114 #define portstate(stmt) stmt
115
da8xx_musb_set_vbus(struct musb * musb,int is_on)116 static void da8xx_musb_set_vbus(struct musb *musb, int is_on)
117 {
118 WARN_ON(is_on && is_peripheral_active(musb));
119 }
120
121 #define POLL_SECONDS 2
122
otg_timer(struct timer_list * t)123 static void otg_timer(struct timer_list *t)
124 {
125 struct musb *musb = from_timer(musb, t, dev_timer);
126 void __iomem *mregs = musb->mregs;
127 u8 devctl;
128 unsigned long flags;
129
130 /*
131 * We poll because DaVinci's won't expose several OTG-critical
132 * status change events (from the transceiver) otherwise.
133 */
134 devctl = musb_readb(mregs, MUSB_DEVCTL);
135 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
136 usb_otg_state_string(musb->xceiv->otg->state));
137
138 spin_lock_irqsave(&musb->lock, flags);
139 switch (musb->xceiv->otg->state) {
140 case OTG_STATE_A_WAIT_BCON:
141 devctl &= ~MUSB_DEVCTL_SESSION;
142 musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
143
144 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
145 if (devctl & MUSB_DEVCTL_BDEVICE) {
146 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
147 MUSB_DEV_MODE(musb);
148 } else {
149 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
150 MUSB_HST_MODE(musb);
151 }
152 break;
153 case OTG_STATE_A_WAIT_VFALL:
154 /*
155 * Wait till VBUS falls below SessionEnd (~0.2 V); the 1.3
156 * RTL seems to mis-handle session "start" otherwise (or in
157 * our case "recover"), in routine "VBUS was valid by the time
158 * VBUSERR got reported during enumeration" cases.
159 */
160 if (devctl & MUSB_DEVCTL_VBUS) {
161 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
162 break;
163 }
164 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
165 musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG,
166 MUSB_INTR_VBUSERROR << DA8XX_INTR_USB_SHIFT);
167 break;
168 case OTG_STATE_B_IDLE:
169 /*
170 * There's no ID-changed IRQ, so we have no good way to tell
171 * when to switch to the A-Default state machine (by setting
172 * the DEVCTL.Session bit).
173 *
174 * Workaround: whenever we're in B_IDLE, try setting the
175 * session flag every few seconds. If it works, ID was
176 * grounded and we're now in the A-Default state machine.
177 *
178 * NOTE: setting the session flag is _supposed_ to trigger
179 * SRP but clearly it doesn't.
180 */
181 musb_writeb(mregs, MUSB_DEVCTL, devctl | MUSB_DEVCTL_SESSION);
182 devctl = musb_readb(mregs, MUSB_DEVCTL);
183 if (devctl & MUSB_DEVCTL_BDEVICE)
184 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
185 else
186 musb->xceiv->otg->state = OTG_STATE_A_IDLE;
187 break;
188 default:
189 break;
190 }
191 spin_unlock_irqrestore(&musb->lock, flags);
192 }
193
da8xx_musb_try_idle(struct musb * musb,unsigned long timeout)194 static void __maybe_unused da8xx_musb_try_idle(struct musb *musb, unsigned long timeout)
195 {
196 static unsigned long last_timer;
197
198 if (timeout == 0)
199 timeout = jiffies + msecs_to_jiffies(3);
200
201 /* Never idle if active, or when VBUS timeout is not set as host */
202 if (musb->is_active || (musb->a_wait_bcon == 0 &&
203 musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
204 dev_dbg(musb->controller, "%s active, deleting timer\n",
205 usb_otg_state_string(musb->xceiv->otg->state));
206 del_timer(&musb->dev_timer);
207 last_timer = jiffies;
208 return;
209 }
210
211 if (time_after(last_timer, timeout) && timer_pending(&musb->dev_timer)) {
212 dev_dbg(musb->controller, "Longer idle timer already pending, ignoring...\n");
213 return;
214 }
215 last_timer = timeout;
216
217 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
218 usb_otg_state_string(musb->xceiv->otg->state),
219 jiffies_to_msecs(timeout - jiffies));
220 mod_timer(&musb->dev_timer, timeout);
221 }
222
da8xx_babble_recover(struct musb * musb)223 static int da8xx_babble_recover(struct musb *musb)
224 {
225 dev_dbg(musb->controller, "resetting controller to recover from babble\n");
226 musb_writel(musb->ctrl_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
227 return 0;
228 }
229
da8xx_musb_interrupt(int irq,void * hci)230 static irqreturn_t da8xx_musb_interrupt(int irq, void *hci)
231 {
232 struct musb *musb = hci;
233 void __iomem *reg_base = musb->ctrl_base;
234 unsigned long flags;
235 irqreturn_t ret = IRQ_NONE;
236 u32 status;
237
238 spin_lock_irqsave(&musb->lock, flags);
239
240 /*
241 * NOTE: DA8XX shadows the Mentor IRQs. Don't manage them through
242 * the Mentor registers (except for setup), use the TI ones and EOI.
243 */
244
245 /* Acknowledge and handle non-CPPI interrupts */
246 status = musb_readl(reg_base, DA8XX_USB_INTR_SRC_MASKED_REG);
247 if (!status)
248 goto eoi;
249
250 musb_writel(reg_base, DA8XX_USB_INTR_SRC_CLEAR_REG, status);
251 dev_dbg(musb->controller, "USB IRQ %08x\n", status);
252
253 musb->int_rx = (status & DA8XX_INTR_RX_MASK) >> DA8XX_INTR_RX_SHIFT;
254 musb->int_tx = (status & DA8XX_INTR_TX_MASK) >> DA8XX_INTR_TX_SHIFT;
255 musb->int_usb = (status & DA8XX_INTR_USB_MASK) >> DA8XX_INTR_USB_SHIFT;
256
257 /*
258 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
259 * DA8xx's missing ID change IRQ. We need an ID change IRQ to
260 * switch appropriately between halves of the OTG state machine.
261 * Managing DEVCTL.Session per Mentor docs requires that we know its
262 * value but DEVCTL.BDevice is invalid without DEVCTL.Session set.
263 * Also, DRVVBUS pulses for SRP (but not at 5 V)...
264 */
265 if (status & (DA8XX_INTR_DRVVBUS << DA8XX_INTR_USB_SHIFT)) {
266 int drvvbus = musb_readl(reg_base, DA8XX_USB_STAT_REG);
267 void __iomem *mregs = musb->mregs;
268 u8 devctl = musb_readb(mregs, MUSB_DEVCTL);
269 int err;
270
271 err = musb->int_usb & MUSB_INTR_VBUSERROR;
272 if (err) {
273 /*
274 * The Mentor core doesn't debounce VBUS as needed
275 * to cope with device connect current spikes. This
276 * means it's not uncommon for bus-powered devices
277 * to get VBUS errors during enumeration.
278 *
279 * This is a workaround, but newer RTL from Mentor
280 * seems to allow a better one: "re"-starting sessions
281 * without waiting for VBUS to stop registering in
282 * devctl.
283 */
284 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
285 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
286 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
287 WARNING("VBUS error workaround (delay coming)\n");
288 } else if (drvvbus) {
289 MUSB_HST_MODE(musb);
290 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
291 portstate(musb->port1_status |= USB_PORT_STAT_POWER);
292 del_timer(&musb->dev_timer);
293 } else if (!(musb->int_usb & MUSB_INTR_BABBLE)) {
294 /*
295 * When babble condition happens, drvvbus interrupt
296 * is also generated. Ignore this drvvbus interrupt
297 * and let babble interrupt handler recovers the
298 * controller; otherwise, the host-mode flag is lost
299 * due to the MUSB_DEV_MODE() call below and babble
300 * recovery logic will not be called.
301 */
302 musb->is_active = 0;
303 MUSB_DEV_MODE(musb);
304 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
305 portstate(musb->port1_status &= ~USB_PORT_STAT_POWER);
306 }
307
308 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
309 drvvbus ? "on" : "off",
310 usb_otg_state_string(musb->xceiv->otg->state),
311 err ? " ERROR" : "",
312 devctl);
313 ret = IRQ_HANDLED;
314 }
315
316 if (musb->int_tx || musb->int_rx || musb->int_usb)
317 ret |= musb_interrupt(musb);
318
319 eoi:
320 /* EOI needs to be written for the IRQ to be re-asserted. */
321 if (ret == IRQ_HANDLED || status)
322 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
323
324 /* Poll for ID change */
325 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE)
326 mod_timer(&musb->dev_timer, jiffies + POLL_SECONDS * HZ);
327
328 spin_unlock_irqrestore(&musb->lock, flags);
329
330 return ret;
331 }
332
da8xx_musb_set_mode(struct musb * musb,u8 musb_mode)333 static int da8xx_musb_set_mode(struct musb *musb, u8 musb_mode)
334 {
335 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
336 enum phy_mode phy_mode;
337
338 switch (musb_mode) {
339 case MUSB_HOST: /* Force VBUS valid, ID = 0 */
340 phy_mode = PHY_MODE_USB_HOST;
341 break;
342 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
343 phy_mode = PHY_MODE_USB_DEVICE;
344 break;
345 case MUSB_OTG: /* Don't override the VBUS/ID comparators */
346 phy_mode = PHY_MODE_USB_OTG;
347 break;
348 default:
349 return -EINVAL;
350 }
351
352 return phy_set_mode(glue->phy, phy_mode);
353 }
354
da8xx_musb_init(struct musb * musb)355 static int da8xx_musb_init(struct musb *musb)
356 {
357 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
358 void __iomem *reg_base = musb->ctrl_base;
359 u32 rev;
360 int ret = -ENODEV;
361
362 musb->mregs += DA8XX_MENTOR_CORE_OFFSET;
363
364 ret = clk_prepare_enable(glue->clk);
365 if (ret) {
366 dev_err(glue->dev, "failed to enable clock\n");
367 return ret;
368 }
369
370 /* Returns zero if e.g. not clocked */
371 rev = musb_readl(reg_base, DA8XX_USB_REVISION_REG);
372 if (!rev) {
373 ret = -ENODEV;
374 goto fail;
375 }
376
377 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
378 if (IS_ERR_OR_NULL(musb->xceiv)) {
379 ret = -EPROBE_DEFER;
380 goto fail;
381 }
382
383 timer_setup(&musb->dev_timer, otg_timer, 0);
384
385 /* Reset the controller */
386 musb_writel(reg_base, DA8XX_USB_CTRL_REG, DA8XX_SOFT_RESET_MASK);
387
388 /* Start the on-chip PHY and its PLL. */
389 ret = phy_init(glue->phy);
390 if (ret) {
391 dev_err(glue->dev, "Failed to init phy.\n");
392 goto fail;
393 }
394
395 ret = phy_power_on(glue->phy);
396 if (ret) {
397 dev_err(glue->dev, "Failed to power on phy.\n");
398 goto err_phy_power_on;
399 }
400
401 msleep(5);
402
403 /* NOTE: IRQs are in mixed mode, not bypass to pure MUSB */
404 pr_debug("DA8xx OTG revision %08x, control %02x\n", rev,
405 musb_readb(reg_base, DA8XX_USB_CTRL_REG));
406
407 musb->isr = da8xx_musb_interrupt;
408 return 0;
409
410 err_phy_power_on:
411 phy_exit(glue->phy);
412 fail:
413 clk_disable_unprepare(glue->clk);
414 return ret;
415 }
416
da8xx_musb_exit(struct musb * musb)417 static int da8xx_musb_exit(struct musb *musb)
418 {
419 struct da8xx_glue *glue = dev_get_drvdata(musb->controller->parent);
420
421 del_timer_sync(&musb->dev_timer);
422
423 phy_power_off(glue->phy);
424 phy_exit(glue->phy);
425 clk_disable_unprepare(glue->clk);
426
427 usb_put_phy(musb->xceiv);
428
429 return 0;
430 }
431
get_vbus_power(struct device * dev)432 static inline u8 get_vbus_power(struct device *dev)
433 {
434 struct regulator *vbus_supply;
435 int current_uA;
436
437 vbus_supply = regulator_get_optional(dev, "vbus");
438 if (IS_ERR(vbus_supply))
439 return 255;
440 current_uA = regulator_get_current_limit(vbus_supply);
441 regulator_put(vbus_supply);
442 if (current_uA <= 0 || current_uA > 510000)
443 return 255;
444 return current_uA / 1000 / 2;
445 }
446
447 #ifdef CONFIG_USB_TI_CPPI41_DMA
da8xx_dma_controller_callback(struct dma_controller * c)448 static void da8xx_dma_controller_callback(struct dma_controller *c)
449 {
450 struct musb *musb = c->musb;
451 void __iomem *reg_base = musb->ctrl_base;
452
453 musb_writel(reg_base, DA8XX_USB_END_OF_INTR_REG, 0);
454 }
455
456 static struct dma_controller *
da8xx_dma_controller_create(struct musb * musb,void __iomem * base)457 da8xx_dma_controller_create(struct musb *musb, void __iomem *base)
458 {
459 struct dma_controller *controller;
460
461 controller = cppi41_dma_controller_create(musb, base);
462 if (IS_ERR_OR_NULL(controller))
463 return controller;
464
465 controller->dma_callback = da8xx_dma_controller_callback;
466
467 return controller;
468 }
469 #endif
470
471 static const struct musb_platform_ops da8xx_ops = {
472 .quirks = MUSB_INDEXED_EP | MUSB_PRESERVE_SESSION |
473 MUSB_DMA_CPPI41 | MUSB_DA8XX,
474 .init = da8xx_musb_init,
475 .exit = da8xx_musb_exit,
476
477 .fifo_mode = 2,
478 #ifdef CONFIG_USB_TI_CPPI41_DMA
479 .dma_init = da8xx_dma_controller_create,
480 .dma_exit = cppi41_dma_controller_destroy,
481 #endif
482 .enable = da8xx_musb_enable,
483 .disable = da8xx_musb_disable,
484
485 .set_mode = da8xx_musb_set_mode,
486
487 #ifndef CONFIG_USB_MUSB_HOST
488 .try_idle = da8xx_musb_try_idle,
489 #endif
490 .recover = da8xx_babble_recover,
491
492 .set_vbus = da8xx_musb_set_vbus,
493 };
494
495 static const struct platform_device_info da8xx_dev_info = {
496 .name = "musb-hdrc",
497 .id = PLATFORM_DEVID_AUTO,
498 .dma_mask = DMA_BIT_MASK(32),
499 };
500
501 static const struct musb_hdrc_config da8xx_config = {
502 .ram_bits = 10,
503 .num_eps = 5,
504 .multipoint = 1,
505 };
506
507 static struct of_dev_auxdata da8xx_auxdata_lookup[] = {
508 OF_DEV_AUXDATA("ti,da830-cppi41", 0x01e01000, "cppi41-dmaengine",
509 NULL),
510 {}
511 };
512
da8xx_probe(struct platform_device * pdev)513 static int da8xx_probe(struct platform_device *pdev)
514 {
515 struct musb_hdrc_platform_data *pdata = dev_get_platdata(&pdev->dev);
516 struct da8xx_glue *glue;
517 struct platform_device_info pinfo;
518 struct clk *clk;
519 struct device_node *np = pdev->dev.of_node;
520 int ret;
521
522 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
523 if (!glue)
524 return -ENOMEM;
525
526 clk = devm_clk_get(&pdev->dev, NULL);
527 if (IS_ERR(clk)) {
528 dev_err(&pdev->dev, "failed to get clock\n");
529 return PTR_ERR(clk);
530 }
531
532 glue->phy = devm_phy_get(&pdev->dev, "usb-phy");
533 if (IS_ERR(glue->phy))
534 return dev_err_probe(&pdev->dev, PTR_ERR(glue->phy),
535 "failed to get phy\n");
536
537 glue->dev = &pdev->dev;
538 glue->clk = clk;
539
540 if (IS_ENABLED(CONFIG_OF) && np) {
541 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
542 if (!pdata)
543 return -ENOMEM;
544
545 pdata->config = &da8xx_config;
546 pdata->mode = musb_get_mode(&pdev->dev);
547 pdata->power = get_vbus_power(&pdev->dev);
548 }
549
550 pdata->platform_ops = &da8xx_ops;
551
552 glue->usb_phy = usb_phy_generic_register();
553 ret = PTR_ERR_OR_ZERO(glue->usb_phy);
554 if (ret) {
555 dev_err(&pdev->dev, "failed to register usb_phy\n");
556 return ret;
557 }
558 platform_set_drvdata(pdev, glue);
559
560 ret = of_platform_populate(pdev->dev.of_node, NULL,
561 da8xx_auxdata_lookup, &pdev->dev);
562 if (ret)
563 goto err_unregister_phy;
564
565 pinfo = da8xx_dev_info;
566 pinfo.parent = &pdev->dev;
567 pinfo.res = pdev->resource;
568 pinfo.num_res = pdev->num_resources;
569 pinfo.data = pdata;
570 pinfo.size_data = sizeof(*pdata);
571 pinfo.fwnode = of_fwnode_handle(np);
572 pinfo.of_node_reused = true;
573
574 glue->musb = platform_device_register_full(&pinfo);
575 ret = PTR_ERR_OR_ZERO(glue->musb);
576 if (ret) {
577 dev_err(&pdev->dev, "failed to register musb device: %d\n", ret);
578 goto err_unregister_phy;
579 }
580
581 return 0;
582
583 err_unregister_phy:
584 usb_phy_generic_unregister(glue->usb_phy);
585 return ret;
586 }
587
da8xx_remove(struct platform_device * pdev)588 static void da8xx_remove(struct platform_device *pdev)
589 {
590 struct da8xx_glue *glue = platform_get_drvdata(pdev);
591
592 platform_device_unregister(glue->musb);
593 usb_phy_generic_unregister(glue->usb_phy);
594 }
595
596 #ifdef CONFIG_PM_SLEEP
da8xx_suspend(struct device * dev)597 static int da8xx_suspend(struct device *dev)
598 {
599 int ret;
600 struct da8xx_glue *glue = dev_get_drvdata(dev);
601
602 ret = phy_power_off(glue->phy);
603 if (ret)
604 return ret;
605 clk_disable_unprepare(glue->clk);
606
607 return 0;
608 }
609
da8xx_resume(struct device * dev)610 static int da8xx_resume(struct device *dev)
611 {
612 int ret;
613 struct da8xx_glue *glue = dev_get_drvdata(dev);
614
615 ret = clk_prepare_enable(glue->clk);
616 if (ret)
617 return ret;
618 return phy_power_on(glue->phy);
619 }
620 #endif
621
622 static SIMPLE_DEV_PM_OPS(da8xx_pm_ops, da8xx_suspend, da8xx_resume);
623
624 #ifdef CONFIG_OF
625 static const struct of_device_id da8xx_id_table[] = {
626 {
627 .compatible = "ti,da830-musb",
628 },
629 {},
630 };
631 MODULE_DEVICE_TABLE(of, da8xx_id_table);
632 #endif
633
634 static struct platform_driver da8xx_driver = {
635 .probe = da8xx_probe,
636 .remove_new = da8xx_remove,
637 .driver = {
638 .name = "musb-da8xx",
639 .pm = &da8xx_pm_ops,
640 .of_match_table = of_match_ptr(da8xx_id_table),
641 },
642 };
643
644 MODULE_DESCRIPTION("DA8xx/OMAP-L1x MUSB Glue Layer");
645 MODULE_AUTHOR("Sergei Shtylyov <sshtylyov@ru.mvista.com>");
646 MODULE_LICENSE("GPL v2");
647 module_platform_driver(da8xx_driver);
648