xref: /linux/arch/mips/include/asm/mips-boards/bonito64.h (revision 06d07429858317ded2db7986113a9e0129cd599b)
1 /*
2  * Bonito Register Map
3  *
4  * This file is the original bonito.h from Algorithmics with minor changes
5  * to fit into linux.
6  *
7  * Copyright (c) 1999 Algorithmics Ltd
8  *
9  * Carsten Langgaard, carstenl@mips.com
10  * Copyright (C) 2001 MIPS Technologies, Inc.  All rights reserved.
11  *
12  * Algorithmics gives permission for anyone to use and modify this file
13  * without any obligation or license condition except that you retain
14  * this copyright message in any source redistribution in whole or part.
15  *
16  */
17 
18 /* Revision 1.48 autogenerated on 08/17/99 15:20:01 */
19 /* This bonito64 version edited from bonito.h Revision 1.48 on 11/09/00 */
20 
21 #ifndef _ASM_MIPS_BOARDS_BONITO64_H
22 #define _ASM_MIPS_BOARDS_BONITO64_H
23 
24 #ifdef __ASSEMBLY__
25 
26 /* offsets from base register */
27 #define BONITO(x)	(x)
28 
29 #else
30 
31 /*
32  * Algorithmics Bonito64 system controller register base.
33  */
34 extern unsigned long _pcictrl_bonito;
35 extern unsigned long _pcictrl_bonito_pcicfg;
36 
37 #define BONITO(x)		*(volatile u32 *)(_pcictrl_bonito + (x))
38 
39 #endif /* __ASSEMBLY__ */
40 
41 
42 #define BONITO_BOOT_BASE		0x1fc00000
43 #define BONITO_BOOT_SIZE		0x00100000
44 #define BONITO_BOOT_TOP			(BONITO_BOOT_BASE+BONITO_BOOT_SIZE-1)
45 #define BONITO_FLASH_BASE		0x1c000000
46 #define BONITO_FLASH_SIZE		0x03000000
47 #define BONITO_FLASH_TOP		(BONITO_FLASH_BASE+BONITO_FLASH_SIZE-1)
48 #define BONITO_SOCKET_BASE		0x1f800000
49 #define BONITO_SOCKET_SIZE		0x00400000
50 #define BONITO_SOCKET_TOP		(BONITO_SOCKET_BASE+BONITO_SOCKET_SIZE-1)
51 #define BONITO_REG_BASE			0x1fe00000
52 #define BONITO_REG_SIZE			0x00040000
53 #define BONITO_REG_TOP			(BONITO_REG_BASE+BONITO_REG_SIZE-1)
54 #define BONITO_DEV_BASE			0x1ff00000
55 #define BONITO_DEV_SIZE			0x00100000
56 #define BONITO_DEV_TOP			(BONITO_DEV_BASE+BONITO_DEV_SIZE-1)
57 #define BONITO_PCILO_BASE		0x10000000
58 #define BONITO_PCILO_SIZE		0x0c000000
59 #define BONITO_PCILO_TOP		(BONITO_PCILO_BASE+BONITO_PCILO_SIZE-1)
60 #define BONITO_PCILO0_BASE		0x10000000
61 #define BONITO_PCILO1_BASE		0x14000000
62 #define BONITO_PCILO2_BASE		0x18000000
63 #define BONITO_PCIHI_BASE		0x20000000
64 #define BONITO_PCIHI_SIZE		0x20000000
65 #define BONITO_PCIHI_TOP		(BONITO_PCIHI_BASE+BONITO_PCIHI_SIZE-1)
66 #define BONITO_PCIIO_BASE		0x1fd00000
67 #define BONITO_PCIIO_SIZE		0x00100000
68 #define BONITO_PCIIO_TOP		(BONITO_PCIIO_BASE+BONITO_PCIIO_SIZE-1)
69 #define BONITO_PCICFG_BASE		0x1fe80000
70 #define BONITO_PCICFG_SIZE		0x00080000
71 #define BONITO_PCICFG_TOP		(BONITO_PCICFG_BASE+BONITO_PCICFG_SIZE-1)
72 
73 
74 /* Bonito Register Bases */
75 
76 #define BONITO_PCICONFIGBASE		0x00
77 #define BONITO_REGBASE			0x100
78 
79 
80 /* PCI Configuration  Registers */
81 
82 #define BONITO_PCI_REG(x)		BONITO(BONITO_PCICONFIGBASE + (x))
83 #define BONITO_PCIDID			BONITO_PCI_REG(0x00)
84 #define BONITO_PCICMD			BONITO_PCI_REG(0x04)
85 #define BONITO_PCICLASS			BONITO_PCI_REG(0x08)
86 #define BONITO_PCILTIMER		BONITO_PCI_REG(0x0c)
87 #define BONITO_PCIBASE0			BONITO_PCI_REG(0x10)
88 #define BONITO_PCIBASE1			BONITO_PCI_REG(0x14)
89 #define BONITO_PCIBASE2			BONITO_PCI_REG(0x18)
90 #define BONITO_PCIEXPRBASE		BONITO_PCI_REG(0x30)
91 #define BONITO_PCIINT			BONITO_PCI_REG(0x3c)
92 
93 #define BONITO_PCICMD_PERR_CLR		0x80000000
94 #define BONITO_PCICMD_SERR_CLR		0x40000000
95 #define BONITO_PCICMD_MABORT_CLR	0x20000000
96 #define BONITO_PCICMD_MTABORT_CLR	0x10000000
97 #define BONITO_PCICMD_TABORT_CLR	0x08000000
98 #define BONITO_PCICMD_MPERR_CLR		0x01000000
99 #define BONITO_PCICMD_PERRRESPEN	0x00000040
100 #define BONITO_PCICMD_ASTEPEN		0x00000080
101 #define BONITO_PCICMD_SERREN		0x00000100
102 #define BONITO_PCILTIMER_BUSLATENCY	0x0000ff00
103 #define BONITO_PCILTIMER_BUSLATENCY_SHIFT	8
104 
105 
106 
107 
108 /* 1. Bonito h/w Configuration */
109 /* Power on register */
110 
111 #define BONITO_BONPONCFG		BONITO(BONITO_REGBASE + 0x00)
112 
113 #define BONITO_BONPONCFG_SYSCONTROLLERRD	0x00040000
114 #define BONITO_BONPONCFG_ROMCS1SAMP	0x00020000
115 #define BONITO_BONPONCFG_ROMCS0SAMP	0x00010000
116 #define BONITO_BONPONCFG_CPUBIGEND	0x00004000
117 /* Added by RPF 11-9-00 */
118 #define BONITO_BONPONCFG_BURSTORDER	0x00001000
119 /* --- */
120 #define BONITO_BONPONCFG_CPUPARITY	0x00002000
121 #define BONITO_BONPONCFG_CPUTYPE	0x00000007
122 #define BONITO_BONPONCFG_CPUTYPE_SHIFT	0
123 #define BONITO_BONPONCFG_PCIRESET_OUT	0x00000008
124 #define BONITO_BONPONCFG_IS_ARBITER	0x00000010
125 #define BONITO_BONPONCFG_ROMBOOT	0x000000c0
126 #define BONITO_BONPONCFG_ROMBOOT_SHIFT	6
127 
128 #define BONITO_BONPONCFG_ROMBOOT_FLASH	(0x0<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
129 #define BONITO_BONPONCFG_ROMBOOT_SOCKET (0x1<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
130 #define BONITO_BONPONCFG_ROMBOOT_SDRAM	(0x2<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
131 #define BONITO_BONPONCFG_ROMBOOT_CPURESET	(0x3<<BONITO_BONPONCFG_ROMBOOT_SHIFT)
132 
133 #define BONITO_BONPONCFG_ROMCS0WIDTH	0x00000100
134 #define BONITO_BONPONCFG_ROMCS1WIDTH	0x00000200
135 #define BONITO_BONPONCFG_ROMCS0FAST	0x00000400
136 #define BONITO_BONPONCFG_ROMCS1FAST	0x00000800
137 #define BONITO_BONPONCFG_CONFIG_DIS	0x00000020
138 
139 
140 /* Other Bonito configuration */
141 
142 #define BONITO_BONGENCFG_OFFSET		0x4
143 #define BONITO_BONGENCFG		BONITO(BONITO_REGBASE + BONITO_BONGENCFG_OFFSET)
144 
145 #define BONITO_BONGENCFG_DEBUGMODE	0x00000001
146 #define BONITO_BONGENCFG_SNOOPEN	0x00000002
147 #define BONITO_BONGENCFG_CPUSELFRESET	0x00000004
148 
149 #define BONITO_BONGENCFG_FORCE_IRQA	0x00000008
150 #define BONITO_BONGENCFG_IRQA_ISOUT	0x00000010
151 #define BONITO_BONGENCFG_IRQA_FROM_INT1 0x00000020
152 #define BONITO_BONGENCFG_BYTESWAP	0x00000040
153 
154 #define BONITO_BONGENCFG_UNCACHED	0x00000080
155 #define BONITO_BONGENCFG_PREFETCHEN	0x00000100
156 #define BONITO_BONGENCFG_WBEHINDEN	0x00000200
157 #define BONITO_BONGENCFG_CACHEALG	0x00000c00
158 #define BONITO_BONGENCFG_CACHEALG_SHIFT 10
159 #define BONITO_BONGENCFG_PCIQUEUE	0x00001000
160 #define BONITO_BONGENCFG_CACHESTOP	0x00002000
161 #define BONITO_BONGENCFG_MSTRBYTESWAP	0x00004000
162 #define BONITO_BONGENCFG_BUSERREN	0x00008000
163 #define BONITO_BONGENCFG_NORETRYTIMEOUT 0x00010000
164 #define BONITO_BONGENCFG_SHORTCOPYTIMEOUT	0x00020000
165 
166 /* 2. IO & IDE configuration */
167 
168 #define BONITO_IODEVCFG			BONITO(BONITO_REGBASE + 0x08)
169 
170 /* 3. IO & IDE configuration */
171 
172 #define BONITO_SDCFG			BONITO(BONITO_REGBASE + 0x0c)
173 
174 /* 4. PCI address map control */
175 
176 #define BONITO_PCIMAP			BONITO(BONITO_REGBASE + 0x10)
177 #define BONITO_PCIMEMBASECFG		BONITO(BONITO_REGBASE + 0x14)
178 #define BONITO_PCIMAP_CFG		BONITO(BONITO_REGBASE + 0x18)
179 
180 /* 5. ICU & GPIO regs */
181 
182 /* GPIO Regs - r/w */
183 
184 #define BONITO_GPIODATA_OFFSET		0x1c
185 #define BONITO_GPIODATA			BONITO(BONITO_REGBASE + BONITO_GPIODATA_OFFSET)
186 #define BONITO_GPIOIE			BONITO(BONITO_REGBASE + 0x20)
187 
188 /* ICU Configuration Regs - r/w */
189 
190 #define BONITO_INTEDGE			BONITO(BONITO_REGBASE + 0x24)
191 #define BONITO_INTSTEER			BONITO(BONITO_REGBASE + 0x28)
192 #define BONITO_INTPOL			BONITO(BONITO_REGBASE + 0x2c)
193 
194 /* ICU Enable Regs - IntEn & IntISR are r/o. */
195 
196 #define BONITO_INTENSET			BONITO(BONITO_REGBASE + 0x30)
197 #define BONITO_INTENCLR			BONITO(BONITO_REGBASE + 0x34)
198 #define BONITO_INTEN			BONITO(BONITO_REGBASE + 0x38)
199 #define BONITO_INTISR			BONITO(BONITO_REGBASE + 0x3c)
200 
201 /* PCI mail boxes */
202 
203 #define BONITO_PCIMAIL0_OFFSET		0x40
204 #define BONITO_PCIMAIL1_OFFSET		0x44
205 #define BONITO_PCIMAIL2_OFFSET		0x48
206 #define BONITO_PCIMAIL3_OFFSET		0x4c
207 #define BONITO_PCIMAIL0			BONITO(BONITO_REGBASE + 0x40)
208 #define BONITO_PCIMAIL1			BONITO(BONITO_REGBASE + 0x44)
209 #define BONITO_PCIMAIL2			BONITO(BONITO_REGBASE + 0x48)
210 #define BONITO_PCIMAIL3			BONITO(BONITO_REGBASE + 0x4c)
211 
212 
213 /* 6. PCI cache */
214 
215 #define BONITO_PCICACHECTRL		BONITO(BONITO_REGBASE + 0x50)
216 #define BONITO_PCICACHETAG		BONITO(BONITO_REGBASE + 0x54)
217 
218 #define BONITO_PCIBADADDR		BONITO(BONITO_REGBASE + 0x58)
219 #define BONITO_PCIMSTAT			BONITO(BONITO_REGBASE + 0x5c)
220 
221 
222 /*
223 #define BONITO_PCIRDPOST		BONITO(BONITO_REGBASE + 0x60)
224 #define BONITO_PCIDATA			BONITO(BONITO_REGBASE + 0x64)
225 */
226 
227 /* 7. IDE DMA & Copier */
228 
229 #define BONITO_CONFIGBASE		0x000
230 #define BONITO_BONITOBASE		0x100
231 #define BONITO_LDMABASE			0x200
232 #define BONITO_COPBASE			0x300
233 #define BONITO_REG_BLOCKMASK		0x300
234 
235 #define BONITO_LDMACTRL			BONITO(BONITO_LDMABASE + 0x0)
236 #define BONITO_LDMASTAT			BONITO(BONITO_LDMABASE + 0x0)
237 #define BONITO_LDMAADDR			BONITO(BONITO_LDMABASE + 0x4)
238 #define BONITO_LDMAGO			BONITO(BONITO_LDMABASE + 0x8)
239 #define BONITO_LDMADATA			BONITO(BONITO_LDMABASE + 0xc)
240 
241 #define BONITO_COPCTRL			BONITO(BONITO_COPBASE + 0x0)
242 #define BONITO_COPSTAT			BONITO(BONITO_COPBASE + 0x0)
243 #define BONITO_COPPADDR			BONITO(BONITO_COPBASE + 0x4)
244 #define BONITO_COPDADDR			BONITO(BONITO_COPBASE + 0x8)
245 #define BONITO_COPGO			BONITO(BONITO_COPBASE + 0xc)
246 
247 
248 /* ###### Bit Definitions for individual Registers #### */
249 
250 /* Gen DMA. */
251 
252 #define BONITO_IDECOPDADDR_DMA_DADDR	0x0ffffffc
253 #define BONITO_IDECOPDADDR_DMA_DADDR_SHIFT	2
254 #define BONITO_IDECOPPADDR_DMA_PADDR	0xfffffffc
255 #define BONITO_IDECOPPADDR_DMA_PADDR_SHIFT	2
256 #define BONITO_IDECOPGO_DMA_SIZE	0x0000fffe
257 #define BONITO_IDECOPGO_DMA_SIZE_SHIFT	0
258 #define BONITO_IDECOPGO_DMA_WRITE	0x00010000
259 #define BONITO_IDECOPGO_DMAWCOUNT	0x000f0000
260 #define BONITO_IDECOPGO_DMAWCOUNT_SHIFT 16
261 
262 #define BONITO_IDECOPCTRL_DMA_STARTBIT	0x80000000
263 #define BONITO_IDECOPCTRL_DMA_RSTBIT	0x40000000
264 
265 /* DRAM - sdCfg */
266 
267 #define BONITO_SDCFG_AROWBITS		0x00000003
268 #define BONITO_SDCFG_AROWBITS_SHIFT	0
269 #define BONITO_SDCFG_ACOLBITS		0x0000000c
270 #define BONITO_SDCFG_ACOLBITS_SHIFT	2
271 #define BONITO_SDCFG_ABANKBIT		0x00000010
272 #define BONITO_SDCFG_ASIDES		0x00000020
273 #define BONITO_SDCFG_AABSENT		0x00000040
274 #define BONITO_SDCFG_AWIDTH64		0x00000080
275 
276 #define BONITO_SDCFG_BROWBITS		0x00000300
277 #define BONITO_SDCFG_BROWBITS_SHIFT	8
278 #define BONITO_SDCFG_BCOLBITS		0x00000c00
279 #define BONITO_SDCFG_BCOLBITS_SHIFT	10
280 #define BONITO_SDCFG_BBANKBIT		0x00001000
281 #define BONITO_SDCFG_BSIDES		0x00002000
282 #define BONITO_SDCFG_BABSENT		0x00004000
283 #define BONITO_SDCFG_BWIDTH64		0x00008000
284 
285 #define BONITO_SDCFG_EXTRDDATA		0x00010000
286 #define BONITO_SDCFG_EXTRASCAS		0x00020000
287 #define BONITO_SDCFG_EXTPRECH		0x00040000
288 #define BONITO_SDCFG_EXTRASWIDTH	0x00180000
289 #define BONITO_SDCFG_EXTRASWIDTH_SHIFT	19
290 /* Changed by RPF 11-9-00 */
291 #define BONITO_SDCFG_DRAMMODESET	0x00200000
292 /* --- */
293 #define BONITO_SDCFG_DRAMEXTREGS	0x00400000
294 #define BONITO_SDCFG_DRAMPARITY		0x00800000
295 /* Added by RPF 11-9-00 */
296 #define BONITO_SDCFG_DRAMBURSTLEN	0x03000000
297 #define BONITO_SDCFG_DRAMBURSTLEN_SHIFT 24
298 #define BONITO_SDCFG_DRAMMODESET_DONE	0x80000000
299 /* --- */
300 
301 /* PCI Cache - pciCacheCtrl */
302 
303 #define BONITO_PCICACHECTRL_CACHECMD	0x00000007
304 #define BONITO_PCICACHECTRL_CACHECMD_SHIFT	0
305 #define BONITO_PCICACHECTRL_CACHECMDLINE	0x00000018
306 #define BONITO_PCICACHECTRL_CACHECMDLINE_SHIFT	3
307 #define BONITO_PCICACHECTRL_CMDEXEC	0x00000020
308 
309 #define BONITO_PCICACHECTRL_IOBCCOH_PRES	0x00000100
310 #define BONITO_PCICACHECTRL_IOBCCOH_EN	0x00000200
311 #define BONITO_PCICACHECTRL_CPUCOH_PRES 0x00000400
312 #define BONITO_PCICACHECTRL_CPUCOH_EN	0x00000800
313 
314 #define BONITO_IODEVCFG_BUFFBIT_CS0	0x00000001
315 #define BONITO_IODEVCFG_SPEEDBIT_CS0	0x00000002
316 #define BONITO_IODEVCFG_MOREABITS_CS0	0x00000004
317 
318 #define BONITO_IODEVCFG_BUFFBIT_CS1	0x00000008
319 #define BONITO_IODEVCFG_SPEEDBIT_CS1	0x00000010
320 #define BONITO_IODEVCFG_MOREABITS_CS1	0x00000020
321 
322 #define BONITO_IODEVCFG_BUFFBIT_CS2	0x00000040
323 #define BONITO_IODEVCFG_SPEEDBIT_CS2	0x00000080
324 #define BONITO_IODEVCFG_MOREABITS_CS2	0x00000100
325 
326 #define BONITO_IODEVCFG_BUFFBIT_CS3	0x00000200
327 #define BONITO_IODEVCFG_SPEEDBIT_CS3	0x00000400
328 #define BONITO_IODEVCFG_MOREABITS_CS3	0x00000800
329 
330 #define BONITO_IODEVCFG_BUFFBIT_IDE	0x00001000
331 #define BONITO_IODEVCFG_SPEEDBIT_IDE	0x00002000
332 #define BONITO_IODEVCFG_WORDSWAPBIT_IDE 0x00004000
333 #define BONITO_IODEVCFG_MODEBIT_IDE	0x00008000
334 #define BONITO_IODEVCFG_DMAON_IDE	0x001f0000
335 #define BONITO_IODEVCFG_DMAON_IDE_SHIFT 16
336 #define BONITO_IODEVCFG_DMAOFF_IDE	0x01e00000
337 #define BONITO_IODEVCFG_DMAOFF_IDE_SHIFT	21
338 #define BONITO_IODEVCFG_EPROMSPLIT	0x02000000
339 /* Added by RPF 11-9-00 */
340 #define BONITO_IODEVCFG_CPUCLOCKPERIOD	0xfc000000
341 #define BONITO_IODEVCFG_CPUCLOCKPERIOD_SHIFT 26
342 /* --- */
343 
344 /* gpio */
345 #define BONITO_GPIO_GPIOW		0x000003ff
346 #define BONITO_GPIO_GPIOW_SHIFT		0
347 #define BONITO_GPIO_GPIOR		0x01ff0000
348 #define BONITO_GPIO_GPIOR_SHIFT		16
349 #define BONITO_GPIO_GPINR		0xfe000000
350 #define BONITO_GPIO_GPINR_SHIFT		25
351 #define BONITO_GPIO_IOW(N)		(1<<(BONITO_GPIO_GPIOW_SHIFT+(N)))
352 #define BONITO_GPIO_IOR(N)		(1<<(BONITO_GPIO_GPIOR_SHIFT+(N)))
353 #define BONITO_GPIO_INR(N)		(1<<(BONITO_GPIO_GPINR_SHIFT+(N)))
354 
355 /* ICU */
356 #define BONITO_ICU_MBOXES		0x0000000f
357 #define BONITO_ICU_MBOXES_SHIFT		0
358 #define BONITO_ICU_DMARDY		0x00000010
359 #define BONITO_ICU_DMAEMPTY		0x00000020
360 #define BONITO_ICU_COPYRDY		0x00000040
361 #define BONITO_ICU_COPYEMPTY		0x00000080
362 #define BONITO_ICU_COPYERR		0x00000100
363 #define BONITO_ICU_PCIIRQ		0x00000200
364 #define BONITO_ICU_MASTERERR		0x00000400
365 #define BONITO_ICU_SYSTEMERR		0x00000800
366 #define BONITO_ICU_DRAMPERR		0x00001000
367 #define BONITO_ICU_RETRYERR		0x00002000
368 #define BONITO_ICU_GPIOS		0x01ff0000
369 #define BONITO_ICU_GPIOS_SHIFT		16
370 #define BONITO_ICU_GPINS		0x7e000000
371 #define BONITO_ICU_GPINS_SHIFT		25
372 #define BONITO_ICU_MBOX(N)		(1<<(BONITO_ICU_MBOXES_SHIFT+(N)))
373 #define BONITO_ICU_GPIO(N)		(1<<(BONITO_ICU_GPIOS_SHIFT+(N)))
374 #define BONITO_ICU_GPIN(N)		(1<<(BONITO_ICU_GPINS_SHIFT+(N)))
375 
376 /* pcimap */
377 
378 #define BONITO_PCIMAP_PCIMAP_LO0	0x0000003f
379 #define BONITO_PCIMAP_PCIMAP_LO0_SHIFT	0
380 #define BONITO_PCIMAP_PCIMAP_LO1	0x00000fc0
381 #define BONITO_PCIMAP_PCIMAP_LO1_SHIFT	6
382 #define BONITO_PCIMAP_PCIMAP_LO2	0x0003f000
383 #define BONITO_PCIMAP_PCIMAP_LO2_SHIFT	12
384 #define BONITO_PCIMAP_PCIMAP_2		0x00040000
385 #define BONITO_PCIMAP_WIN(WIN, ADDR)	((((ADDR)>>26) & BONITO_PCIMAP_PCIMAP_LO0) << ((WIN)*6))
386 
387 #define BONITO_PCIMAP_WINSIZE		(1<<26)
388 #define BONITO_PCIMAP_WINOFFSET(ADDR)	((ADDR) & (BONITO_PCIMAP_WINSIZE - 1))
389 #define BONITO_PCIMAP_WINBASE(ADDR)	((ADDR) << 26)
390 
391 /* pcimembaseCfg */
392 
393 #define BONITO_PCIMEMBASECFG_MASK		0xf0000000
394 #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK	0x0000001f
395 #define BONITO_PCIMEMBASECFG_MEMBASE0_MASK_SHIFT	0
396 #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS	0x000003e0
397 #define BONITO_PCIMEMBASECFG_MEMBASE0_TRANS_SHIFT	5
398 #define BONITO_PCIMEMBASECFG_MEMBASE0_CACHED	0x00000400
399 #define BONITO_PCIMEMBASECFG_MEMBASE0_IO	0x00000800
400 
401 #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK	0x0001f000
402 #define BONITO_PCIMEMBASECFG_MEMBASE1_MASK_SHIFT	12
403 #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS	0x003e0000
404 #define BONITO_PCIMEMBASECFG_MEMBASE1_TRANS_SHIFT	17
405 #define BONITO_PCIMEMBASECFG_MEMBASE1_CACHED	0x00400000
406 #define BONITO_PCIMEMBASECFG_MEMBASE1_IO	0x00800000
407 
408 #define BONITO_PCIMEMBASECFG_ASHIFT	23
409 #define BONITO_PCIMEMBASECFG_AMASK		0x007fffff
410 #define BONITO_PCIMEMBASECFGSIZE(WIN, SIZE)	(((~((SIZE)-1))>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)
411 #define BONITO_PCIMEMBASECFGBASE(WIN, BASE)	(((BASE)>>(BONITO_PCIMEMBASECFG_ASHIFT-BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS)
412 
413 #define BONITO_PCIMEMBASECFG_SIZE(WIN, CFG)  (((((~(CFG)) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK)) << (BONITO_PCIMEMBASECFG_ASHIFT - BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT)) | BONITO_PCIMEMBASECFG_AMASK)
414 
415 
416 #define BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG)	 ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_MASK_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
417 #define BONITO_PCIMEMBASECFG_ADDRTRANS(WIN, CFG) ((((CFG) & BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS) >> BONITO_PCIMEMBASECFG_MEMBASE##WIN##_TRANS_SHIFT) << BONITO_PCIMEMBASECFG_ASHIFT)
418 
419 #define BONITO_PCITOPHYS(WIN, ADDR, CFG)	  ( \
420 						  (((ADDR) & (~(BONITO_PCIMEMBASECFG_MASK))) & (~(BONITO_PCIMEMBASECFG_ADDRMASK(WIN, CFG)))) | \
421 						  (BONITO_PCIMEMBASECFG_ADDRTRANS(WIN, CFG)) \
422 						)
423 
424 /* PCICmd */
425 
426 #define BONITO_PCICMD_MEMEN		0x00000002
427 #define BONITO_PCICMD_MSTREN		0x00000004
428 
429 
430 #endif /* _ASM_MIPS_BOARDS_BONITO64_H */
431