<?xml version="1.0"?>
<?xml-stylesheet type="text/xsl" href="/source/rss.xsl.xml"?>
<rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/">
<channel>
    <title>Changes in cpr_wakecode.s</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>4d40e39c66a331aefef24083480939f0e78a9045 - 12982 ambiguous instructions require an explicit suffix</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#4d40e39c66a331aefef24083480939f0e78a9045</link>
        <description>12982 ambiguous instructions require an explicit suffixReviewed by: Toomas Soome &lt;tsoome@me.com&gt;Reviewed by: John Levon &lt;john.levon@joyent.com&gt;Reviewed by: Robert Mustacchi &lt;rm@fingolfin.org&gt;Approved by: Dan McDonald &lt;danmcd@joyent.com&gt;

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Sat, 25 Jul 2020 14:44:21 +0200</pubDate>
        <dc:creator>Andy Fiddaman &lt;omnios@citrus-it.co.uk&gt;</dc:creator>
    </item>
<item>
        <title>dad255286ee5ada77255c1f9f132ceee0bc314aa - 2080 cpr doesn&apos;t even nearly work if built with gcc</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#dad255286ee5ada77255c1f9f132ceee0bc314aa</link>
        <description>2080 cpr doesn&apos;t even nearly work if built with gcc2425 don&apos;t pretend to use Sun as on amd64Reviewed by: Garrett D&apos;Amore &lt;garrett@damore.org&gt;Reviewed by: Joshua M. Clulow &lt;josh@sysmgr.org&gt;Reviewed by: Albert Lee &lt;trisk@nexenta.com&gt;Approved by: Gordon Ross &lt;gwr@nexenta.com&gt;

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Sat, 17 Mar 2012 02:05:45 +0100</pubDate>
        <dc:creator>Richard Lowe &lt;richlowe@richlowe.net&gt;</dc:creator>
    </item>
<item>
        <title>dfea898ab532c75e4d1426e0ff2cc5e0d67aa72f - 6970888 panic BAD TRAP: type=d (#gp General protection) due to incorrect use of x86_featureset</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#dfea898ab532c75e4d1426e0ff2cc5e0d67aa72f</link>
        <description>6970888 panic BAD TRAP: type=d (#gp General protection) due to incorrect use of x86_featureset

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Tue, 17 Aug 2010 07:47:01 +0200</pubDate>
        <dc:creator>Kuriakose Kuruvilla &lt;kuriakose.kuruvilla@oracle.com&gt;</dc:creator>
    </item>
<item>
        <title>7417cfdecea1902cef03c0d61a72df97d945925d - 6812663 Running out of bits in x86_feature</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#7417cfdecea1902cef03c0d61a72df97d945925d</link>
        <description>6812663 Running out of bits in x86_feature

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Thu, 15 Jul 2010 00:47:07 +0200</pubDate>
        <dc:creator>Kuriakose Kuruvilla &lt;kuriakose.kuruvilla@oracle.com&gt;</dc:creator>
    </item>
<item>
        <title>3d995820f4ce8cd712d97f05aae6d30d9952d298 - 6814942 auxiliary CPUs needs to have their stacks saved and restored across suspend/resume</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#3d995820f4ce8cd712d97f05aae6d30d9952d298</link>
        <description>6814942 auxiliary CPUs needs to have their stacks saved and restored across suspend/resume

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Mon, 29 Jun 2009 20:35:21 +0200</pubDate>
        <dc:creator>Joseph A Townsend &lt;Joseph.Townsend@Sun.COM&gt;</dc:creator>
    </item>
<item>
        <title>bc4466305498eebc620bcefaac080629452b3156 - 6734669 resume hangs on Toshiba M8/M9 with 64bit nondebug kernel</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#bc4466305498eebc620bcefaac080629452b3156</link>
        <description>6734669 resume hangs on Toshiba M8/M9 with 64bit nondebug kernel

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Tue, 19 Aug 2008 02:47:56 +0200</pubDate>
        <dc:creator>Guoli Shu &lt;Kerry.Shu@Sun.COM&gt;</dc:creator>
    </item>
<item>
        <title>1b1c71b2a16b821c15117fe73e4c435706a6272b - 6701717 com1 and com2 incorrectly initialized during resume</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#1b1c71b2a16b821c15117fe73e4c435706a6272b</link>
        <description>6701717 com1 and com2 incorrectly initialized during resume

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Sat, 14 Jun 2008 01:04:29 +0200</pubDate>
        <dc:creator>jan &lt;none@none&gt;</dc:creator>
    </item>
<item>
        <title>4716fd887b81cd876928e6c03a0c6d0dcf362c90 - 6395227 Need to support s3 on MP machines</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#4716fd887b81cd876928e6c03a0c6d0dcf362c90</link>
        <description>6395227 Need to support s3 on MP machines6621792 nv_sata doesn&apos;t resume on MP ultra 40 system6631154 cpr_wakecode.s has unguarded amd specific MSRs6631159 cpr_wakecode.s will call APIC initialization, even if no APIC, or APIC disabled

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Sat, 12 Jan 2008 00:02:18 +0100</pubDate>
        <dc:creator>jan &lt;none@none&gt;</dc:creator>
    </item>
<item>
        <title>2df1fe9ca32bb227b9158c67f5c00b54c20b10fd - PSARC/2005/469 X86 Energy Star compliance</title>
        <link>http://kernelsources.org:8080/source/history/titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s#2df1fe9ca32bb227b9158c67f5c00b54c20b10fd</link>
        <description>PSARC/2005/469 X86 Energy Star compliancePSARC/2006/632 PSMI extension for state save and restore6330209 nge needs to support DDI_SUSPEND/DDI_RESUME6381827 Suspend to RAM on x866393154 audio810 needs to support DDI_SUSPEND/DDI_RESUME6397047 fd, fdc needs to support Suspend/Resume6401974 cannot enter S3 with ohci PME enable set on Tyan 2865 with Sun or Tyan 2.01 BIOS6422613 memscrubber doesn&apos;t re-acquire lock before CALLB_CPR_EXIT6455736 ata/dadk/cmdk should support DDI_SUSPEND/DDI_RESUME6511370 CPR on SPARC regression6586018 TODOP Macros in i86pc/sys/machclock.h not in sun4u/sun4v equivilent (Sparc only)6610124 It takes more than 3 minutes after printing &quot;pci_pre_resume nv_sata:0&quot;6617143 powerd/pmconfig emits a different default message for an existing on or off action.--HG--rename : usr/src/cmd/power/power.conf =&gt; usr/src/cmd/power/power.conf.sparc

            List of files:
            /titanic_52/usr/src/uts/i86pc/ml/cpr_wakecode.s</description>
        <pubDate>Sun, 21 Oct 2007 01:00:42 +0200</pubDate>
        <dc:creator>randyf &lt;none@none&gt;</dc:creator>
    </item>
</channel>
</rss>
