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    <title>Changes in Makefile</title>
    <description></description>
    <language>en</language>
    <copyright>Copyright 2015</copyright>
    <generator>Java</generator><item>
        <title>9611c0ce215a66770ccbe5c126bf57ba8c31bcad - Merge commit &apos;6beaec3aee9852438b89e4d7891caf5e84d45851&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-current</title>
        <link>http://kernelsources.org:8080/source/history/linux/scripts/dtc/include-prefixes/arm64/aspeed/Makefile#9611c0ce215a66770ccbe5c126bf57ba8c31bcad</link>
        <description>Merge commit &apos;6beaec3aee9852438b89e4d7891caf5e84d45851&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-currentThis pulls in the merge commit for MFD updates for v7.2. The PR containsa build-time dependency of one of the GPIO commits that will follow.

            List of files:
            /linux/scripts/dtc/include-prefixes/arm64/aspeed/Makefile</description>
        <pubDate>Fri, 19 Jun 2026 10:50:17 +0200</pubDate>
        <dc:creator>Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;</dc:creator>
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        <title>aab799b1bdd1ff3e6912f96e66c910b8a5d011bb - Merge tag &apos;soc-dt-7.2&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
        <link>http://kernelsources.org:8080/source/history/linux/scripts/dtc/include-prefixes/arm64/aspeed/Makefile#aab799b1bdd1ff3e6912f96e66c910b8a5d011bb</link>
        <description>Merge tag &apos;soc-dt-7.2&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socPull SoC devicetree updates from Arnd Bergmann: &quot;There are fewer devicetree updates this time that the last few ones,  with five SoC types getting added:   - Qualcomm Dragonwing IPQ9650 is a new wireless networking SoC using     four Cortex-A55 and one Cortex-A78 core, which is a significant     upgrade from older generations   - ZTE zx297520v3 is an older low-end wireless SoC using a single     Cortex-A53 core, which so far can only run 32-bit kernels. This     brings back the ZX family of chips that was removed in 2021 after     support for the original zx296702 and zx296718 chips was never     completed.   - Renesas R-Car M3Le (R8A779MD) is a variant of the R-Car M3-N     (R8A77965) automotive SoC.   - Apple t8122 (M3) is the 2023 generation of their laptop SoCs, which     has now been reverse-engineered to the point of having initial     kernel support for five laptop models.   - ASPEED AST27xx is their first baseboard managment controller using     a 64-bit core, the Cortex-A35, following earlier generations using     ARMv5/v6/v7 CPUs.  These all come with one or more initial boards, and in total there are  39 new boards getting added across SoC families, including:   - Two NAS boxes using the old Cortina Systems Gemini SoC based on an     ARMv4 FA526 CPU core   - 18 industrial embedded boards using NXP i.MX6/8/9 and LX2160A SoCs     from Variscite, Toradex and SolidRun, plus a number of overlays for     combinations with additional boards   - One new carrier board and SoM using TI K3 AM62x, in addition to new     overlays for older SoMs   - Two new boards using Spacemit K3 (no relation with TI) RISC-V SoCs.   - Three phones from Google, Nothing and Motorola, all using Qualcomm     Snapdragon SoCs   - AST26xx BMC support for two server boards  While there is still a significant number of patches improving  hardware support for the existing boards across vendors (NXP,  Qualcomm, Renesas, Rockchips, Mediatek, ...), a much smaller number  of cleanups and warning fixes have made it in this time&quot;* tag &apos;soc-dt-7.2&apos; of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (665 commits)  arm64: dts: aspeed: Fix duplicate pinctrl labels and address scheme  arm64: dts: bst: enable eMMC controller in C1200  dt-bindings: display/lvds-codec: add ti,sn65lvds93  arm64: dts: allwinner: a523: Add missing GPIO interrupt  arm64: dts: lx2160a-rev2: avoid 32-bit pcie window system ram overlap  arm64: dts: aspeed: Add initial AST27xx SoC device tree  arm64: Kconfig: Add ASPEED SoC family Kconfig support  dt-bindings: arm: aspeed: Add AST2700 board compatible  arm64: dts: allwinner: a523: add gpadc node  arm64: dts: allwinner: Add EL2 virtual timer interrupt  ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node  dt-bindings: media: sun6i-a31-isp: Add optional interconnect properties  dt-bindings: media: sun6i-a31-csi: Add optional interconnect properties  arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlays  arm64: dts: imx93-var-som-symphony: enable ADC  arm64: dts: imx93-var-som-symphony: enable TPM3 PWM  arm64: dts: imx93-var-som-symphony: keep RGB_SEL low  arm64: dts: imx93-var-som-symphony: enable UART7  arm64: dts: imx93-var-som-symphony: add TPM support  arm64: dts: imx91-var-som-symphony: fix RGB_SEL handling  ...

            List of files:
            /linux/scripts/dtc/include-prefixes/arm64/aspeed/Makefile</description>
        <pubDate>Wed, 17 Jun 2026 20:16:56 +0200</pubDate>
        <dc:creator>Linus Torvalds &lt;torvalds@linux-foundation.org&gt;</dc:creator>
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        <title>e77bb5dc57593a4698aaacd57a776728cf552e73 - arm64: dts: aspeed: Add initial AST27xx SoC device tree</title>
        <link>http://kernelsources.org:8080/source/history/linux/scripts/dtc/include-prefixes/arm64/aspeed/Makefile#e77bb5dc57593a4698aaacd57a776728cf552e73</link>
        <description>arm64: dts: aspeed: Add initial AST27xx SoC device treeAdd initial device tree support for the ASPEED AST27xx family, the8th-generation Baseboard Management Controller (BMC) SoCs.AST27xx SOC Family - https://www.aspeedtech.com/server_ast2700/ - https://www.aspeedtech.com/server_ast2720/ - https://www.aspeedtech.com/server_ast2750/The AST27xx features a dual-SoC architecture consisting of two dies,referred to as SoC0 and SoC1 - interconnected through an internalproprietary bus. Both SoCs share the same address decoding scheme,while each maintains independent clock and reset domains.- SoC0 (CPU die): contains a quad-core Cortex-A35 cluster and two  Cortex-M4 cores, along with high-speed peripherals.- SoC1 (I/O die): includes the BootMCU (responsible for system  boot) and its own clock/reset domains low-speed peripherals.The device tree describes the SoC0 and SoC1 domains and their peripherallayouts.Signed-off-by: Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;Link: https://lore.kernel.org/r/20260609-upstream_ast2700-v9-3-f631752f0cb1@aspeedtech.comSigned-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;

            List of files:
            /linux/scripts/dtc/include-prefixes/arm64/aspeed/Makefile</description>
        <pubDate>Tue, 09 Jun 2026 04:47:20 +0200</pubDate>
        <dc:creator>Ryan Chen &lt;ryan_chen@aspeedtech.com&gt;</dc:creator>
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